Variable resistance material, variable resistance memory device comprising variable resistance material
Patent Information
- Application Number
- KR1020230002198
- Authority / Receiving Office
- KR · KR
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2023-01-06
- Publication Date
- 2026-09-04
- Estimated Expiration
- 2043-01-06
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Figure 112023002272103-PAT00005_ABST
Abstract
Description
Technology Field
[0001] The present invention relates to a semiconductor memory device, and more specifically, to a variable resistor material and a variable resistor memory device including the same. Background Technology
[0003] Semiconductor memory devices can be broadly classified into volatile memory devices and nonvolatile memory devices. Volatile memory devices are memory devices in which stored data is lost when the power supply is interrupted, such as DRAM (Dynamic Random Access Memory) and SRAM (Static Random Access Memory). Nonvolatile memory devices are memory devices in which stored data is not lost even when the power supply is interrupted, such as PROM (Programmable ROM), EPROM (Erasable PROM), EEPROM (Electrically EPROM), and flash memory devices.
[0004] Furthermore, in line with the recent trend toward higher performance and lower power consumption in semiconductor memory devices, next-generation semiconductor memory devices such as Magnetic Random Access Memory (MRAM) and Phase-Change Random Access Memory (PRAM) are being developed. The materials constituting these next-generation semiconductor memory devices exhibit resistance values that vary depending on current or voltage, and possess the characteristic of maintaining their resistance values even when the supply of current or voltage is interrupted.
[0005] Phase Change Memory (PRAM) includes a phase change material within the device. The phase change material exists in a crystalline or amorphous state within the device, and the phase of the phase change material can be controlled by controlling the magnitude and duration of the current provided through the bit line. The phase change material in the crystalline state has lower electrical resistance than the phase change material in the amorphous state. The problem to be solved
[0007] The technical problem to be solved by the present invention is to design the composition ratio of a variable resistor material to provide a variable resistor material with improved thermal stability and operating characteristics, and a variable resistor memory device including the same.
[0008] The problems that the present invention aims to solve are not limited to those mentioned above, and other unmentioned problems will be clearly understood by those skilled in the art from the description below. means of solving the problem
[0010] A variable resistance memory device according to an embodiment of the present invention may include a first electrode; a variable resistance material on the first electrode; and a second electrode on the variable resistance material. The variable resistance material comprises germanium (Ge), antimony (Sb), tellurium (Te), and at least one impurity (A), and A p Ge x Sb y Te z It can be represented as. The atomic concentration x of the germanium may be 0.4≤x≤0.5. The atomic concentration z of the tellurium may be 0.3≤z<0.6. The atomic concentration p of the impurity is 0 <p≤0.1 일 수 있다. 상기 안티몬의 원자 농도 y는 1-x-z-p이고, 0보다 클 수 있다.
[0011] A variable resistor material according to an embodiment of the present invention may comprise germanium (Ge); antimony (Sb); tellurium (Te); and at least one impurity (A). The variable resistor material is A p Ge x Sb y Te z It can be represented as. The atomic concentration x of the germanium may be 0.4≤x≤0.5. The atomic concentration z of the tellurium may be 0.3≤z<0.6. The atomic concentration p of the impurity is 0 <p≤0.1 일 수 있다. 상기 안티몬의 원자 농도 y는 1-x-z-p이고, 0보다 클 수 있다. Effects of the invention
[0013] The variable resistance material (VR) according to the present invention and the variable resistance memory device including the same can improve thermal stability and operating characteristics through the design of an appropriate composition ratio of the variable resistance material (VR). Brief explanation of the drawing
[0015] FIG. 1 is a circuit diagram showing a memory cell array of a variable resistor memory device according to some embodiment of the present invention. Figure 2 is a circuit diagram showing the circuit of one of the memory cells of Figure 1. FIG. 3 is a cross-sectional view of a memory cell of a variable resistor memory device according to some embodiment of the present invention. FIG. 4 is a cross-sectional view of a memory cell of a variable resistor memory device according to some embodiment of the present invention. Figure 5 is a three-phase diagram of Ge-Sb-Te included in a variable resistor material. Figure 6 is a graph showing the crystallization temperature of a variable resistance material according to the atomic concentration of Ge. Figure 7 is a graph showing the read window of a variable resistor material according to the atomic concentration of Ge. Figure 8 is a graph showing the reset resistance of a variable resistance material according to the atomic concentration of Te. FIG. 9 is a graph showing the retention temperature of a variable resistance material according to some embodiments of the present invention. Specific details for implementing the invention
[0016] Hereinafter, in order to explain the present invention more specifically, embodiments according to the present invention will be described in more detail with reference to the accompanying drawings.
[0017] First, the 'atomic concentration' used in the text is defined as the value obtained by dividing the number of specific atoms contained in the variable resistor material (VR) by the total number of atoms. For example, in the case of a variable resistor material (VR) containing Ge4Sb2Te3, the atomic concentration of Ge is 4 / 9, the atomic concentration of Sb is 2 / 9, and the atomic concentration of Te is 3 / 9.
[0018] FIG. 1 is a circuit diagram showing a memory cell array of a variable resistor memory device according to some embodiment of the present invention. FIG. 2 is a circuit diagram showing a circuit of one of the memory cells of FIG. 1.
[0019] Referring to FIGS. 1 and 2, a variable resistor memory device may include a variable resistor memory cell array (100). The variable resistor memory cell array (100) may include a plurality of variable resistor memory cells (MC). For example, the variable resistor memory cell array (100) may include nine variable resistor memory cells (MC11-MC33) arranged in a 3x3 configuration. However, this is for convenience of explanation, and the number and arrangement of the variable resistor memory cells may be varied.
[0020] A variable resistor memory cell array (100) may include a plurality of word lines (WL) and a plurality of bit lines (BL). For example, the plurality of word lines (WL) may include first to third word lines (WL1, WL2, WL3). For example, the plurality of bit lines (BL) may include first to third bit lines (BL1, BL2, BL3). Each of the variable resistor memory cells (MC) may be connected to a corresponding word line (WL) and a corresponding bit line (BL). For example, one variable resistor memory cell (MC22) may be connected to a second word line (WL2) and a second bit line (BL2).
[0021] Each of the variable resistance memory cells (MC) may include a variable resistance material (VR). For example, the variable resistance material (VR) may be a phase change material (PCM). The phase change material may have either a crystalline state or an amorphous state. For example, when the phase change material is in a crystalline state, it may have a lower threshold voltage than when the phase change material is in an amorphous state.
[0022] For example, a phase change material can have a High Resistance State (HRS) in an amorphous state. A phase change memory cell can have data of “0” when the phase change material has a High Resistance State. As another example, a phase change material can have a Low Resistance State (LRS) in a crystalline state. A phase change memory cell can have data of “1” when the phase change material has a Low Resistance State. A Reset operation can be defined as a series of operations that cause the phase change memory cell to have data of “0” (in other words, cause the phase change material to have an amorphous state). A Set operation can be defined as a series of operations that cause the phase change memory cell to have data of “1” (in other words, cause the phase change material to have a crystalline state).
[0023] The variable resistor material (VR) according to the present invention may include germanium (Ge), antimony (Sb), tellurium (Te), and at least one impurity (A). As an example, the variable resistor material (VR) is A p Ge x Sb y Te z It can be represented as follows. x is the atomic concentration of germanium (Ge). y is the atomic concentration of antimony (Sb). z is the atomic concentration of tellurium (Te). p is the atomic concentration of impurities. The sum of the atomic concentrations of germanium (Ge), antimony (Sb), tellurium (Te), and impurities, respectively, is 1. In other words, the sum of x, y, z, and p is 1. For example, the variable resistor material (VR) may be a single film or a composite film. For example, the impurities may include at least one of B, C, N, and O.
[0024] FIG. 3 is a cross-sectional view of a memory cell of a variable resistor memory device according to some embodiment of the present invention.
[0025] Referring to FIG. 3, the variable resistance memory device may include a first electrode (EL1), a variable resistance material (VR), a first barrier pattern (BM1), and a second electrode (EL2).
[0026] Each of the first electrode (EL1) and the second electrode (EL2) may include a conductive material. The first electrode (EL1) and the second electrode (EL2) may include the same material. Additionally, the first electrode (EL1) and the second electrode (EL2) may include different materials. For example, each of the first electrode (EL1) and the second electrode (EL2) may include carbon. For another example, each of the first electrode (EL1) and the second electrode (EL2) may include at least one of a metal and a metal nitride. For another example, the first electrode (EL1) may include TiN.
[0027] For example, the first electrode (EL1) can be controlled by the word line (WL) of FIG. 2, and the second electrode (EL2) can be connected to the bit line (BL) of FIG. 2. For example, the first electrode (EL1) can be located on a source line contact portion (not shown). For example, the second electrode (EL2) can be located on the bit line (BL). For example, the second electrode (EL2) can connect the first barrier pattern (BM1) and the bit line (BL) of FIG. 2.
[0028] For example, the variable resistance material (VR) may be located on the first electrode (EL1). For example, the variable resistance material (VR) may be located between the first electrode (EL1) and the second electrode (EL2).
[0029] The first barrier pattern (BM1) may include at least one of a metal and a metal nitride. For example, it may include at least one of W, Ti, Al, Cu, C, CN, TiN, TiAlN, TiSiN, TiCN, WN, CoSiN, WSiN, TaN, TaCN, or TaSiN. For example, the first barrier pattern (BM1) may be located on a variable resistance material (VR). For example, the first barrier pattern (BM1) may be located between the variable resistance material (VR) and the second electrode (EL2). The first barrier pattern (BM1) can prevent the diffusion of the material constituting the variable resistance material (VR).
[0030] FIG. 4 is a cross-sectional view of a memory cell of a variable resistor memory device according to some embodiment of the present invention.
[0031] Referring to FIG. 4, a variable resistor memory device may include a first electrode (EL1), a selection element (SW), a third electrode (EL3), a second barrier pattern (BM2), a variable resistor material (VR), a first barrier pattern (BM1), and a second electrode (EL2). For the sake of simplicity, explanations that overlap with the aforementioned content are omitted, and the differences from the aforementioned embodiments are explained primarily.
[0032] Each of the first electrode (EL1), the second electrode (EL2), and the third electrode (EL3) may comprise a conductive material. The first electrode (EL1), the second electrode (EL2), and the third electrode (EL3) may comprise the same material. Alternatively, the first electrode (EL1), the second electrode (EL2), and the third electrode (EL3) may comprise different materials. For example, the first electrode (EL1), the second electrode (EL2), and the third electrode (EL3) may each comprise carbon. For another example, the first electrode (EL1), the second electrode (EL2), and the third electrode (EL3) may each comprise at least one of a metal and a metal nitride.
[0033] For example, the first electrode (EL1) can be controlled by the word line (WL) of FIG. 2. For example, the second electrode (EL2) can be connected to the bit line (BL) of FIG. 2. For example, the second electrode (EL2) can connect the first barrier pattern (BM1) and the bit line (BL) of FIG. 2.
[0034] For example, the third electrode (EL3) can be controlled by a selection element (SW). For example, the third electrode (EL3) can be located on the selection element (SW). For example, the third electrode (EL3) can be located between the second barrier pattern (BM2) and the selection element (SW).
[0035] The selection element (SW) may be a diode or a device based on a threshold switching phenomenon having a non-linear (e.g., S-shaped) IV curve. As an example, the selection element (SW) may be an ovonic threshold switch (OTS) device having bi-directional characteristics. As an example, the ovonic threshold switch may have a phase transition temperature between the crystalline and amorphous phases higher than that of the variable resistor material (VR). As an example, the phase transition temperature of the ovonic threshold switch may be approximately 350°C to approximately 450°C.
[0036] In an exemplary embodiment, the ovonic threshold switch may include at least one of GeSe, GeS, AsSe, AsTe, AsS SiTe, SiSe, SiS, GeAs, SiAs, SnSe, and SnTe. In an exemplary embodiment, the ovonic threshold switch may include at least one of GeAsTe, GeAsSe, AlAsTe, AlAsSe, SiAsSe, SiAsTe, GeSeTe, GeSeSb, GaAsSe, GaAsTe, InAsSe, InAsTe, SnAsSe, and SnAsTe. In an exemplary embodiment, the ovonic threshold switch may include at least one of GeSiAsTe, GeSiAsSe, GeSiSeTe, GeSeTeSb, GeSiSeSb, GeSiTeSb, GeSeTeBi, GeSiSeBi, GeSiTeBi, GeAsSeSb, GeAsTeSb, GeAsTeBi, GeAsSeBi, GeAsSeIn, GeAsSeGa, GeAsSeAl, GeAsSeTl, GeAsSeSn, GeAsSeZn, GeAsTeIn, GeAsTeGa, GeAsTeAl, GeAsTeTl, GeAsTeSn, and GeAsTeZn.In an exemplary embodiment, the obonic threshold switch is GeSiAsSeTe, GeAsSeTeS, GeSiAsSeS, GeSiAsTeS, GeSiSeTeS, GeSiAsSeP, GeSiAsTeP, GeSiAsSeIn, GeSiAsSeGa, GeSiAsSeAl, GeSiAsSeTl, GeSiAsSeZn, GeSiAsSeSn, GeSiAsTeIn, GeSiAsTeGa, GeSiAsTeAl, GeSiAsTeTl, GeSiAsTeZn, GeSiAsTeSn, GeAsSeTeIn, GeSiAsTeGa, GeSiAsTeAl, GeSiAsTeTl, GeSiAsTeZn, GeSiAsTeSn, GeAsSeTeIn, GeAsSeTeGa, GeAsSeTeAl, GeAsSeTeTl, GeAsSeTeZn, GeAsSeTeSn, GeAsSeSIn, GeAsSeSGa, GeAsSeSAl, GeAsSeSTl, GeAsSeSZn, GeAsSeSSn, GeAsTeSIn, GeAsTeSGa, GeAsTeSAl, GeAsTeSTl, GeAsSeSZn, GeAsTeSSn, GeAsSeInGa, GeAsSeInAl, GeAsSeInTl, GeAsSeInZn, GeAsSeInSn, GeAsSeGaAl, GeAsSeGaTl, GeAsSeGaZn, GeAsSeGaSn, GeAsSeAlTl, GeAsSeAlZn, GeAsSEAlSn, GeAsSeTlZn, GeAsSeTlSn, GeAsSeZnSn can contain at least one of them.In an exemplary embodiment, the ovonic threshold switches include GeSiAsSeTeS, GeSiAsSeTeIn, GeSiAsSeTeGa, GeSiAsSeTeAl, GeSiAsSeTeTl, GeSiAsSeTeZn, GeSiAsSeTeSn, GeSiAsSeTeP, GeSiAsSeSIn, GeSiAsSeSGa, GeSiAsSeSAl, GeSiAsSeSTl, GeSiAsSeSZn, GeSiAsSeSSn, GeAsSeTeSIn, GeAsSeTeSGa, GeAsSeTeSAl, GeAsSeTeSTl, GeAsSeTeSZn, GeAsSeTeSSn, GeAsSeTePIn, GeAsSeTePGa, GeAsSeTePAl, GeAsSePTl, GeAsSeTePZn, GeAsSePSn, GeSiAsSeInGa, GeSiAsSeInAl, GeSiAsSeInTl, GeSiAsSeInZn, GeSiAsSeInSn, GeSiAsSeGaAl, GeSiAsSeGaTl, GeSiAsSeGaZn, GeSiAsSeGaSn, GeSiAsSeAlSn, GeAsSeTeInGa, GeAsSeTeInAl, GeAsSeTeInTl, GeAsSeTeInZn, GeAsSeTeInSn, GeAsSeTeGaAl, GeAsSeTeGaTl, GeAsSeTeGaZn, GeAsSeTeGaSn, GeAsSeTeAlSn, It may include at least one of GeAsSeSInGa, GeAsSeSInAl, GeAsSeSInTl, GeAsSeSInZn, GeAsSeSInSn, GeAsSeSGaAl, GeAsSeSGaTl, GeAsSeSGaZn, GeAsSeSGaSn, and GeAsSeSAlSn.
[0037] For example, the selection element (SW) may be located on the first electrode (EL1). For example, the selection element (SW) may be located between the first electrode (EL1) and the third electrode (EL3).
[0038] Each of the first and second barrier patterns (BM1, BM2) may include at least one of a metal and a metal nitride. For example, it may include at least one of W, Ti, Al, Cu, C, CN, TiN, TiAlN, TiSiN, TiCN, WN, CoSiN, WSiN, TaN, TaCN, or TaSiN. For example, the first barrier pattern (BM1) may be located on the variable resistor material (VR). For example, the second barrier pattern (BM2) may be located on the variable resistor material (VR). Each of the first and second barrier patterns (BM1, BM2) may prevent the diffusion of the material constituting the variable resistor material (VR). For example, the first barrier pattern (BM1) may prevent the material of the variable resistor material (VR) from diffusing to the second electrode (EL2). For example, the second barrier pattern (BM2) can prevent the material of the variable resistance material (VR) from diffusing to the third electrode (EL3).
[0039] For example, the variable resistor material (VR) may be located on the third electrode (EL3). For example, the variable resistor material (VR) may be located between the third electrode (EL3) and the second electrode (EL2). For example, the variable resistor material (VR) may be located on the second barrier pattern (BM2). For example, the variable resistor material (VR) may be located between the second barrier pattern (BM2) and the first barrier pattern (BM1).
[0040] FIG. 5 is a three-phase diagram of Ge-Sb-Te included in a variable resistor material. Referring to FIG. 5 below, the composition of a variable resistor material (VR) of various embodiments according to the present invention will be examined.
[0041] Referring to FIG. 5, the variable resistor material (VR) according to the present invention may include germanium (Ge), antimony (Sb), and tellurium (Te). As an example, the variable resistor material (VR) may be the variable resistor material (VR) described with reference to FIG. 3 or FIG. 4. Hereinafter, the compositions of germanium (Ge), antimony (Sb), and tellurium (Te) of the variable resistor material (VR) will be described using a plurality of composition lines (L1, L2, L3, L4, L5, L6, and L7) in a three-phase diagram.
[0042] The first composition line (L1) is a line connecting compositions where the atomic concentration z of tellurium (Te) is 0.3. The second composition line (L2) is a line connecting compositions where the atomic concentration x of germanium (Ge) is 0.4. The third composition line (L3) is a line connecting compositions where the atomic concentration x of germanium (Ge) is 0.5. The fourth composition line (L4) is a line connecting compositions where the atomic concentration x of germanium (Ge) is 0.45. The fifth composition line (L5) is a line connecting compositions where the atomic concentration x of germanium (Ge) is 0.47. The sixth composition line (L6) is a line connecting compositions where the atomic concentration y of antimony (Sb) is 0.1. The seventh composition line (L7) is a line connecting compositions where the atomic concentration y of antimony (Sb) is 0.2. The compositions of various embodiments according to the present invention can be defined within the region enclosed by the plurality of composition lines.
[0043] According to some embodiments of the present invention, the compositions of germanium (Ge), antimony (Sb), and tellurium (Te) of the variable resistor material (VR) may be defined within a first compositional region (P1) enclosed by first to third compositional lines (L1, L2, and L3). Within the first compositional region (P1), the atomic concentration x of germanium (Ge) is 0.4 ≤ x ≤ 0.5, the atomic concentration z of tellurium (Te) is 0.3 ≤ z < 0.6, and the atomic concentration y of antimony (Sb) may be defined as 1 - xzp, where y is greater than 0. Impurities may be added to the variable resistor material (VR) having the composition of the first compositional region (P1). The variable resistor material (VR) is A p Ge x Sb y Te z It can be represented as. For example, the ratio of atomic concentrations of germanium (Ge), antimony (Sb), and tellurium (Te), respectively, may be 4:1:4. For example, the ratio of atomic concentrations of germanium (Ge), antimony (Sb), and tellurium (Te), respectively, may be 4:2:3. For example, the impurity (A) may include at least one of B, C, N, and O. For example, the atomic concentration p of the impurity (A) is 0 <p≤0.1일 수 있다. 일 예로 탄소(C) 또는 질소(N)의 원자 농도는 0보다 크되 0.1 이하일 수 있다. 일 예로 탄소(C) 또는 질소(N)의 원자 농도는 0.06 이상 0.1이하일 수 있다. 일 예로, 상기 가변 저항 물질(VR)은 단일막 또는 복합막일 수 있다. 일 예로, 제 1 조성영역(P1) 내의 가변 저항 물질(VR)에 원자 농도 p가 0<p≤0.1인 불순물(A)이 추가된 경우, 상기 가변 저항 물질(VR)을 포함하는 가변 저항 메모리 장치의 셋 스피드는 400ns 이하일 수 있다.
[0044] In another embodiment of the present invention, the compositions of germanium (Ge), antimony (Sb), and tellurium (Te) of the variable resistor material (VR) may be defined as a second compositional region (P2) surrounded by first, fourth, and fifth compositional lines (L1, L4, and L5). For example, the second compositional region (P2) may be included in the first compositional region (P1). For example, the second compositional region (P2) may be defined such that the atomic concentration x of germanium (Ge) is 0.45 ≤ x ≤ 0.47, the atomic concentration z of tellurium (Te) is 0.3 ≤ z < 0.55, and the atomic concentration y of antimony (Sb) is greater than 0 but defined as 1 - xzp. An impurity (A) may be added to the variable resistor material (VR) having the composition of the second compositional region. The variable resistor material (VR) is A p Ge x Sb y Te z It can be represented as. For example, the impurity (A) may include at least one of B, C, N, and O. For example, the atomic concentration p of the impurity (A) is 0 <p≤0.1일 수 있다. 일 예로 탄소(C) 또는 질소(N)의 원자 농도는 0보다 크되 0.1 이하일 수 있다. 일 예로 탄소(C) 또는 질소(N)의 원자 농도는 0.06 이상 0.1이하일 수 있다. 일 예로, 상기 가변 저항 물질(VR)은 단일막 또는 복합막일 수 있다. 일 예로, 제 2 조성영역(P2)에 원자 농도 p가 0<p≤0.1인 불순물(A)이 추가된 가변 저항 물질(VR)을 포함하는 가변 저항 메모리 장치의 셋 스피드는 400ns 이하일 수 있다.
[0045] In another embodiment of the present invention, the compositions of germanium (Ge), antimony (Sb), and tellurium (Te) of the variable resistor material (VR) can be defined as a third compositional region (P3) surrounded by second, third, sixth, and seventh compositional lines. For example, the third compositional region (P3) may be included in the first compositional region (P1). For example, the third compositional region (P3) may be defined such that the atomic concentration x of germanium (Ge) is 0.4≤x≤0.5, the atomic concentration z of tellurium (Te) is 0.3≤z<0.5, and the atomic concentration y of antimony (Sb) is 1-xzp, and simultaneously 0.1≤y≤0.2. An impurity (A) may be added to the variable resistor material (VR) having the composition of the second compositional region. The variable resistor material (VR) is A p Ge x Sb y Te z It can be represented as. For example, the impurity (A) may include at least one of B, C, N, and O. For example, the atomic concentration p of the impurity (A) is 0 <p≤0.1일 수 있다. 일 예로 탄소(C) 또는 질소(N)의 원자 농도는 0보다 크되 0.1 이하일 수 있다. 일 예로 탄소(C) 또는 질소(N)의 원자 농도는 0.06 이상 0.1이하일 수 있다. 일 예로, 상기 가변 저항 물질(VR)은 단일막 또는 복합막일 수 있다. 일 예로, 제 3 조성영역(P3)에 원자 농도 p가 0<p≤0.1인 불순물(A)이 추가된 가변 저항 물질(VR)을 포함하는 가변 저항 메모리 장치의 셋 스피드는 400ns 이하일 수 있다.
[0046] Hereinafter, with reference to FIGS. 6 to 9, the effects of a variable resistor material (VR) according to an embodiment of the present invention and a variable resistor memory device including the same will be explained in more detail.
[0047] Figure 6 is a graph showing the crystallization temperature of a variable resistor material (VR) according to the atomic concentration of Ge. Referring to Figure 6 below, the composition of the minimum atomic concentration of germanium (Ge) in a variable resistor material (VR) having improved thermal stability and set operation characteristics will be examined.
[0048] Referring to FIG. 6, as the atomic concentration of germanium (Ge) increases, the phase change temperature of the variable resistor material (VR) may increase. When the atomic concentrations of the variable resistor material (VR) containing impurities and the germanium (Ge) without impurities are the same, the variable resistor material (VR) containing impurities may have a higher crystallization temperature than the variable resistor material (VR) without impurities. For example, the atomic concentration p of the impurities may be greater than 0 and less than or equal to 0.1. When the atomic concentration p of the impurities is greater than 0.1, the reliability of the variable resistor material (VR) containing germanium (Ge), antimony (Sb), and tellurium (Te) may be reduced.
[0049] Materials A and B may be provided. Material A is a variable resistor material (VR) that does not contain impurities. Material B is a variable resistor material (VR) with an atomic concentration of nitrogen impurities of 6%.
[0050] As the atomic concentration of germanium (Ge) increases, the phase transition temperature of material A and material B may increase. The crystallization temperatures of material A and material B may differ depending on the atomic concentration of germanium (Ge). For example, when the atomic concentration of germanium (Ge) in material A is 40% or more and 50% or less (in other words, when 0.4≤x≤0.5), the crystallization temperature of material A may be lower than the soldering temperature. For example, when the atomic concentration of germanium (Ge) in material A is 40% or more and 50% or less, the crystallization temperature of material A may be 200°C or higher and 250°C or lower. In contrast, when the atomic concentration of germanium in material B is 40% or more and 50% or less, the crystallization temperature of material B may be higher than the soldering temperature. Soldering temperature can be defined as the highest temperature that can occur through the packaging process for manufacturing variable resistor memory devices. For example, the soldering temperature can be 250°C or higher. For example, when the atomic concentration of germanium (Ge) in material A exceeds 50% (in other words, 0.5 <x인 경우), 물질 A의 결정화 온도가 납땜 온도보다 높을 수 있다. 마찬가지로, 물질 B의 게르마늄의 원자 농도가 50% 초과인 경우, 물질 B의 결정화 온도가 납땜 온도보다 높을 수 있다. 일 예로, 물질 B의 게르마늄의 원자 농도가 40% 초과인 경우, 물질 B의 결정화 온도는 260℃ 이상일 수 있다. 결정화 온도가 납땜 온도보다 낮은 경우, 패키징 공정 또는 고온 환경에서 쓰기 동작 특성이 저하될 수 있다. 일 예로, 결정화 온도가 납땜 온도보다 낮은 경우, 셋 동작 바이어스 전압을 인가하지 않아도, 패키징 공정에 의해 셋 동작(다시 말해, 가변 저항 물질(VR)이 비결정질(Amorphous)에서 결정질(Crystalline)로 되는 동작)이 수행될 수 있다. 그 결과, 가변 저항 메모리 셀에 저장되어 있던 초기 데이터가 보존되지 않을 수 있다.For example, when the crystallization temperature is lower than the soldering temperature, the set operation can be performed by the high-temperature environment without applying a set operation bias voltage. Therefore, when the crystallization temperature is higher than the soldering temperature, the thermal stability and set operation characteristics of the variable resistor memory device can be improved. Thus, in the case of material A, when the atomic concentration x of germanium is 0.5 or higher, it can have improved thermal stability and set operation characteristics. In the case of material B, when the atomic concentration x of germanium is 0.4 or higher, it can have improved thermal stability and set operation characteristics.
[0051] FIG. 7 is a graph showing the read window of a variable resistor material (VR) according to the atomic concentration of Ge. Referring to FIG. 7 below, the composition of the maximum atomic concentration of germanium (Ge) in a variable resistor material (VR) having improved read operation characteristics is examined. The variable resistor material (VR) of FIG. 7 may be material A or material B of FIG. 6.
[0052] Referring to Fig. 7, the read window can be reduced as the atomic concentration of germanium (Ge) in the variable resistor material increases. The read window is defined as the value obtained by dividing the reset resistance of the variable resistor material (VR) in the reset state by the set resistance of the variable resistor material (VR) in the set state. The larger the read window, the easier it is to distinguish between the resistance values in the reset and set states, and the variable resistor material (VR) can have excellent reliability. For example, if the atomic concentration of germanium (Ge) in the variable resistor material (VR) exceeds 50% (in other words, if the atomic concentration x is 0.5 <x)인 경우, 가변 저항 물질(VR)의 리드 윈도우(Read window)는 리드 마진(read margin)보다 작을 수 있다. 리드 마진(read margin)은 가변 저항 메모리 장치의 구동에 필요한 최소한의 리드 윈도우(Read window)의 값으로 정의된다. 일 예로, 리드 마진의 값은 5일 수 있다.
[0053] If a variable resistor material (VR) has a read window larger than the read margin, it may be easy to distinguish between a reset or a set state. Accordingly, the read operation characteristics of the variable resistor memory device may be excellent. For example, when the read margin is 5, the read window of a variable resistor material (VR) with an atomic concentration of germanium (Ge) of 50% or less may be larger than 5. As a result, a variable resistor material (VR) with an atomic concentration of germanium (Ge) of 50% or less may have excellent read operation characteristics.
[0054] Referring to FIGS. 6 and 7, for example, when the atomic concentration x of germanium (Ge) in material A is 0.4 ≤ x ≤ 0.5, the read operation characteristics of a variable resistor memory device containing material A may be improved, but the thermal stability and set operation characteristics may be degraded. In contrast, when the atomic concentration x of germanium (Ge) in material B is 0.4 ≤ x ≤ 0.5, the thermal stability, set operation characteristics, and read operation characteristics of a variable resistor memory device containing material B may all be improved. That is, when the variable resistor material (VR) in the first composition region (P1) of FIG. 5 contains a small amount of impurities (for example, when the atomic concentration p of the impurities is greater than 0 and 0.1 or less), a variable resistor memory device containing a variable resistor material (VR) in which the atomic concentration x of germanium (Ge) is 0.4 ≤ x ≤ 0.5 may have improved thermal stability, set operation characteristics, and read operation characteristics.
[0055] Figure 8 is a graph showing the reset resistance of a variable resistor material (VR) according to the atomic concentration of Te. Referring to Figure 8 below, the composition of the minimum atomic concentration of tellurium (Te) in the variable resistor material (VR) for performing a read operation is examined. The variable resistor material (VR) of FIG. 8 may be material A or material B of FIG. 6.
[0056] Referring to Fig. 8, the reset resistance can increase as the atomic concentration of tellurium (Te) in the variable resistor material (VR) increases. As a result, the read window can increase as the atomic concentration of tellurium (Te) in the variable resistor material (VR) increases. For example, when the atomic concentration of tellurium (Te) in the variable resistor material (VR) is 30% or more (in other words, the atomic concentration z is 0.3 or more), the reset resistance of the variable resistor material (VR) can be 500 [kohm] or more. When the reset resistance of the variable resistor material (VR) is 500 [kohm] or more, the reset resistance can be 5 times or more than the set resistance. As a result, the read window of the variable resistor material (VR) with an atomic concentration of tellurium (Te) of 30% or more can be greater than the read margin of 5. As another example, when the atomic concentration of tellurium (Te) in the variable resistor material (VR) is 30% or less (in other words, the atomic concentration z is 0.3 or less), the reset resistance of the variable resistor material (VR) may be less than 500 [kohm]. When the reset resistance of the variable resistor material (VR) is less than 500 [kohm], the reset resistance may be 5 times or less of the set resistance. As a result, the read window of the variable resistor material (VR) may be less than 5, which is the read margin. Therefore, when the atomic concentration z of tellurium (Te) in the variable resistor material (VR) is 0.3 or greater, the read operation of the variable resistor memory device can be performed normally. Conversely, the read operation of the variable resistor memory device containing the variable resistor material (VR) in which the atomic concentration z of tellurium (Te) is less than 0.3 cannot be performed normally. That is, a variable resistor memory device including a variable resistor material (VR) in the first composition region (P1) of FIG. 5 can have normal read operation characteristics.
[0057] Referring to FIGS. 6, 7, and 8, a variable resistor memory device comprising a variable resistor material (VR) within a first compositional region (P1) may have improved thermal stability, set operation characteristics, and read operation characteristics. At the same time, the variable resistor memory device within the first compositional region (P1) may have normal read operation characteristics. Accordingly, a variable resistor memory device comprising a variable resistor material (VR) having a composition according to an embodiment of the present invention may have improved thermal stability, set operation characteristics, and read operation characteristics.
[0058] FIG. 9 is a graph showing the retention temperature of a variable resistance material (VR) according to some embodiments of the present invention.
[0059] Even if a set operation bias voltage is not applied, the variable resistor material (VR) may crystallize from an amorphous phase to a crystalline phase over time. As the phase of the variable resistor material (VR) changes, data in the variable resistor memory device may be lost. The longer the time required for crystallization, the better the retention of the variable resistor memory device can be. The time required for crystallization may vary depending on the temperature of the variable resistor material (VR). In this specification, the retention temperature is defined as the temperature at which the time required for crystallization (i.e., the time for which data is retained) is 10 years. The higher the retention temperature, the better the thermal stability of the variable resistor memory device can be.
[0060] Referring to FIG. 9, the x-axis of FIG. 9 represents temperature T and 1 / kT, where T is the absolute temperature and k is the Boltzmann constant. The absolute temperature is denoted in K, and the Celsius temperature in °C. The y-axis of FIG. 9 represents the retention time. The crystallization time line (CRTL) on the y-axis of FIG. 9 represents 10 years. Each temperature indicated on the crystallization time line (CRTL) of FIG. 9 is the retention temperature of Experimental Examples 1 to 4, respectively. The higher the retention temperature indicated on the crystallization time line (CRTL), the better the thermal stability of the variable resistor memory device can be.
[0061] Referring to FIG. 9, Experimental Examples 1, 2, 3, and 4 are each included in the embodiment of the present invention corresponding to the first compositional region (P1) of FIG. 5. For example, the composition of the variable resistor material (VR) of each of Experimental Examples 1, 2, 3, and 4 may include germanium (Ge), antimony (Sb), tellurium (Te), and at least one impurity (A). For example, the composition of the variable resistor material (VR) of Experimental Example 1 is such that the atomic concentration x of germanium is 0.47, the atomic concentration z of tellurium is 0.4≤z, and the atomic concentration p of the impurity is 0 <p≤0.1 이며, 안티몬의 원자 농도 y는 0보다 크되 1-x-y-p 일 수 있다. 일 예로, 실험예 2의 가변 저항 물질(VR)의 조성은 게르마늄의 원자 농도 x는 0.47이고, 텔루륨의 원자 농도 z는 0.3≤z<0.4이며, 불순물의 원자 농도 p는 0<p≤0.1 이며, 안티몬의 원자 농도 y는 0보다 크되 1-x-y-p 일 수 있다. 일 예로, 실험예 3의 가변 저항 물질(VR)의 조성은 게르마늄의 원자 농도 x는 0.45이고, 텔루륨의 원자 농도 z는 0.4≤z이며, 불순물의 원자 농도 p는 0<p≤0.1 이며, 안티몬의 원자 농도 y는 0보다 크되 1-x-y-p 일 수 있다. 일 예로, 실험예 4의 가변 저항 물질(VR)의 조성은 게르마늄의 원자 농도 x는 0.45이고, 텔루륨의 원자 농도 z는 0.3≤z<0.4이며, 불순물의 원자 농도 p는 0<p≤0.1 이며, 안티몬의 원자 농도 y는 0보다 크되 1-x-y-p 일 수 있다.
[0062] Referring to FIG. 9, the retention temperature of Experimental Examples 1, 2, 3, and 4, respectively, may be 420.15K or higher (i.e., 147°C or higher) and 452.15K or lower (i.e., 179°C or lower). For example, the retention temperature of Experimental Example 1 may be 452.15K (i.e., 179°C). For example, the retention temperature of Experimental Example 2 may be 421.15K (i.e., 148°C). For example, the retention temperature of Experimental Example 3 may be 430.15K (i.e., 157°C). For example, the retention temperature of Experimental Example 4 may be 420.15K (i.e., 147°C).
[0063] A variable resistor memory device having a retention temperature of 420.15K or higher (i.e., 147°C or higher) can retain data for 10 years at an ambient temperature much higher than room temperature. For example, a variable resistor memory device having a retention temperature of 420.15K or higher (i.e., 147°C or higher) can be applied to semiconductors that require operation at an ambient temperature much higher than room temperature. For example, in an environment where the ambient temperature is 420.15K (i.e., 147°C), a variable resistor memory device according to Experimental Examples 1, 2, 3, and 4 having a retention temperature of 420.15K or higher (i.e., 147°C or higher) can operate normally for 10 years. Therefore, a variable resistor memory device having the composition of the variable resistor material (VR) according to the present invention can have improved thermal stability.
[0064] According to the concept of the present invention, a variable resistor material (VR) included in a variable resistor memory device may comprise germanium (Ge), antimony (Sb), tellurium (Te), and at least one impurity (A). The composition of the variable resistor material (VR) is such that the atomic concentration x of germanium is 0.4 ≤ x ≤ 0.5, the atomic concentration z of tellurium is 0.3 ≤ z < 0.6, and the atomic concentration p of the impurity is 0 <p≤0.1 이며, 상기 안티몬의 원자 농도 y는 0보다 크되 1-x-z-p 일 수 있다. 상기 조성은 A p Ge x Sb y Te z It can be represented as such. The impurity may be at least one of carbon (C) and nitrogen (N). Only within the range of GST and impurity composition proposed in the present invention can the retention temperature, thermal stability, set operation characteristics, and read operation characteristics of the variable resistance memory device all be improved.
[0065] The above description describes specific embodiments for implementing the present invention. The present invention will include not only the embodiments described above, but also embodiments that can be simply modified or easily modified. Furthermore, the present invention will include technologies that can be easily modified and implemented using the embodiments. Accordingly, the scope of the present invention should not be limited to the embodiments described above, but should be defined by the claims set forth below as well as equivalents to the claims of this invention. Explanation of the symbols
[0067] EL1: First electrode EL2: Second electrode EL3: Third electrode BM1: 1st Barrier Pattern BM2: 2nd Barrier Pattern VR; variable resistor material SW; selection element WL : Wordline BL : Beatline MC: Memory Cell CRTL: Crystallization temperature time line
Claims
Claim 1 A first electrode; a variable resistance material on the first electrode; and a second electrode on the variable resistance material, wherein the variable resistance material comprises germanium (Ge), antimony (Sb), tellurium (Te), and at least one impurity (A), and A p Ge x Sb y Te z It is represented as such, wherein the atomic concentration x of the germanium is 0.4≤x≤0.5, the atomic concentration z of the tellurium is 0.3≤z<0.6, and the atomic concentration p of the impurity is 0 <p≤0.1 이며,상기 안티몬의 원자 농도 y는 1-x-z-p이고, 0보다 큰 가변 저항 메모리 장치. Claim 2 A variable resistance memory device according to claim 1, wherein the impurity comprises at least one of carbon (C) and nitrogen (N). Claim 3 A variable resistance memory device according to claim 1, wherein the atomic concentration x of germanium is 0.45≤x≤0.47 and the atomic concentration z of tellurium is 0.3≤z<0.
55. Claim 4 A variable resistance memory device according to claim 1, wherein the ratio of atomic concentrations of germanium (Ge), antimony (Sb), and tellurium (Te), respectively, is 4:1:
4. Claim 5 A variable resistance memory device according to claim 1, wherein the ratio of atomic concentrations of germanium (Ge), antimony (Sb), and tellurium (Te), respectively, is 4:2:
3. Claim 6 A variable resistance memory device according to claim 1, wherein the atomic concentration y of the antimony is 0.1≤y≤0.2 and the atomic concentration z of the tellurium is 0.3≤z<0.
5. Claim 7 A variable resistor memory device according to claim 1, wherein the crystallization temperature of the variable resistor material is higher than the soldering temperature. Claim 8 A variable resistor memory device having a retention temperature of 179°C or lower, according to claim 1. Claim 9 Germanium (Ge); antimony (Sb); tellurium (Te); and at least one impurity (A) comprising A p Ge x Sb y Te z Represented as such, wherein the atomic concentration x of the germanium is 0.4≤x≤0.5, the atomic concentration z of the tellurium is 0.3≤z<0.6, and the atomic concentration p of the impurity is 0 <p≤0.1 이며,상기 안티몬의 원자 농도 y는 1-x-z-p이고, 0보다 큰 가변 저항 물질. Claim 10 In claim 9, the impurity is a variable resistance material comprising at least one of carbon (C) and nitrogen (N).
Citation Information
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