Organic light emitting display device and method of thereof

KR103015190B1Active Publication Date: 2026-09-04LG DISPLAY CO LTD
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Patent Information

Application Number
KR1020210184918
Authority / Receiving Office
KR · KR
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-12-22
Publication Date
2026-09-04
Estimated Expiration
2041-12-22

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Abstract

The present invention relates to an organic electroluminescent display device capable of accurate and rapid aging, comprising: a first substrate including a plurality of subpixels; at least one thin-film transistor and an organic light-emitting element disposed at each subpixel on the first substrate; an encapsulation layer disposed on the upper portion of the first substrate; a second substrate disposed on the encapsulation layer; and an aging voltage supply wiring directly connected to the thin-film transistor to directly supply an aging voltage to the thin-film transistor.
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Description

Technology Field

[0001] The present invention relates to an organic electroluminescent display device and a method for manufacturing the same, and in particular to an organic electroluminescent display device that is easy to age and a method for manufacturing the same. Background Technology

[0003] Recently, the importance of flat panel displays has been increasing alongside the development of multimedia. In response to this, flat panel displays such as liquid crystal displays, plasma displays, and organic light-emitting diodes (OLEDs) are being commercialized. Among these flat panel displays, OLEDs are currently widely used due to their high response speed, high brightness, and excellent viewing angles.

[0004] However, these organic electroluminescent display devices have the following problems.

[0005] In one subpixel of an organic electroluminescent display device, an organic light-emitting element that emits light and a thin-film transistor for applying a signal to the organic light-emitting element are arranged. As a signal is applied from the outside, the thin-film transistor operates, and when current is applied to the organic light-emitting element through the thin-film transistor, light corresponding to the applied current is emitted from the organic light-emitting element.

[0006] As such, in organic electroluminescent display devices, thin-film transistors are used to control the driving of organic light-emitting elements. However, when leakage current occurs in the thin-film transistors, not only does the brightness of the display device become uneven, but even when the organic light-emitting elements are turned off, current is applied to the organic light-emitting elements, causing the organic light-emitting elements to emit light, resulting in a problem where bright spots or lines appear on the non-operating screen. The problem to be solved

[0008] The present invention aims to solve the aforementioned problem by providing an organic electroluminescent display device and a method for manufacturing the same, which can prevent defects caused by brightness non-uniformity by preventing leakage current through aging a thin-film transistor.

[0009] Another objective of the present invention is to provide an organic electroluminescent display device and a method for manufacturing the same that can prevent the electrical characteristics of other thin-film transistors from changing by directly applying an aging voltage to the thin-film transistor. means of solving the problem

[0011] To achieve the above objective, an organic electroluminescent display device according to the present invention comprises: a first substrate including a plurality of subpixels; at least one thin-film transistor and an organic light-emitting element disposed on each subpixel on the first substrate; an encapsulation layer disposed on the upper portion of the first substrate; a second substrate disposed on the encapsulation layer; and an aging voltage supply wiring directly connected to the thin-film transistor to directly supply an aging voltage to the thin-film transistor.

[0012] A thin-film transistor comprises a semiconductor layer formed on a buffer layer disposed on the first substrate, a gate insulating layer disposed on the semiconductor layer, a gate electrode disposed on the gate insulating layer, an interlayer insulating layer disposed on the gate electrode, and a source electrode and a drain electrode disposed on the interlayer insulating layer.

[0013] The aging voltage supply wiring includes a first aging voltage supply wiring formed in a first contact hole formed in the first substrate and the gate insulating layer and connected to the gate electrode to directly supply the aging voltage to the gate electrode, and a second aging voltage supply wiring formed in a second contact hole formed in the first substrate, the gate insulating layer, and the interlayer insulating layer and connected to the drain electrode to directly supply the aging voltage to the drain electrode.

[0014] At this time, the first aging voltage supply wiring is made of the same material as the gate electrode, and the second aging voltage supply wiring is made of the same material as the drain electrode.

[0015] The aging voltage supply wiring is exposed to the outside through the lower surface of the first substrate, and the exposed aging voltage supply wiring is sealed by a sealing layer.

[0016] In addition, the method for manufacturing an organic electroluminescent display device according to the present invention comprises the steps of: preparing a support substrate having an aging voltage wiring formed thereon; forming a sacrificial layer on the support substrate; placing a first substrate including a plurality of subpixels on the sacrificial layer; forming at least one thin-film transistor and an organic light-emitting element in the subpixels of the first substrate and connecting the aging voltage wiring to the thin-film transistor by means of an aging voltage supply wiring; forming an encapsulation layer on the thin-film transistor and the organic light-emitting element and attaching a second substrate; directly applying an aging voltage to the thin-film transistor through the aging voltage wiring and the aging voltage supply wiring to age the thin-film transistor; and separating the support substrate from the first substrate.

[0017] An aging pad is formed at the end of the aging voltage wiring, and the step of aging the thin-film transistor further includes the step of applying the aging voltage by contacting a probe to the aging pad.

[0018] The step of connecting the aging voltage wiring to the thin-film transistor by means of the aging voltage supply wiring includes the step of forming a first contact hole in the sacrificial layer, the first substrate, and the gate insulating layer below the gate electrode, and then forming a first aging voltage supply wiring inside the first contact hole, and the step of forming a second contact hole in the sacrificial layer, the first substrate, the gate insulating layer, and the interlayer insulating layer below the drain electrode, and then forming a second aging voltage supply wiring inside the second contact hole.

[0019] The step of separating the support substrate from the first substrate includes the step of irradiating a laser or applying heat to the sacrificial layer. Effects of the invention

[0021] In the present invention, by aging the thin-film transistor to prevent leakage current, it is possible to prevent image quality defects caused by brightness non-uniformity.

[0022] In addition, in the present invention, by directly applying an aging voltage to the driving thin film transistor of a subpixel in which a plurality of thin film transistors are arranged, the influence of the aging voltage on thin film transistors other than the driving thin film transistor is excluded, thereby preventing the electrical characteristics of other thin film transistors from changing.

[0023] Furthermore, in the present invention, aging voltage wiring for applying an aging voltage is arranged on a support substrate, so that an aging voltage can be supplied to thin-film transistors arranged in a plurality of subpixels all at once, thereby enabling rapid aging. Brief explanation of the drawing

[0025] FIG. 1 is a schematic block diagram of an organic electroluminescent display device according to the present invention. FIG. 2 is a schematic block diagram of a subpixel of an organic electroluminescent display device according to the present invention. FIG. 3 is a circuit diagram of a subpixel of an organic electroluminescent display device according to the present invention. FIG. 4 is a cross-sectional view of an organic electroluminescent display device according to the first embodiment of the present invention. FIG. 5 is a plan view schematically showing the structure of the first and second aging voltage wiring according to the present invention. Figure 6 is a diagram showing the electrical characteristics of a driving thin-film transistor manufactured according to the present invention. FIGS. 7a-7i are drawings illustrating a method for manufacturing an organic electroluminescent display device according to the present invention. FIG. 8 is a cross-sectional view of an organic electroluminescent display device according to a second embodiment of the present invention. Specific details for implementing the invention

[0026] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0027] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining embodiments of the present invention are exemplary, and therefore the present invention is not limited to the depicted details. Throughout the specification, the same reference numerals refer to the same components. Furthermore, in describing the present invention, if it is determined that a detailed description of related prior art could unnecessarily obscure the essence of the present invention, such detailed description is omitted. Where terms such as "comprising," "having," or "consisting of" are used in this specification, other parts may be added unless "only" is used. Where a component is expressed in the singular, it includes cases where it is included in the plural unless specifically stated otherwise.

[0028] In interpreting the components, they are interpreted to include a margin of error even in the absence of a separate explicit statement.

[0029] In the case of describing a positional relationship, for example, when the positional relationship between two parts is described using expressions such as 'on,' 'upper,' 'lower,' or 'next to,' one or more other parts may be located between the two parts unless 'immediately' or 'directly' is used.

[0030] In the case of an explanation of a temporal relationship, for example, when a temporal sequence is explained using 'after', 'following', 'next', 'before', etc., it may include cases where the sequence is not continuous unless 'immediately' or 'directly' is used.

[0031] Although terms such as "first," "second," etc., are used to describe various components, these components are not limited by these terms. These terms are used merely to distinguish one component from another. Accordingly, the first component mentioned below may be the second component within the technical scope of the present invention.

[0032] The features of each of the various embodiments of the present invention may be combined or combined with one another, either partially or wholly, and may technically enable various interlocking and operation. Each embodiment may be implemented independently of one another or may be implemented together in an associated relationship.

[0033] The present invention will be described in detail below with reference to the attached drawings.

[0034] FIG. 1 is a schematic block diagram of an organic electroluminescent display device (100) according to the present invention, and FIG. 2 is a schematic block diagram of a subpixel (SP) shown in FIG. 1.

[0035] As illustrated in FIG. 1, the organic electroluminescent display device (100) is configured to include an image processing unit (110), a timing control unit (120), a gate driving unit (130), a data driving unit (140), a power supply unit (180), and a display panel (PAN).

[0036] The image processing unit (110) outputs a driving signal for driving various devices along with image data supplied from the outside. For example, the driving signal output from the image processing unit (110) may include a data enable signal, a vertical synchronization signal, a horizontal synchronization signal, and a clock signal.

[0037] The timing control unit (120) receives image data and a driving signal, etc., from the image processing unit (102). Based on the driving signal input from the image processing unit (110), the timing control unit (120) generates and outputs a gate timing control signal (GDC) for controlling the operation timing of the gate driving unit (130) and a data timing control signal (DDC) for controlling the operation timing of the data driving unit (140).

[0038] The gate driving unit (130) outputs a scan signal to a display panel (PAN) in response to a gate timing control signal (GDC) supplied from the timing control unit (120). The gate driving unit (130) outputs a scan signal through a plurality of gate lines (GL1~GLm). At this time, the gate driving unit (130) may be formed in the form of an IC (Integrated Circuit), but is not limited thereto. In particular, the gate driving unit (130) may be configured as a GIP (Gate In Panel) structure formed by directly stacking thin-film transistors on a substrate inside the organic electroluminescent display device (100). The GIP may include a plurality of circuits such as shift registers and level shifters.

[0039] The data driving unit (140) outputs a data voltage to a display panel (PAN) in response to a data timing control signal (DDC) input from the timing control unit (120). The data driving unit (140) samples and latches a digital data signal (DATA) supplied from the timing control unit (120) and converts it into an analog data voltage based on gamma voltage. The data driving unit (140) outputs a data voltage through a plurality of data lines (DL1~DLn). At this time, the data driving unit (140) may be mounted on the upper surface of the display panel (PAN) in the form of an IC (Integrated Circuit) or may be formed by stacking various patterns and layers directly on the display panel (PAN), but is not limited thereto.

[0040] The power supply unit (180) outputs a high-potential driving voltage (EVDD) and a low-potential driving voltage (EVSS), etc., and supplies them to a display panel (PAN). The high-potential driving voltage (VDD) and the low-potential driving voltage (EVSS) are supplied to the display panel (PAN) through a power line. At this time, the voltage output from the power supply unit (180) may be output to the data driving unit (140) or the gate driving unit (130) and used for driving them.

[0041] The above display panel (PAN) displays an image in response to the data voltage and scan signal supplied from the data driving unit (140) and the gate driving unit (130), and the power supplied from the power supply unit (180).

[0042] The above display panel (PAN) is composed of a plurality of subpixels (SP) to display an actual image. The subpixels (SP) include a red subpixel, a green subpixel, and a blue subpixel, or a white (W) subpixel, a red (R) subpixel, a green (G) subpixel, and a blue (B) subpixel. In this case, the W, R, G, and B subpixels (SP) may all be formed with the same area, but may also be formed with different areas.

[0043] As shown in FIG. 2, one subpixel (SP) can be connected to a gate line (GL1), a data line (DL1), a sensing voltage readout line (SRL1), and a power line (PL1). The number of transistors and capacitors, as well as the driving method of the subpixel (SP), are determined according to the circuit configuration.

[0044] FIG. 3 is a circuit diagram showing a subpixel (SP) of an organic electroluminescent display device (100) according to the present invention.

[0045] As illustrated in FIG. 3, the organic electroluminescent display device (100) according to the present invention includes a gate line (GL), a data line (DL), a power line (PL), and a sensing line (SL) that intersect to define a subpixel (SP), and the subpixel (SP) includes a driving thin-film transistor (DT), an organic light-emitting element (D), a storage capacitor (Cst), a first switching thin-film transistor (ST), and a second switching thin-film transistor (ST2).

[0046] The organic light-emitting device (D) includes an anode electrode connected to a second node (N2), a cathode electrode connected to an input terminal of a low potential driving voltage (EVSS), and an organic light-emitting layer located between the anode electrode and the cathode electrode.

[0047] The driving thin-film transistor (DT) controls the current (Id) flowing through the organic light-emitting diode (D) according to the gate-source voltage (Vgs). The driving thin-film transistor (DT) comprises a gate electrode connected to a first node (N1), a drain electrode connected to a power line (PL) to provide a high potential driving voltage (EVDD), and a source electrode connected to a second node (N2).

[0048] The above storage capacitor (Cst) is connected between the first node (N1) and the second node (N2).

[0049] The first switching thin film transistor (ST1) responds to a gate signal (SCAN) when driving a display panel (PAN) and applies a data voltage (Vdata) charged in the data line (DL) to the first node (N1) to turn on the driving thin film transistor (DT). At this time, the first switching thin film transistor (ST1) has a gate electrode connected to the gate line (GL) to receive a scan signal (SCAN), a drain electrode connected to the data line (DL) to receive a data voltage (Vdata), and a source electrode connected to the first node (N1).

[0050] The second switching thin-film transistor (ST2) stores the source voltage of the second node (N2) in the sensing capacitor (Cx) of the sensing voltage lead-out line (SRL) by switching the current between the second node (N2) and the sensing voltage lead-out line (SRL) in response to the sensing signal (SEN). When driving the display panel (PAN), the second switching thin-film transistor (ST2) resets the source voltage of the driving thin-film transistor (DT) to the initialization voltage (Vpre) by switching the current between the second node (N2) and the sensing voltage lead-out line (SRL) in response to the sensing signal (SEN). At this time, the gate electrode of the second switching thin-film transistor (ST2) is connected to the sensing line (SL), the drain electrode is connected to the second node (N2), and the source electrode is connected to the sensing voltage lead-out line (SRL).

[0051] Meanwhile, although the drawing describes an organic electroluminescent display device with a 3T1C structure including three thin-film transistors and one storage capacitor, the organic electroluminescent display device of the present invention is not limited to this structure and can be applied to various structures such as 4T1C, 5T1C, 6T1C, 7T1C, and 8T1C.

[0052] FIG. 4 is a cross-sectional view of an organic electroluminescent display device according to the first embodiment of the present invention.

[0053] As shown in FIG. 4, a driving thin-film transistor (DT) and a switching thin-film transistor (ST) are arranged on the first substrate (110). At this time, only the driving thin-film transistor (DT) and one switching thin-film transistor (ST) are disclosed in the drawing, but this is for convenience of explanation. In reality, a plurality of switching thin-film transistors (ST) may be arranged on the first substrate (110).

[0054] The above driving thin-film transistor (DT) comprises a first semiconductor layer (114) disposed on a buffer layer (142) formed on a first substrate (110), a gate insulating layer (143) stacked on the buffer layer (142) and covering the first semiconductor layer (114), a first gate electrode (116) disposed on the gate insulating layer (143), an interlayer insulating layer (144) stacked on the gate insulating layer (143) and covering the first gate electrode (116), a storage electrode (118) disposed on the interlayer insulating layer (144), a protective layer (146) stacked on the interlayer insulating layer (144) and covering the storage electrode (118), a first source electrode (122) and a first drain electrode (124) disposed on the protective layer (146).

[0055] The first substrate (110) may be composed of a flexible plastic material. For example, PI (Polyimide), PET (polyethylene terephthalate), PEN (polyethylene naphthalate), PC (polycarbonate), PES (polyethersulfone), PAR (polyarylate), PSF (polysulfone), and COC (ciclic-olefin copolymer) may be used as the first substrate (110). However, the first substrate (110) of the present invention is not limited to such flexible materials and may be composed of a transparent material such as thin glass.

[0056] The buffer layer (142) serves to protect the thin-film transistor formed in the subsequent process from impurities such as alkali ions flowing out from the first substrate (110) or to block moisture that may penetrate from the outside. The buffer layer (142) may be a single layer or multiple layers made of silicon oxide (SiOx) or silicon nitride (SiNx).

[0057] The first semiconductor layer (114) may be composed of an amorphous semiconductor material such as amorphous silicon (a-Si), a crystalline semiconductor material such as polysilicon (p-Si), or an oxide semiconductor such as IGZO (Indium Gallium Zinc Oxide). In this case, the first semiconductor layer (114) is composed of a first channel region (114a) in the central region and a first source region (114b) and a first drain region (114c) which are doping layers on both sides.

[0058] The first gate electrode (116) may be composed of a single layer or multiple layers made of metals such as Cr, Mo, Ta, Cu, Ti, Al, or Al alloy, but is not limited to such materials.

[0059] The above interlayer insulation layer (144) may be composed of a single layer or multiple layers thereof made of inorganic materials such as SiNx or SiOx.

[0060] The storage electrode (118) may be formed of metal, but is not limited thereto.

[0061] The above protective layer (146) may be formed of an organic material such as photoacrylic, but is not limited thereto and may be composed of multiple layers consisting of an inorganic layer and an organic layer.

[0062] The first source electrode (122) and the first drain electrode (124) may be formed as a single layer or multiple layers made of metals such as Cr, Mo, Ta, Cu, Ti, Al, or Al alloy, but are not limited to these materials.

[0063] The first source electrode (122) and the first drain electrode (124) are each ohmic-contacted with the first source region (114b) and the first drain region (114c) of the first semiconductor layer (114) through the first contact hole (149a) and the second contact hole (149b) formed in the gate insulating layer (143), the interlayer insulating layer (144), and the protective layer (146), respectively.

[0064] The above switching thin-film transistor (ST) includes a second semiconductor layer (174) formed on a buffer layer (142), a second gate electrode (176) disposed on a gate insulating layer (143), a second source electrode (182) disposed on a protection layer (146), and a second drain electrode (184).

[0065] The second semiconductor layer (174) may be composed of an amorphous semiconductor material such as amorphous silicon (a-Si), a crystalline semiconductor material such as polysilicon (p-Si), or an oxide semiconductor such as IGZO (Indium Gallium Zinc Oxide). The second semiconductor layer (174) consists of a second channel region (174a) in the central region and a second source region (174b) and a second drain region (174c) which are doping layers on both sides. At this time, the second semiconductor layer (174) may be composed of the same material as the first semiconductor layer (114) of the driving thin-film transistor (DT), but may also be composed of a different material.

[0066] Since the driving thin-film transistor (DT) and the switching thin-film transistor (ST) have different functions, their electrical characteristics for executing these functions may also differ. The driving thin-film transistor (DT) controls the current supplied to the organic light-emitting diode to cause the organic light-emitting layer (134) to emit light, thereby displaying an image. Therefore, for sufficient grayscale expression of the image, the driving thin-film transistor (DT) must have electrical characteristics favorable for grayscale expression. On the other hand, since the switching thin-film transistor (ST) supplies a gate signal to the driving thin-film transistor (DT) to display an image, the switching speed (i.e., the on / off response speed) must be fast to realize a high-quality image.

[0067] In the drawing, the driving thin-film transistor (DT) and the switching thin-film transistor (ST) are formed with the same structure, but the driving thin-film transistor (DT) and the switching thin-film transistor (ST) may be formed with different structures to have different electrical characteristics. Additionally, the driving thin-film transistor (DT) may use a crystalline semiconductor material and the switching thin-film transistor (ST) may use an oxide semiconductor material, or the driving thin-film transistor (DT) and the switching thin-film transistor (ST) may use the same semiconductor material but be given different electrical characteristics by adjusting the aspect (s-factor), etc.

[0068] The second gate electrode (176) may be formed as a single layer or multiple layers made of metals such as Cr, Mo, Ta, Cu, Ti, Al, or an Al alloy, but is not limited to such materials. At this time, the second gate electrode (176) may be formed of the same metal as the first gate electrode (116), but is not limited thereto and may be formed of a different metal. The second storage electrode (178) may be formed of a metal.

[0069] The second source electrode (182) and the second drain electrode (184) may be formed as a single layer or multiple layers of metal such as Cr, Mo, Ta, Cu, Ti, Al, or an Al alloy, but are not limited to these materials. At this time, the second source electrode (182) and the second drain electrode (184) may be composed of the same metal as the first source electrode (122) and the first drain electrode (124), but are not limited to this and may be composed of other metals.

[0070] The second source electrode (182) and the second drain electrode (184) are each ohmic-contacted with the second source region (174b) and the second drain region (174c) of the second semiconductor layer (174) through the third contact hole (149c) and the fourth contact hole (149d) formed in the gate insulating layer (143), the interlayer insulating layer (144), and the protective layer (146), respectively.

[0071] A planarization layer (148) is formed on a substrate (110) on which a driving thin-film transistor (DT) and a switching thin-film transistor (ST) are disposed. The planarization layer (148) may be formed of an organic material such as photoacrylic, but may also be composed of multiple layers consisting of an inorganic layer and an organic layer. A fifth contact hole (249e) is formed in the planarization layer (148).

[0072] On the flattening layer (148), an anode electrode (132) is formed that is electrically connected to the first drain electrode (124) of the driving transistor (DT) through the fifth contact hole (249e). The anode electrode (132) is made of a single layer or multiple layers of a metal such as Ca, Ba, Mg, Al, Ag, etc., or an alloy thereof, and is connected to the first drain electrode (124) of the driving transistor (DT) so that an image signal is applied from the outside.

[0073] A bank layer (152) is formed at the boundary of each subpixel (SP) on the flattening layer (148). The bank layer (152) acts as a partition to divide each subpixel (SP) and prevent light of a specific color output from adjacent pixels from being mixed and output.

[0074] An organic light-emitting layer (134) is formed on the anode electrode (132) and on a portion of the inclined surface of the bank layer (152). The organic light-emitting layer (134) may be an R-organic light-emitting layer that emits red light, a G-organic light-emitting layer that emits green light, and a B-organic light-emitting layer that emits blue light, formed on R, G, and B pixels. Additionally, the organic light-emitting layer (134) may be a W-organic light-emitting layer that emits white light.

[0075] In addition to the light-emitting layer (134), the above organic light-emitting layer may also have an electron injection layer and a hole injection layer that respectively inject electrons and holes into the light-emitting layer, and an electron transport layer and a hole transport layer that respectively transport the injected electrons and holes into the organic layer.

[0076] A cathode electrode (136) is formed on the above organic light-emitting layer (134). The cathode electrode (136) may be made of a transparent conductive material such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide) or a thin metal that transmits visible light, but is not limited thereto.

[0077] A sealing layer (162) is formed on the cathode electrode (136). The sealing layer (162) may be composed of a single layer of an inorganic layer, a two-layer structure of an inorganic layer and an organic layer, or a three-layer structure of an inorganic layer, an organic layer, and an inorganic layer. The inorganic layer may be composed of inorganic materials such as SiNx and SiX, but is not limited thereto. Additionally, the organic layer may be composed of organic materials such as polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyimide, polyethylene sulfonate, polyoxymethylene, and polyarylate, or a mixture thereof, but is not limited thereto.

[0078] A second substrate (170) is placed on the above-mentioned sealing layer (162) and attached by an adhesive layer (not shown in the drawing). Any material with good adhesion, heat resistance, and water resistance may be used as the adhesive layer, but in the present invention, a thermosetting resin such as an epoxy compound, an acrylate compound, or an acrylic rubber may be used. Additionally, a photocurable resin may be used as the adhesive, in which case the adhesive layer is cured by irradiating the adhesive layer with light such as ultraviolet light.

[0079] The adhesive layer can not only bond the first substrate (110) and the second substrate (170) but also serve as a sealant to prevent moisture from penetrating into the electroluminescent display device.

[0080] The second substrate (170) above is an encapsulation cap for encapsulating an electroluminescent display device, and may use a protective film such as a PS (Polystyrene) film, PE (Polyethylene) film, PEN (Polyethylene Naphthalate) film or PI (Polyimide) film, and may also use thin glass.

[0081] The organic electroluminescent display device described above is fabricated on a support substrate (180). That is, after attaching a first substrate (110) to the support substrate (180) by means of a sacrificial layer (182), a driving thin-film transistor (DT), a switching thin-film transistor (ST), and an organic light-emitting element are stacked on the first substrate (110).

[0082] The above-mentioned support substrate (180) may be composed of glass or the like, but is not limited thereto. Additionally, the above-mentioned sacrificial layer (182) may be composed of amorphous silicon, but is not limited thereto; polymers such as polyimide, metals, adhesives, etc. may also be used.

[0083] When the first substrate (110) is made of a plastic material, the first substrate (110) can be formed into a film shape and attached to a supporting substrate (180) by a sacrificial layer (182). Additionally, the substrate (110) can be applied in a liquid state onto the sacrificial layer (182) and then cured.

[0084] First and second aging voltage lines (186a, 186b) are formed on the upper surface of the support substrate (180), and a sacrificial layer (182) is formed on the support substrate (180) to cover the first and second aging voltage lines (186a, 186b). Additionally, a sixth contact hole (149f) is formed in the sacrificial layer (182), the first substrate (110), the buffer layer (142), and the gate insulating layer (143), and a first aging voltage supply line (188a) is formed inside the sixth contact hole (149f) so as to electrically connect the first aging voltage line (186a) and the first gate electrode (116), thereby supplying the aging voltage applied to the first aging voltage line (186a) to the first gate electrode (116). At this time, for convenience of explanation in the drawing, the first gate electrode (116) is shown as being formed as two separate parts, but the two first gate electrodes (116) are formed as a single unit.

[0085] The first aging voltage supply wiring (188a) is composed of metal and may be formed of the same metal as the first gate electrode (116), but may also be formed of a different metal.

[0086] Additionally, a seventh contact hole (149g) is formed in the sacrificial layer (182), the first substrate (110), the buffer layer (142), the gate insulating layer (143), the interlayer insulating layer (144), and the protective layer (146), and a second aging voltage supply wire (188b) is formed inside the seventh contact hole (149g) so that the second aging voltage wire (186b) and the first drain electrode (124) are electrically connected, thereby supplying the aging voltage applied to the second aging voltage wire (186b) to the first drain electrode (124).

[0087] The second aging voltage supply wiring (188b) is made of metal and may be formed of the same metal as the first drain electrode (124), but may also be formed of a different metal.

[0088] The first and second aging voltage wires (186a, 186b) are electrically connected to the first gate electrode (116) and the first drain electrode (124) through the first and second aging voltage supply wires (188a, 188b), respectively, to apply an aging voltage to the driving thin film transistor (DT).

[0089] Generally, when a thin-film transistor is operated at room temperature for a long time, leakage current is generated by mobile electrons at the PN junction, and due to this leakage current, afterimages occur on the screen when driving an organic electroluminescent display.

[0090] In the present invention, by applying an aging voltage to the driving thin film transistor (DT) through the first and second aging voltage lines (186a, 186b) to age the driving thin film transistor (DT), leakage current can be reduced.

[0091] In particular, in the present invention, first and second aging voltage lines (186a, 186b) are formed on the lower part of the first substrate (110), and the first and second aging voltage lines (186a, 186b) are directly connected to the first gate electrode (116) and the first drain electrode (124) of the driving thin film transistor (DT), respectively, through the first and second aging voltage supply lines (188a, 188b), so that the driving thin film transistor (DT) is aged by directly supplying an aging voltage to the driving thin film transistor (DT). Below, the reason for forming separate first and second aging voltage lines (186a, 186b) and first and second aging voltage supply lines (188a, 188b) to directly apply an aging voltage to the driving thin film transistor (DT) is explained in detail.

[0092] Although thin-film transistor aging can be performed on all thin-film transistors placed in an organic electroluminescent display, it may also be performed only on the driving thin-film transistor (DT), which substantially determines the image quality of the organic electroluminescent display; therefore, a method for aging the driving thin-film transistor (DT) is described below.

[0093] Referring again to FIG. 3, conventional aging is performed by applying an aging voltage to the gate electrode and drain electrode of the driving thin-film transistor (DT), respectively, through the data line (DL) and power line (PL). In the conventional aging method, since the aging voltage is supplied through the data line (DL) and power line (PL), the aging voltage is applied to the driving thin-film transistor (DT) via the first switching thin-film transistor (ST1).

[0094] Therefore, since the aging voltage is applied not only to the thin-film transistor to be aged but also to other thin-film transistors, the applied aging voltage not only alters the electrical characteristics of other thin-film transistors but even causes defects in other thin-film transistors. For example, a difference in on-current occurs during the operation of other thin-film transistors, leading to a problem where the corresponding thin-film transistors burn out.

[0095] These problems occur more frequently as the number of thin-film transistors increases. That is, as the organic electroluminescent display device becomes structured as 4T1C, 5T1C, 6T1C, 7T1C, and 8T1C, the number of thin-film transistors to which aging voltage is applied increases, and thus the number of thin-film transistors whose electrical characteristics change or become defective increases, thereby increasing the likelihood that the organic electroluminescent display device will become defective.

[0096] In the present invention, the aging voltage is not applied through the data line (DL) and the power line (PL), but is directly supplied to the driving thin-film transistor (DT) through the first and second aging voltage lines (186a, 186b) and the first and second aging voltage supply lines (188a, 188b), so that other thin-film transistors are not affected by the aging voltage. Therefore, it is possible to prevent problems such as burning caused by the application of the aging voltage.

[0097] FIG. 5 is a plan view schematically showing the structure of the first and second aging voltage wiring (186a, 186b) according to the present invention.

[0098] As shown in FIG. 5, the first and second aging voltage lines (186a, 186b) are each arranged in a plurality in the horizontal direction and are electrically connected to the first and second aging voltage supply lines (188a, 188b) of each subpixel (SP).

[0099] Each of the plurality of first and second aging voltage wires (186a, 186b) is connected to the first and second connecting wires (185a, 185b), and the first and second aging pads (187a, 187b) are formed on each of the first and second connecting wires (185a, 185b). An aging voltage application means, such as a probe, is in contact with the first and second aging pads (187a, 187b) so that an aging voltage is applied from the outside. The aging voltage applied to each of the first and second aging pads (187a, 187b) is transmitted through a plurality of first and second aging voltage wires (186a, 186b) and applied to the first gate electrode (116) and the second drain electrode (124) of the driving thin film transistor (DT) through the first and second aging voltage supply wires (188a, 188b).

[0100] In this way, in the present invention, by applying an aging voltage to each of the first and second aging pads (187a, 187b), the aging voltage can be simultaneously supplied to the driving thin film transistor (DT) of the entire display device (100), thereby enabling rapid and accurate aging.

[0101] In the drawing, two first and second aging pads (187a, 187b) are formed on each of the first and second connecting wires (185a, 185b), but the first and second aging pads (187a, 187b) may be formed one each or three or more. For example, when the area of ​​the display device is small, the aging voltage can be supplied to the driving thin-film transistors (DT) of all subpixels without delay even if only one first and second aging pad (187a, 187b) is formed. In addition, when the area of ​​the display device increases, the aging voltage is supplied to the driving thin-film transistors (DT) of all subpixels by increasing the number of the first and second aging pads (187a, 187b).

[0102] In addition, although the first and second aging pads (187a, 187b) are formed in a rectangular shape in the drawing, the first and second aging pads (187a, 187b) can be formed in various shapes. Also, various methods can be used for applying an aging voltage to the first and second aging pads (187a, 187b).

[0103] In addition, in the drawing, the first and second connecting wires (185a, 185b) are each extended in the vertical direction (y-direction) from opposite sides and the plurality of first and second aging voltage wires (186a, 186b) are each extended in the horizontal direction (x-direction), but the first and second connecting wires (185a, 185b) may each be extended in the horizontal direction (x-direction) from opposite sides and the plurality of first and second aging voltage wires (186a, 186b) may each be extended in the vertical direction (y-direction).

[0104] Meanwhile, as will be explained in detail later, the support substrate (180) is separated from the first substrate (110), and at this time, the first and second aging voltage wiring (186a, 186b) are also separated and removed, and only the first and second aging voltage supply wiring (188a, 188b) remain on the lower surface of the first substrate (110).

[0105] FIG. 6 is a diagram showing the electrical characteristics of a driving thin-film transistor (DT) manufactured according to the present invention.

[0106] In FIG. 6, the straight line represents the current of the driving thin-film transistor (DT) when not aged, and the dotted line represents the current of the aged driving thin-film transistor (DT). As shown in FIG. 6, the driving thin-film transistor (DT) according to the present invention has a reduced off-current as aging progresses, and as a result of this reduction in off-current, the occurrence of leakage current in the driving thin-film transistor (DT) can be prevented, thereby preventing image quality defects such as afterimages.

[0107] FIGS. 7a-7i are drawings illustrating a method for manufacturing an organic electroluminescent display device according to the present invention.

[0108] First, as shown in FIG. 7a, a metal is deposited and etched by sputtering on a hard and transparent support substrate (180), such as glass, to form a plurality of first and second aging voltage lines (186a, 186b) arranged in the horizontal direction (x-direction) or the vertical direction (y-direction). Subsequently, a sacrificial layer (182) made of amorphous silicon is formed over the entire support substrate (180) by a Chemical Vapor Deposition (CVD) method, and then a first substrate (110) is formed.

[0109] At this time, the first substrate (110) may be formed by attaching a plastic film made of plastic materials such as PI (Polyimide), PET (polyethylene terephthalate), PEN (polyethylene naphthalate), PC (polycarbonate), PES (polyethersulfone), PAR (polyarylate), PSF (polysulfone), COC (ciclic-olefin copolymer) onto the sacrificial layer (182), or by applying a liquid phase of the plastic material and then curing it.

[0110] Next, as shown in FIG. 7b, a first lower blocking metal layer (BSM_1) and a second lower blocking metal layer (BSM_2) are formed by stacking and etching metals by sputtering, and then a buffer layer (142) is formed by stacking inorganic materials such as SiOx or SiNx in a single layer or multiple layers by a CVD (Chemical Vapor Deposition) method or the like.

[0111] Then, as shown in FIG. 7c, an oxide semiconductor such as IGZO, an amorphous semiconductor such as amorphous silicon (a-Si), and a crystalline semiconductor such as polysilicon (p-Si) are stacked and etched on the buffer layer (142) to form a first semiconductor layer (114) and a second semiconductor layer (174). At this time, impurities are doped into both sides of the first semiconductor layer (114) and the second semiconductor layer (174) to form first and second channel regions (114a, 174a), first and second source regions (114b, 174b), and first and second drain regions (114c, 174c). Subsequently, an inorganic material such as SiOx or SiNx is stacked as a single layer or multiple layers on the semiconductor layer (114) by the CVD method to form a gate insulating layer (143).

[0112] Subsequently, as illustrated in FIG. 7d, a metal is stacked and etched on the gate insulating layer (143) to form a first gate electrode (116) and a second gate electrode (176). Then, a sacrificial layer (182), a first substrate (110), a buffer layer (142), and a gate insulating layer (143) are etched to form a sixth contact hole (146f). Afterward, a metal is stacked and etched to form the first gate electrode (116), the second gate electrode (176), and a first aging voltage supply line (188a). That is, the first aging voltage supply line (188a) can be formed simultaneously with the first gate electrode (116) and the second gate electrode (176) by stacking the metal for the gate electrode up to the inside of the sixth contact hole (146f).

[0113] However, the first aging voltage supply line (188a) may be formed by a process different from that of the first gate electrode (116) and the second gate electrode (176). That is, after forming the first aging voltage supply line (188a) by stacking metal inside the sixth contact hole (146f), the first gate electrode (116) and the second gate electrode (176) may be formed by stacking and etching metal by a different process.

[0114] After that, an interlayer insulating layer (144) consisting of a single layer or multiple layers is formed by stacking inorganic materials, and then a metal is stacked on top of it and etched to form a storage electrode (118).

[0115] Next, as illustrated in FIG. 7e, after forming a protective layer (146) by stacking organic materials, the gate insulating layer (143), interlayer insulating layer (144), and protective layer (146) above the first source region (114b) and drain region (114c) of the first semiconductor layer (114) and the second source region (174b) and second drain region (174c) of the second semiconductor layer (174) are etched to form first, second, third, and fourth contact holes (149a, 149b, 149c, 149d), and the sacrificial layer (182), first substrate (110), buffer layer (142), gate insulating layer (143), interlayer insulating layer (144), and protective layer (146) above the second aging voltage supply wiring (188b) are etched. A seventh contact hole (149g) is formed. Then, a metal is deposited on the protective layer (146) and etched to form a first source electrode (122), a first drain electrode (124), a second source electrode (182), a second drain electrode (184), and a second aging voltage supply wire (188b), thereby forming a driving thin film transistor (DT) and a switching thin film transistor (ST).

[0116] At this time, the second aging voltage supply wiring (188b) can be formed simultaneously with the first source electrode (122), the first drain electrode (124), the second source electrode (182), and the second drain electrode (184) by stacking the metal for the source electrode and the drain electrode up to the inside of the sixth contact hole (146f).

[0117] However, the second aging voltage supply wiring (188b) may be formed by a different process than the first source electrode (122), the first drain electrode (124), the second source electrode (182), and the second drain electrode (184). That is, after forming the second aging voltage supply wiring (188b) by stacking metal inside the seventh contact hole (146g), the first source electrode (122), the first drain electrode (124), the second source electrode (182), and the second drain electrode (184) may be formed by stacking and etching metal by a different process.

[0118] Next, as shown in FIG. 7f, a transparent conductive material such as ITO or IZO is laminated and etched onto a protective layer (146) on which a driving thin-film transistor (DT) and a switching thin-film transistor (ST) are formed to form a cathode electrode (132). At this time, the cathode electrode (132) is electrically connected to the first drain electrode (124) of the driving thin-film transistor (DT) through the sixth contact hole (149f) formed in the protective layer (146).

[0119] After that, a bank layer (152) having an opening is formed on a protective layer (148) on which a cathode electrode (132) is formed, and then an organic light-emitting material is applied to the opening of the bank layer (152) to form an organic light-emitting layer (134). Subsequently, a metal is deposited over the entire upper area of ​​the organic light-emitting layer (134) to a thickness of several tens of nanometers by sputtering and etched to form an anode electrode (136).

[0120] After that, an encapsulation layer (162) is formed by laminating inorganic materials such as SiNx and SiX and organic materials such as polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyimide, polyethylene sulfonate, polyoxymethylene, and polyarylate onto the anode electrode (136). Subsequently, an adhesive layer (not shown in the drawing) is applied onto the encapsulation layer (162), a second substrate (170) is placed thereon, and then the adhesive layer is cured.

[0121] Next, as shown in FIG. 7g, the driving thin film transistor is aged by applying an aging voltage to the first and second aging voltage lines (186a, 186b) and applying an aging voltage to the first gate electrode (116) and the first drain electrode (124) through the first and second aging voltage supply lines (188a, 188b).

[0122] After that, as shown in FIG. 7h, a laser is irradiated from the support substrate (180) side to separate the support substrate (180) from the first substrate (110). When the laser is irradiated, light is transmitted through the transparent support substrate (180) to the sacrificial layer (182), and at the interface between the sacrificial layer (182) and the first substrate (110), the uniformity of the interface of the sacrificial layer (182) decreases or hydrogen is generated, thereby weakening the bonding energy of the interface and separating the support substrate (180) from the first substrate (110).

[0123] At this time, heat may be applied to the sacrificial layer (182) to weaken the bonding energy of the sacrificial layer (182).

[0124] Next, as illustrated in FIG. 7i, a sealing layer (189) is formed to seal the first and second aging voltage supply lines (188a, 188b) that are exposed to the lower surface of the first substrate (110) due to the separation of the support substrate (180). By the sealing layer (189), the exposed first and second aging voltage supply lines (188a, 188b) are blocked from the outside, thereby preventing moisture or foreign substances from penetrating into the organic electroluminescent display device through the first and second aging voltage supply lines (188a, 188b).

[0125] The sealing layer (189) may be formed by laminating inorganic materials such as SiNx and SiX, or by laminating organic materials such as polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyimide, polyethylene sulfonate, polyoxymethylene, and polyarylate. Additionally, the sealing layer (189) may be formed by welding.

[0126] At this time, as shown in the drawing, the sealing layer (189) may be formed only in the area where the first and second aging voltage supply lines (188a, 188b) on the lower surface of the first substrate (110) are exposed (thus, the sealing layer (189) is formed in the number of first and second aging voltage supply lines (188a, 188b) of the first substrate (110)), or it may be formed over the entire lower surface of the first substrate (110).

[0127] As described above, in the present invention, by aging the driving thin-film transistor (DT), leakage current can be prevented, thereby preventing defects such as afterimages from occurring in the organic electroluminescent display device.

[0128] In addition, in the present invention, the aging voltage for aging is not applied through the data line and power line, but by forming a separate aging voltage wiring and an aging voltage supply wiring, the aging voltage is applied directly to the gate electrode and drain electrode of the driving thin film transistor, thereby preventing other thin film transistors from being affected by the aging voltage.

[0129] FIG. 8 is a cross-sectional view of an organic electroluminescent display device according to a second embodiment of the present invention. In this case, the description of the same components as those in FIG. 4 of the first embodiment is omitted or brief, and only the different components are described in detail.

[0130] As illustrated in FIG. 8, in the display device of this embodiment, first and second aging voltage lines (286a, 286b) are formed on the upper surface of the support substrate (280), and a first gate electrode (216) and a metal pattern (216a) are formed on the gate insulating layer (243). The metal pattern (216a) is formed at a certain distance from the first gate electrode (216) so as to be electrically insulated from each other. The metal pattern (216a) may be composed of the same metal by the same process as the first gate electrode (216), but is not limited thereto and may be formed by a different process.

[0131] A sixth contact hole (249f) is formed in the sacrificial layer (282), the first substrate (210), the buffer layer (242), and the gate insulating layer (243), and a first aging voltage supply wire (288a) is formed inside the sixth contact hole (249f) so that the aging voltage applied to the first aging voltage wire (286a) is supplied to the first gate electrode (216) by electrically connecting the first aging voltage wire (286a). At this time, for convenience of explanation, the drawing shows the first gate electrode (216) formed as two separate parts, but the two first gate electrodes (216) are formed as a single unit.

[0132] A seventh contact hole (249g) is formed in the sacrificial layer (282), the first substrate (210), the buffer layer (242), and the gate insulation layer (243), and a second aging voltage supply wire (288b) is formed inside the seventh contact hole (249g) to electrically connect the second aging voltage wire (286b) and the metal pattern (216a).

[0133] An eighth contact hole (249h) is formed in the insulating layer (244) and the protective layer (246), and a third aging voltage supply wire (188c) is formed inside the eighth contact hole (149h) to electrically connect the metal pattern (216a) and the first drain electrode (124).

[0134] Accordingly, the second aging voltage wiring (286b) is electrically connected to the first drain electrode (124) through the second aging voltage supply wiring (188b), the metal pattern (216a), and the third aging voltage supply wiring (188c), so that the aging voltage applied to the second aging voltage wiring (186b) is supplied to the first drain electrode (124).

[0135] The first aging voltage supply line (288a) may be composed of the same material as the gate electrode (216), but is not limited thereto and may be composed of different materials. Additionally, the second aging voltage supply line (288b) may be composed of the same material as the metal pattern (216a) and the gate electrode (216), but is not limited thereto and may be composed of different materials. Furthermore, the third aging voltage supply line (288c) may be composed of the same material as the drain electrode (224), but is not limited thereto and may be composed of different materials.

[0136] In this embodiment as well, first and second aging voltage lines (286a, 286b) are formed on the lower part of the first substrate (210), and the first aging voltage line (286a) is directly connected to the first gate electrode (216) of the driving thin film transistor (DT) through the first aging voltage supply line (288a), and the second aging voltage line (286b) is directly connected to the first gate electrode (216) of the driving thin film transistor (DT) through the second aging voltage supply line (288b), the metal pattern (216a), and the third aging voltage supply line (288c), thereby directly supplying an aging voltage to the driving thin film transistor (DT) to enable aging of the driving thin film transistor (DT).

[0137] The features, structures, effects, etc. described in the examples of the present application described above are included in at least one example of the present application and are not necessarily limited to only one example. Furthermore, the features, structures, effects, etc. exemplified in at least one example of the present application may be combined or modified and implemented in other examples by a person skilled in the art to which the present application pertains. Accordingly, details regarding such combinations and modifications should be interpreted as being included within the scope of the present application.

[0138] It will be obvious to those skilled in the art that the present application described above is not limited to the aforementioned embodiments and attached drawings, and that various substitutions, modifications, and changes are possible within the scope of the technical aspects of the present application. Therefore, the scope of the present application is defined by the claims set forth below, and all modifications or variations derived from the meaning and scope of the claims and equivalent concepts thereof should be interpreted as being included within the scope of the present application. Explanation of the symbols

[0139] 110,170 : Substrate 142 : Buffer layer 114,174 : Semiconductor layer 122 : Source electrode 124: Drain electrode 132: Anode electrode 134: Organic light-emitting layer 136: Cathode electrode 180: Support substrate 182: Sacrificial layer 186a, 186b: Aging wiring 188a, 188b: Aging voltage supply wiring DT: Driving thin-film transistor ST: Switching thin-film transistor

Claims

Claim 1 An organic electroluminescent display device comprising: a first substrate including a plurality of subpixels; at least one thin-film transistor and an organic light-emitting element disposed in each subpixel on the first substrate; an encapsulation layer disposed on the upper portion of the first substrate; a second substrate disposed on the encapsulation layer; and an aging voltage supply wiring directly connected to the thin-film transistors and simultaneously directly supplying an aging voltage to the thin-film transistors disposed in all of the plurality of subpixels. Claim 2 An organic electroluminescent display device according to claim 1, wherein the thin-film transistor comprises: a semiconductor layer formed on a buffer layer disposed on the first substrate; a gate insulating layer disposed on the semiconductor layer; a gate electrode disposed on the gate insulating layer; an interlayer insulating layer disposed on the gate electrode; and a source electrode and a drain electrode disposed on the interlayer insulating layer. Claim 3 An organic electroluminescent display device according to claim 2, wherein the aging voltage supply wiring comprises: a first aging voltage supply wiring formed in a first contact hole formed in the first substrate and the gate insulating layer and connected to the gate electrode to directly supply the aging voltage to the gate electrode; and a second aging voltage supply wiring formed in a second contact hole formed in the first substrate, the gate insulating layer, and the interlayer insulating layer and connected to the drain electrode to directly supply the aging voltage to the drain electrode. Claim 4 An organic electroluminescent display device according to claim 3, characterized in that the first aging voltage supply wiring is made of the same material as the gate electrode. Claim 5 An organic electroluminescent display device according to claim 3, characterized in that the second aging voltage supply wiring is made of the same material as the drain electrode. Claim 6 An organic electroluminescent display device according to claim 2, further comprising a metal pattern formed on the gate insulating layer. Claim 7 An organic electroluminescent display device according to claim 6, wherein the aging voltage supply wiring comprises: a first aging voltage supply wiring formed in a first contact hole formed in the first substrate and the gate insulating layer and electrically connected to the gate electrode to directly supply the aging voltage to the gate electrode; a second aging voltage supply wiring formed in a second contact hole formed in the first substrate and the gate insulating layer and electrically connected to the metal pattern; and a third aging voltage supply wiring formed in a third contact hole formed in the interlayer insulating layer, electrically connecting the metal pattern to the drain electrode to directly supply the aging voltage to the drain electrode through the metal pattern. Claim 8 An organic electroluminescent display device according to claim 7, characterized in that the first aging voltage supply wiring is made of the same material as the gate electrode. Claim 9 An organic electroluminescent display device according to claim 7, characterized in that the second aging voltage supply wiring and the metal pattern are made of the same material as the gate electrode. Claim 10 An organic electroluminescent display device according to claim 7, characterized in that the third aging voltage supply wiring is made of the same material as the drain electrode. Claim 11 An organic electroluminescent display device according to claim 1, characterized in that the aging voltage supply wiring is exposed to the outside through the lower surface of the first substrate. Claim 12 An organic electroluminescent display device according to claim 11, further comprising a sealing layer that seals the aging voltage supply wiring formed on the lower surface of the first substrate and exposed to the outside. Claim 13 An organic electroluminescent display device according to claim 12, wherein the sealing layer is formed to cover only the aging voltage supply wiring exposed to the first substrate. Claim 14 In claim 12, the above sealing layer is formed over the entire lower surface of the first substrate in an organic electroluminescent display device. Claim 15 A method for manufacturing an organic electroluminescent display device comprising the steps of: preparing a support substrate having an aging voltage wiring formed thereon; forming a sacrificial layer on the support substrate; placing a first substrate including a plurality of subpixels on the sacrificial layer; forming at least one thin-film transistor and an organic light-emitting element in the subpixels of the first substrate and connecting the aging voltage wiring to the thin-film transistors placed across the plurality of subpixels via an aging voltage supply wiring; forming an encapsulation layer on the thin-film transistors and the organic light-emitting element and attaching a second substrate; aging the thin-film transistors by simultaneously and directly applying an aging voltage to the thin-film transistors placed across the plurality of subpixels through the aging voltage wiring and the aging voltage supply wiring; and separating the support substrate from the first substrate. Claim 16 A method for manufacturing an organic electroluminescent display device according to claim 15, characterized in that an aging pad is formed at the end of the aging voltage wiring. Claim 17 In claim 16, the step of aging the thin-film transistor further comprises the step of applying the aging voltage by contacting a probe to the aging pad. A method for manufacturing an organic electroluminescent display device. Claim 18 A method for manufacturing an organic electroluminescent display device according to claim 15, wherein the step of forming the thin-film transistor comprises: forming a buffer layer disposed on the first substrate; forming a semiconductor layer on the buffer layer; forming a gate insulating layer on the semiconductor layer; forming a gate electrode on the gate insulating layer; forming an interlayer insulating layer on the gate electrode; and forming a source electrode and a drain electrode on the interlayer insulating layer. Claim 19 A method for manufacturing an organic electroluminescent display device according to claim 18, wherein the step of connecting the aging voltage wiring to the thin-film transistor by the aging voltage supply wiring comprises: a step of forming a first contact hole in the sacrificial layer, the first substrate, and the gate insulating layer below the gate electrode, and then forming a first aging voltage supply wiring inside the first contact hole; and a step of forming a second contact hole in the sacrificial layer, the first substrate, the gate insulating layer, and the interlayer insulating layer below the drain electrode, and then forming a second aging voltage supply wiring inside the second contact hole. Claim 20 A method for manufacturing an organic electroluminescent display device according to claim 18, wherein the step of connecting the aging voltage wiring to the thin-film transistor by the aging voltage supply wiring comprises: forming a first contact hole in the sacrificial layer, the first substrate, and the gate insulating layer below the gate electrode, and then forming a first aging voltage supply wiring inside the first contact hole; forming a second contact hole in the sacrificial layer, the first substrate, and the gate insulating layer below the metal pattern formed in the gate insulating layer, and then forming a second aging voltage supply wiring inside the second contact hole; and forming a third contact hole in the interlayer insulating layer below the drain electrode, and then forming a third aging voltage supply wiring inside the third contact hole to electrically connect the drain electrode and the metal pattern. Claim 21 A method for manufacturing an organic electroluminescent display device according to claim 15, wherein the step of separating the support substrate from the first substrate includes the step of irradiating a laser or applying heat to the sacrificial layer.

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