Electronic apparatus for manufacturing process of electronic circuit and method thereof

Abstract

The present disclosure relates to an electronic device and a method for a manufacturing process of an electronic circuit, wherein the method comprises the steps of forming a semiconductor layer using epitaxial growth on a substrate, depositing a dielectric film on the semiconductor layer, depositing a metal layer for grounding on the dielectric film, bonding one side of the metal layer onto a carrier wafer, removing the substrate, and manufacturing the at least one component from the semiconductor layer, wherein when the at least one component is manufactured from a structure comprising a first layer and a second layer formed on the first layer, the semiconductor layer is formed to include the second layer formed on the substrate and the first layer formed on the second layer.

Description

Technology Field

[0001] The present disclosure relates to semiconductor manufacturing process technology, and more specifically, to an electronic device and method for a manufacturing process of a high-frequency electronic circuit. Background Technology

[0002] In manufacturing high-frequency electronic circuits, it is necessary to position the ground appropriately close to the transmission line to minimize signal loss caused by the substrate. Conventional high-frequency electronic circuit manufacturing processes adopt a method in which components are manufactured on the front surface of a wafer, the processed wafer is bonded to a carrier wafer, the substrate is thinned to a desired thickness, and a metal is deposited on the thinned substrate to realize the desired structure. However, conventional high-frequency electronic circuit manufacturing processes have the problem that it is difficult to make the wafer sufficiently thin to the desired level, and physical damage may occur during the process of debonding the thinned wafer or proceeding with subsequent processes.

[0003] In this regard, reference may be made to Korean Registered Patent Publication 10-0332107B1 and Korean Published Patent Publication 10-2004-0015651A. The problem to be solved

[0004] The present disclosure aims to provide an electronic device and a method for a manufacturing process of a high-frequency electronic circuit.

[0005] The present disclosure aims to provide an electronic device and a method for performing a manufacturing process of a high-frequency electronic circuit by growing an epitaxial wafer such that a plurality of electrically operating layers within the device are formed in an inverted form.

[0006] The present disclosure aims to provide an electronic device and a method for performing a manufacturing process of a high-frequency electronic circuit such that a ground is formed at a position sufficiently close to an active layer.

[0007] The problems that this disclosure aims to solve are not limited to those described above, and other unmentioned problems will be clearly understood by a person skilled in the art from the description below. means of solving the problem

[0008] A method for manufacturing a high-frequency electronic circuit comprising at least one component according to one embodiment of the present disclosure, the method comprises the steps of forming a semiconductor layer using epitaxial growth on a substrate, depositing a dielectric film on the semiconductor layer, depositing a metal layer for grounding on the dielectric film, bonding one side of the metal layer onto a carrier wafer, removing the substrate, and manufacturing the at least one component from the semiconductor layer, wherein, when the first component is manufactured from a first structure comprising a first layer and a second layer formed on the first layer, the semiconductor layer may be formed to include the second layer formed on the substrate and the first layer formed on the second layer.

[0009] In addition, the above at least one component may include a HEMT (High Electron Mobility Transistor) device.

[0010] Additionally, the HEMT device may be manufactured from a second structure comprising a third layer, a fourth layer formed on the third layer, a fifth layer formed on the fourth layer, and a sixth layer formed on the fifth layer, and the semiconductor layer may be formed to include the sixth layer formed on the substrate, the fifth layer formed on the sixth layer, the fourth layer formed on the fifth layer, and the third layer formed on the fourth layer, wherein the third layer is formed to include n+ InGaAs(n+ Indium Gallium Arsenide), the fifth layer is formed to include InGaAs(Indium Gallium Arsenide), and the sixth layer may be formed to include at least one of InAlAs(Indium Aluminum Arsenide) and AlGaAs(Aluminium Gallium Arsenide).

[0011] In addition, the fourth layer may include an n-type doping portion for supplying a carrier to the fifth layer.

[0012] In addition, the dielectric film may include at least one of BCB (Benzo cyclobuene) and SOG (Spin on glass).

[0013] In addition, the thickness of the dielectric film can be determined in correspondence with the target frequency.

[0014] In addition, the step of removing the substrate may be performed based on at least one of a dry etching method, a wet etching method, and a Chemical Mechanical Polishing (CMP) method.

[0015] Additionally, the method may further include the step of arranging at least one line that implements an electrical connection to at least one component and at least a portion of the metal layer.

[0016] An electronic device for controlling a process facility for manufacturing a high-frequency electronic circuit including at least one component according to an embodiment of the present disclosure, wherein the electronic device includes a memory including instructions and at least one processor connected to the memory, and wherein the at least one processor controls the process facility to form a semiconductor layer using epitaxial growth on a substrate, deposit a dielectric film on the semiconductor layer, deposit a metal layer for grounding on the dielectric film, bond one side of the metal layer onto a carrier wafer, remove the substrate, and manufacture the at least one component from the semiconductor layer, wherein when the at least one component is manufactured from a structure including a first layer and a second layer formed on the first layer, the semiconductor layer may be formed to include the second layer formed on the substrate and the first layer formed on the second layer.

[0017] A computer program stored in a computer-readable storage medium according to an embodiment of the present disclosure, wherein the computer program, when executed on at least one processor, controls a process facility for manufacturing a high-frequency electronic circuit to perform the following operations to manufacture a high-frequency electronic circuit comprising at least one component, wherein the operations include forming a semiconductor layer using epitaxial growth on a substrate, depositing a dielectric film on the semiconductor layer, depositing a metal layer for grounding on the dielectric film, bonding one side of the metal layer onto a carrier wafer, removing the substrate, and manufacturing the at least one component from the semiconductor layer, wherein when the at least one component is manufactured from a structure comprising a first layer and a second layer formed on the first layer, the semiconductor layer may be formed to include the second layer formed on the substrate and the first layer formed on the second layer. Effects of the invention

[0018] According to the present disclosure, the stability of the process can be improved by excluding the debonding process during the manufacturing process of a high-frequency electronic circuit.

[0019] According to the present disclosure, the distance between the ground and the component can be easily adjusted during the manufacturing process of a high-frequency electronic circuit, and the ground and the component can be positioned closer together.

[0020] The effects according to the present disclosure are not limited to those described above, and other unmentioned effects will be clearly understood by a person skilled in the art from the description below. Brief explanation of the drawing

[0021] FIG. 1 is a block diagram illustrating a manufacturing process system for a high-frequency electronic circuit according to an embodiment of the present disclosure. FIG. 2 is a drawing for explaining the initial state of a wafer provided for manufacturing a high-frequency electronic circuit according to an embodiment of the present disclosure. FIG. 3 is a drawing for explaining a deposition process performed to manufacture a high-frequency electronic circuit according to an embodiment of the present disclosure. FIG. 4 is a drawing for explaining a bonding process performed to manufacture a high-frequency electronic circuit according to an embodiment of the present disclosure. FIG. 5 is a drawing illustrating an etching process performed to manufacture a high-frequency electronic circuit according to an embodiment of the present disclosure. FIG. 6 is a drawing for explaining the process of manufacturing a component according to an embodiment of the present disclosure. FIG. 7 is a drawing for showing a high-frequency electronic circuit manufactured according to an embodiment of the present disclosure. FIG. 8 is a flowchart for explaining a manufacturing process method of a high-frequency electronic circuit according to an embodiment of the present disclosure. Specific details for implementing the invention

[0022] Hereinafter, exemplary embodiments according to the present invention will be described in detail with reference to the contents described in the attached drawings. However, the present invention is not limited or restricted by exemplary embodiments. Unless otherwise defined, all terms used in this specification (including technical and scientific terms) shall be used in a meaning that is commonly understood by those skilled in the art to which this disclosure belongs, but this may vary depending on the intent of those skilled in the art, case law, the emergence of new technology, etc.

[0023] Furthermore, terms defined in commonly used dictionaries are not to be interpreted ideally or excessively unless explicitly and specifically defined otherwise. In certain cases, terms have been selected at the applicant's discretion, and in such cases, their meanings will be described in detail in the relevant explanatory sections. Accordingly, terms used in this disclosure should be defined not merely by their names, but based on their meanings and the content throughout this disclosure.

[0024] Throughout this specification, when a part is described as "comprising" a certain component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components. Furthermore, the singular form used in this specification includes the plural form unless specifically stated otherwise. Additionally, the expression "at least one of a, b, and / or c" as used throughout this specification may encompass 'a alone', 'b alone', 'c alone', 'a and b', 'a and c', 'b and c', or 'a, b, and c all'.

[0025] Meanwhile, terms such as "first and / or second" used in this specification may be used to describe various components, but they are used solely for the purpose of distinguishing one component from another and are not intended to limit the scope to the components referred to by such terms. For example, without departing from the scope of the present invention, the first component may be named the second component, and the second component may also be named the first component.

[0026] Additionally, terms such as “…part,” “…module,” etc., as described in this specification refer to a unit that processes at least one function or operation, which may be implemented in hardware or software, or a combination of hardware and software. Furthermore, embodiments of this disclosure may be represented in this specification by functional block configurations and various processing steps. These functional blocks may be implemented by various numbers of hardware and / or software configurations that execute specific functions. For example, embodiments of this disclosure may employ integrated circuit configurations such as memory, processing, logic, look-up tables, etc., which can execute various functions under the control of one or more microprocessors or other control devices.

[0027] Hereinafter, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In describing the embodiments, technical details that are well known in the art to which the present invention pertains and are not directly related to the present invention will be omitted. This is to ensure that the essence of the present invention is conveyed more clearly without obscuring it by omitting unnecessary explanations. For the same reason, some components in the accompanying drawings may be exaggerated, omitted, or schematically depicted. Furthermore, the size of each component does not entirely reflect its actual size. Throughout this specification, the same reference numerals may refer to the same or corresponding components.

[0028] FIG. 1 is a block diagram illustrating a manufacturing process system (10) for a high-frequency electronic circuit according to an embodiment of the present disclosure.

[0029] Referring to FIG. 1, a manufacturing process system (10) for a high-frequency electronic circuit according to an embodiment of the present disclosure may include an electronic device (110) for controlling the operation of a process facility (120) and a process facility (120) for a manufacturing process of a high-frequency electronic circuit. According to an embodiment of the present disclosure, the electronic device (110) may be electrically connected to the process facility (120) or may communicate through a network, and may control the manufacturing process of the high-frequency electronic circuit of the process facility (120) through the electrical connection or communication.

[0030] When an electronic device (110) communicates with a process facility (120) through a network, the communication method is not limited and may include not only a communication method utilizing a communication network that the network may include, but also short-range wireless communication between devices. For example, the network may include at least one network among a PAN (Personal Area Network), LAN (Local Area Network), CAN (Campus Area Network), MAN (Metropolitan Area Network), WAN (Wide Area Network), BBN (Broad Band Network), and the Internet. Additionally, the network may include at least one network topology including a bus network, a star network, a ring network, a mesh network, a star-bus network, a tree network, or a hierarchical network.

[0031] Although not illustrated, an electronic device (110) according to an embodiment of the present disclosure may include a control unit and a storage unit. The control unit may include a processor, and the processor may perform an operation to control process equipment (120) for a manufacturing process of a high-frequency electronic circuit according to an embodiment of the present disclosure, or execute a program for performing a manufacturing process of a high-frequency electronic circuit according to an embodiment of the present disclosure. The storage unit may include at least one of volatile memory and non-volatile memory, and may store code of a program executed by the processor.

[0032] In FIG. 1, the electronic device (110) is depicted as being separated from the process equipment (120), but this is merely one example according to an embodiment of the present disclosure and does not limit the content of the present disclosure. According to another embodiment of the present disclosure, the electronic device (110) may be included in the process equipment (120) or may represent a unit that processes at least one function or operation according to an embodiment of the present disclosure, and may be implemented as hardware or software, or a combination of hardware and software. According to another embodiment, the electronic device (110) may include a plurality of computer systems or computer software implemented as network servers. For example, the electronic device (110) may refer to a computer system and computer software that is connected to a sub-device capable of communicating with another network server through a computer network such as an intranet or the internet, receives a request to perform a task, performs the task, and provides the result of the task.

[0033] In addition, the electronic device (110) may be understood in a broad sense as including a series of applications that can run on a network server and various databases built inside. For example, the electronic device (110) can be implemented using network server programs provided in various ways depending on the operating system, such as DOS, Windows, Linux, Unix, or MacOS.

[0034] According to an embodiment of the present disclosure, the process equipment (120) can manufacture a high-frequency electronic circuit based on the control of the electronic device (110), and according to an embodiment of the present disclosure, optimization of the device structure design can be achieved through control by the electronic device (110). According to an embodiment of the present disclosure, unlike the conventional manufacturing process method for high-frequency electronic circuits, the process equipment (120) manufactures an epitaxial wafer grown in the reverse direction and can manufacture a high-frequency electronic circuit using it. A manufacturing process method for a high-frequency electronic circuit performed in the process equipment (120) by the electronic device (110) according to an embodiment of the present disclosure will be explained in detail through FIGS. 2 to 8, which will be described later.

[0035] According to an embodiment of the present disclosure, a manufacturing process for a high-frequency electronic circuit can be performed by growing an epitaxial wafer such that a plurality of electrically operating layers within the device are formed in an inverted form, and accordingly, the debonding process can be eliminated during the manufacturing process of the high-frequency electronic circuit, thereby improving process stability. In addition, according to the present disclosure, by performing a manufacturing process for a high-frequency electronic circuit such that a ground is formed at a position sufficiently close to an active layer, the distance between the ground and the component can be easily adjusted during the manufacturing process of the high-frequency electronic circuit, and the ground and the component can be positioned closer together.

[0036] FIG. 2 is a drawing for explaining the initial state of a wafer provided for manufacturing a high-frequency electronic circuit according to an embodiment of the present disclosure.

[0037] Specifically, (a) illustrated in FIG. 2 illustrates the initial state of a wafer for manufacturing a conventional high-frequency electronic circuit. Referring to FIG. 2 (a), the wafer for manufacturing a conventional high-frequency electronic circuit may include a substrate (210) and a semiconductor layer (220). The substrate (210) may refer to a seed wafer and may be a wafer for the epitaxial growth of the semiconductor layer (220). The semiconductor layer (220) may be a structure for manufacturing a component based on epitaxial growth and may be formed on the substrate (210). Referring to FIG. 2(a), the semiconductor layer (220) may include first to fourth layers (221, 222, 223, 224), and the first to fourth layers (221, 222, 223, 224) may be formed corresponding to a component to be obtained through a manufacturing process. In FIG. 2(a), the semiconductor layer (220) is shown as including first to fourth layers (221, 222, 223, 224), but this is merely an exemplary configuration to aid understanding and does not limit the shape of the semiconductor layer (220). In other words, the semiconductor layer (220) may include a plurality of layers corresponding to a component to be manufactured.

[0038] For example, if the component to be manufactured is a HEMT (High Electron Mobility Transistor) device, the first layer (221) may be a layer for connection with at least one of a source and a drain. In this case, the first layer (221) may be required to have low contact resistance and low sheet resistance, and accordingly, the first layer (221) may be composed of a material having a high impurity concentration and a relatively narrow band gap. As a specific example, the first layer (221) may be composed of n+ InGaAs (Indium Gallium Arsenide), but this is merely one example and does not limit the material constituting the first layer (221).

[0039] If the component to be manufactured is a HEMT device, the second layer (222) may be composed of a material having a wide band gap and high resistance. In some cases, the second layer (222) may include an n-type doping portion to supply carriers to the third layer (223). In some cases, a material may be included between the first layer (221) and the second layer (222) to obtain a selectivity ratio for the etching process.

[0040] If the component to be manufactured is a HEMT device, the third layer (223) may be composed of a material having high electron mobility to form a channel for carrier movement. As a specific example, the third layer (223) may be composed of InGaAs, but this is merely one example and does not limit the material constituting the third layer (223). When the third layer (223) is composed of InGaAs, the composition of In (Indium) and Ga (Gallium) may be determined differently depending on the purpose.

[0041] When the component to be manufactured is a HEMT device, the fourth layer (224) may be composed of a material having a wide band gap and high resistance. As a specific example, the fourth layer (224) may be composed of at least one of InAlAs (Indium Aluminum Arsenide) and AlGaAs (Aluminum Gallium Arsenide), and this is merely one example and does not limit the material constituting the fourth layer (224). In some cases, the fourth layer (224) may include a material to obtain selectivity for the etching process.

[0042] A wafer in an initial state for manufacturing a HEMT device according to a conventional method may include a semiconductor layer (220) corresponding to the structure of the HEMT device, in which case the semiconductor layer (220) may include a first layer (221) having the above-described features formed on a substrate (210), a second layer (222) having the above-described features formed on the first layer (221), a third layer (223) having the above-described features formed on the second layer (222), and a fourth layer (224) having the above-described features formed on the third layer (223).

[0043] Meanwhile, (b) illustrated in FIG. 2 illustrates the initial state of a wafer for manufacturing a high-frequency electronic circuit according to an embodiment of the present disclosure. Referring to FIG. 2(b), the wafer for manufacturing a high-frequency electronic circuit according to an embodiment of the present disclosure may include a substrate (210) and a semiconductor layer (220), similar to a wafer for manufacturing a conventional high-frequency electronic circuit. The substrate (210) illustrated in FIG. 2(b) may also be a seed wafer for the epitaxial growth of the semiconductor layer (220), and the semiconductor layer (220) may be formed on the substrate (210) based on epitaxial growth.

[0044] However, the semiconductor layer (220) according to the embodiment of the present disclosure may be grown to be formed in the opposite direction to the layers according to the conventional method. Specifically, in the initial state of the wafer for manufacturing the HEMT device according to the embodiment of the present disclosure, a fourth layer (224) composed of a material having a wide band gap and high resistance may be formed on the substrate (210), and a third layer (223) composed of a material having high electron mobility may be formed on the fourth layer (224) to form a channel for carrier movement. Additionally, a second layer (222) composed of a material having a wide band gap and high resistance may be formed on the third layer (223), and a first layer (221) composed of a material having a relatively narrow band gap and high impurity concentration may be formed on the second layer (222).

[0045] Meanwhile, in some embodiments, the wafer in the initial state according to the embodiment of the present disclosure may further include an additional layer to facilitate the etching process described later in FIG. 5. Meanwhile, in another embodiment according to the method of manufacturing a component according to the present disclosure, when a passive element is to be manufactured, a semiconductor layer (220) may be formed corresponding to the passive element. Specifically, in this case, the semiconductor layer (220) may be formed with layers composed of a low-conductivity material, such as the fourth layer (224) described above, replacing the highly conductive layers to prevent the occurrence of parasitic capacitance and inductance.

[0046] FIG. 3 is a drawing for explaining a deposition process performed to manufacture a high-frequency electronic circuit according to an embodiment of the present disclosure.

[0047] The wafer in the initial state shown in FIG. 3 is also depicted as an wafer in the initial state for manufacturing a HEMT device as described above in FIG. 2. However, this is merely for convenience of explanation and does not limit the embodiments of the present disclosure, and the wafer in the initial state can be formed in correspondence with the component to be manufactured as described above in FIG. 2. Referring to FIG. 3, a deposition process according to an embodiment of the present disclosure can be performed on the wafer in the initial state. Specifically, the deposition process according to an embodiment of the present disclosure can be performed on a semiconductor layer (220) comprising a fourth layer (224) formed on a substrate (210), a third layer (223) formed on the fourth layer (224), a second layer (222) formed on the third layer (223), and a first layer (221) formed on the second layer (222).

[0048] According to an embodiment of the present disclosure, a dielectric film (230) may be deposited on a first layer (221), and a metal layer (240) for grounding may be deposited on the dielectric film (230). The dielectric film (230) may be composed of an insulating material, and as a specific example, may be composed of at least one of BCB (Benzo cyclobuene) and SOG (Spin on glass). The dielectric film (230) may be configured to appropriately adjust the distance between the active layer and the metal layer, and the thickness of the dielectric film (230) may be determined in correspondence with the target frequency.

[0049] FIG. 4 is a drawing for explaining a bonding process performed to manufacture a high-frequency electronic circuit according to an embodiment of the present disclosure.

[0050] Referring to FIG. 4, a bonding process according to an embodiment of the present disclosure can be performed such that a carrier wafer (250) and a metal layer (240) are bonded. Specifically, a structure in which a deposition process is performed as described above in FIG. 3 can be placed on top of the metal layer (240), and a bonding process can be performed such that one side of the metal layer (240) is bonded to the carrier wafer (250). In other words, a bonding process according to an embodiment of the present disclosure can be performed such that a metal layer (240) is positioned on the carrier wafer (250), a dielectric film (230) is positioned on the metal layer (240), a semiconductor layer (220) is positioned on the dielectric film (230), and a substrate (210) is positioned on the semiconductor layer (220). Meanwhile, a carrier wafer (250) used in the bonding process according to an embodiment of the present disclosure can be selected based on at least one of mechanical strength, resistance, and thermal conductivity.

[0051] FIG. 5 is a drawing illustrating an etching process performed to manufacture a high-frequency electronic circuit according to an embodiment of the present disclosure.

[0052] The etching process according to an embodiment of the present disclosure may be performed to remove a substrate (210, see FIG. 2) from a structure in which a bonding process has been performed as described above in FIG. 4. Specifically, to remove the substrate (210) from a structure in which a bonding process has been performed, at least one of dry etching, wet etching, and Chemical Mechanical Polishing (CMP) methods may be selected, and specifically, the method for removing the substrate (210) may be selected based on the selectivity ratio with respect to the active layer.

[0053] FIG. 6 is a drawing for explaining the process of manufacturing a component according to an embodiment of the present disclosure.

[0054] According to an embodiment of the present disclosure, a component (CPNT) can be manufactured through a manufacturing process for a structure in which an etching process has been performed as described above in FIG. 5. It is assumed that the semiconductor layer (220, see FIG. 2) shown in FIG. 2 to FIG. 5 described above is intended for manufacturing a HEMT device, and the component (CPNT) manufactured from the corresponding semiconductor layer (220) shown in FIG. 6 may be a HEMT device. The method of manufacturing the component (CPNT) through a manufacturing process for a structure in which an etching process has been performed is the same as the conventional method, so a description thereof is omitted.

[0055] FIG. 7 is a drawing for showing a high-frequency electronic circuit manufactured according to an embodiment of the present disclosure.

[0056] According to an embodiment of the present disclosure, a high-frequency electronic circuit can be manufactured using the process described above in FIGS. 2 to 6. In FIG. 7, the high-frequency electronic circuit is illustrated as including first to third components (CPNT1, CPNT2, CPNT3), but this is merely an embodiment according to the present disclosure and does not limit the form of the high-frequency electronic circuit manufactured according to the present disclosure. The high-frequency electronic circuit according to an embodiment of the present disclosure may be manufactured to include a plurality of components according to the circuit design. Additionally, the high-frequency electronic circuit may include at least one line formed according to the circuit design. In FIG. 7, the high-frequency electronic circuit is illustrated as including a first line for electrical connection between the first component (CPNT1) and the metal layer (240), a second line for electrical connection between the first component (CPNT1) and the second component (CPNT2), and a third line for electrical connection between the second component (CPNT2) and the third component (CPNT3).

[0057] FIG. 8 is a flowchart for explaining a manufacturing process method of a high-frequency electronic circuit according to an embodiment of the present disclosure.

[0058] In step S810, according to the manufacturing process method of an embodiment of the present disclosure, a semiconductor layer (220, see FIG. 2) can be formed on a substrate (210, see FIG. 2). A structure comprising the substrate (210) and the semiconductor layer (220) formed according to the embodiment can be used as an initial state wafer. In an embodiment, the semiconductor layer (220) may include a plurality of layers, and if a component (CPNT, see FIG. 6) to be manufactured through a manufacturing process method can be manufactured from a structure formed of a first layer (221, see FIG. 2), a second layer (222, see FIG. 2) formed on the first layer (221), a third layer (223) formed on the second layer (222), and a fourth layer (224) formed on the third layer (223), the initial state wafer according to an embodiment of the present disclosure may include a semiconductor layer (220) comprising a fourth layer (224) formed on a substrate (210), a third layer (223) formed on the fourth layer (224), a second layer (222) formed on the third layer (223), and a first layer (221) formed on the second layer (222). According to an embodiment of the present disclosure, the first to fourth layers (221, 222, 223, 224) can be formed through epitaxial growth by a substrate (210).

[0059] In step S820, according to the manufacturing process method of an embodiment of the present disclosure, a dielectric film and a metal layer may be deposited on a structure formed in step S810. Specifically, when the substrate (210) is assumed to be the bottom of the structure, a dielectric film (230) may be deposited on a first layer (221) located at the top of the semiconductor layer (220), and a metal layer (240) for grounding may be deposited on the dielectric film (230).

[0060] In step S830, according to the manufacturing process method of an embodiment of the present disclosure, a structure formed in step S820 (a wafer produced in step S820) can be bonded onto a carrier wafer (250). Specifically, one side of the metal layer (240) included in the structure formed in step S820 can be bonded to contact the carrier wafer (250), and accordingly, the carrier wafer (250) can be located at the bottom of the structure and the substrate (210) can be located at the top of the structure.

[0061] In step S840, according to the manufacturing process method of an embodiment of the present disclosure, the substrate (210) can be removed from the structure formed in step S830. In the embodiment, the removal of the substrate (210) can be performed by at least one of dry etching, wet etching, and CMP.

[0062] In step S850, according to the manufacturing process method of an embodiment of the present disclosure, a component can be manufactured from a structure formed in step S850. The method of manufacturing a component from a structure may be the same as the method of manufacturing a conventional semiconductor device.

[0063] Meanwhile, the embodiments disclosed in this specification may be implemented in the form of a recording medium that stores instructions executable by a computer. The instructions may be stored in the form of program code and, when executed by a processor, may generate a program module to perform the operations of the disclosed embodiments. The recording medium may be implemented as a computer-readable recording medium. A computer-readable recording medium may include all types of recording media that store instructions decipherable by a computer. Examples include ROM, RAM, magnetic tape, magnetic disk, flash memory, optical data storage devices, etc.

[0064] The above descriptions are specific embodiments for carrying out the present disclosure. The present disclosure will include not only the embodiments described above, but also embodiments that can be simply modified or easily modified. Furthermore, the present disclosure will include technologies that can be easily modified and implemented using the embodiments described above. Accordingly, the scope of the present disclosure should not be limited to the embodiments described above, but should be defined by the claims set forth below as well as equivalents to the claims of the present disclosure. Explanation of the symbols

[0065] 110: Electronic device 120 : Process Equipment

Claims

Claim 1 A method for manufacturing a high-frequency electronic circuit comprising at least one component, comprising: forming a semiconductor layer on a substrate using epitaxial growth; depositing a dielectric film on the semiconductor layer; depositing a metal layer for grounding on the dielectric film; bonding one side of the metal layer onto a carrier wafer; and removing the substrate. The method comprises the step of manufacturing the at least one component from the semiconductor layer, wherein, when the first component is manufactured from a first structure comprising a first layer and a second layer formed on the first layer, the semiconductor layer is formed to include the second layer formed on the substrate and the first layer formed on the second layer, and the at least one component includes a HEMT (High Electron Mobility Transistor) device, and the HEMT device is manufactured from a second structure comprising a third layer, a fourth layer formed on the third layer, a fifth layer formed on the fourth layer, and a sixth layer formed on the fifth layer, and the semiconductor layer is formed to include the sixth layer formed on the substrate, the fifth layer formed on the sixth layer, the fourth layer formed on the fifth layer, and the third layer formed on the fourth layer, wherein the third layer is formed to include n+ InGaAs (n+ Indium Gallium Arsenide), and the fifth layer is formed to include InGaAs (Indium Gallium Arsenide). A method in which the sixth layer is formed to include at least one of InAlAs (Indium Aluminum Arsenide) and AlGaAs (Aluminium Gallium Arsenide). Claim 2 delete Claim 3 delete Claim 4 A method according to claim 1, wherein the fourth layer comprises an n-type doping portion for supplying a carrier to the fifth layer. Claim 5 A method for manufacturing a high-frequency electronic circuit comprising at least one component, comprising: forming a semiconductor layer using epitaxial growth on a substrate; depositing a dielectric film on the semiconductor layer; depositing a metal layer for grounding on the dielectric film; bonding one side of the metal layer onto a carrier wafer; removing the substrate; and manufacturing the at least one component from the semiconductor layer, wherein, when the first component is manufactured from a first structure comprising a first layer and a second layer formed on the first layer, the semiconductor layer is formed to include the second layer formed on the substrate and the first layer formed on the second layer, and the dielectric film comprises at least one of BCB (Benzo cyclobuene) and SOG (Spin on glass). Claim 6 In claim 1, the thickness of the dielectric film is determined in correspondence with the target frequency. Claim 7 A method for manufacturing a high-frequency electronic circuit comprising at least one component, comprising: forming a semiconductor layer on a substrate using epitaxial growth; depositing a dielectric film on the semiconductor layer; depositing a metal layer for grounding on the dielectric film; bonding one side of the metal layer onto a carrier wafer; removing the substrate; and manufacturing the at least one component from the semiconductor layer, wherein, when the first component is manufactured from a first structure comprising a first layer and a second layer formed on the first layer, the semiconductor layer is formed to include the second layer formed on the substrate and the first layer formed on the second layer, and the step of removing the substrate is performed based on at least one of a dry etching method, a wet etching method, and a Chemical Mechanical Polishing (CMP) method. Claim 8 A method for manufacturing a high-frequency electronic circuit comprising at least one component, comprising: forming a semiconductor layer using epitaxial growth on a substrate; depositing a dielectric film on the semiconductor layer; depositing a metal layer for grounding on the dielectric film; bonding one side of the metal layer onto a carrier wafer; removing the substrate; and manufacturing the at least one component from the semiconductor layer, wherein, when the first component is manufactured from a first structure comprising a first layer and a second layer formed on the first layer, the semiconductor layer is formed to include the second layer formed on the substrate and the first layer formed on the second layer, and further comprising the step of arranging at least one line that implements an electrical connection to at least a portion of the at least one component and the metal layer. Claim 9 An electronic device for controlling process equipment for manufacturing a high-frequency electronic circuit comprising at least one component, wherein the electronic device comprises a memory comprising instructions and at least one processor connected to said memory, and said at least one processor controls said process equipment to form a semiconductor layer using epitaxial growth on a substrate, deposit a dielectric film on said semiconductor layer, deposit a metal layer for grounding on said dielectric film, bond one side of said metal layer onto a carrier wafer, remove said substrate, and manufacture said at least one component from said semiconductor layer, wherein when said at least one component is manufactured from a structure comprising a first layer and a second layer formed on said first layer, said semiconductor layer is formed to include said second layer formed on said substrate and said first layer formed on said second layer, said at least one component comprises a HEMT (High Electron Mobility Transistor) device, said HEMT device comprises a third layer, a fourth layer formed on said third layer, a fifth layer formed on said fourth layer, and said fifth Manufactured from a second structure comprising a sixth layer formed on a layer, wherein the semiconductor layer is formed to include the sixth layer formed on the substrate, the fifth layer formed on the sixth layer, the fourth layer formed on the fifth layer, and the third layer formed on the fourth layer, wherein the third layer is formed to include n+ InGaAs(n+ Indium Gallium Arsenide), and the fifth layer is formed to include InGaAs(Indium Gallium Arsenide).The electronic device wherein the above-mentioned sixth layer is formed to include at least one of InAlAs (Indium Aluminum Arsenide) and AlGaAs (Aluminium Gallium Arsenide). Claim 10 delete

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