Ferroelectric device, ferroelectric random access memory including the same and method of fabricating the same

Abstract

A ferroelectric device, a ferroelectric memory device including the same, and a method for manufacturing the same are disclosed. The disclosed ferroelectric device comprises a first electrode including hafnium nitride; a ferroelectric layer formed on the first electrode and including aluminum, scandium, and nitrogen; and a coherent interface between the first electrode and the ferroelectric layer, wherein the crystal structure of the first electrode and the crystal structure of the ferroelectric are aligned through the coherent interface.

Description

Technology Field

[0001] The present invention relates to a ferroelectric material, a device including the same, and a related method, and more specifically, to a ferroelectric device, a ferroelectric memory device including the same, and a method for manufacturing the same. Background Technology

[0002] Ferroelectric Random Access Memory (FeRAM) is a type of non-volatile memory device that has the advantage of retaining information even when the power is off, as well as enabling high-speed access, consuming less power, and being resistant to shock. Therefore, it is being researched and developed as a main memory or as a recording medium for recording voice or images in various electronic devices and equipment that have file storage and search functions, such as portable computers, cellular phones, and game consoles.

[0003] The above-mentioned ferroelectric memory is receiving renewed industrial attention as a non-volatile working and storage memory with the emergence of HfO2-based ferroelectrics with a fluorite structure. However, when the thickness of the ferroelectric is less than 10 nm, the metastable of the polar orthorhombic phase of the ferroelectric causes various significant problems, including performance degradation of the ferroelectric.

[0004] To improve this, ferroelectric aluminum scandium nitride (AlScN) with a stable hexagonal closed-packed (HCP) structure is being introduced. However, since AlScN films require high switching voltages, the thickness of the film must be reduced to lower the operating voltage. However, significant leakage current occurs when the thickness of the AlScN film is less than approximately 10 nm. Although the switching voltage can be lowered by increasing the concentration of scandium (Sc) to reduce the coercive field of the AlScN film, this has the problem of causing higher leakage current due to a decrease in bandgap energy.

[0005] In addition, conventional attempts have been made to solve these problems by using sapphire substrates with a crystal structure similar to AlScN, Pt electrodes with a high work function, or high-temperature deposition favorable for epitaxial growth. Nevertheless, these solutions are not compatible with CMOS (complementary metal-oxide-semiconductor) processes and are therefore not suitable for industrial applications. The problem to be solved

[0006] The technical problem that the present invention aims to solve is to provide a ferroelectric device and a ferroelectric memory device that minimize the thickness and leakage current of ferroelectric aluminum scandium nitride (AlScN).

[0007] In addition, the invention provides ferroelectric devices and ferroelectric memory devices that are compatible with CMOS processes and applicable to industrial applications.

[0008] In addition, the invention provides a method for manufacturing a ferroelectric memory device having the aforementioned advantages.

[0009] The problems that the present invention aims to solve are not limited to those mentioned above, and other unmentioned problems will be understood by those skilled in the art from the description below. means of solving the problem

[0010] According to one embodiment of the present invention, a ferroelectric device may be provided comprising: a first electrode comprising hafnium nitride; a ferroelectric layer formed on the first electrode comprising aluminum, scandium, and nitrogen; and a coherent interface between the first electrode and the ferroelectric layer. The crystal structure of the first electrode and the crystal structure of the ferroelectric layer may be aligned through the coherent interface.

[0011] In one embodiment, the ferroelectric layer has the formula Al 0.7 Sc 0.3 It includes a hexagonal close-packed (HCP) structure of N, and the first electrode is of the chemical formula HfN 0.4 It may include an HCP structure. The thickness of the ferroelectric layer may be greater than 0 nm and less than or equal to 10 nm, and the thickness of the first electrode may be greater than 10 nm and less than or equal to 200 nm. The mismatch between the lattice constant of the first electrode and the lattice constant of the ferroelectric layer may be less than 10%. The first electrode and the ferroelectric layer <002> It can be aligned in a crystal direction. In one embodiment, the ferroelectric element can be used in a memory element, a piezoelectric element, or a solar cell.

[0012] According to another embodiment of the present invention, it may include a first electrode comprising hafnium nitride; a ferroelectric layer formed on the first electrode comprising aluminum, scandium, and nitrogen; a second electrode formed on the ferroelectric layer; and a coherent interface between the first electrode and the ferroelectric layer. The crystal structure of the first electrode and the crystal structure of the ferroelectric layer may be aligned through the coherent interface.

[0013] In one embodiment, the first electrode has a lattice constant similar to that of the ferroelectric layer within an error range. As the thickness of the first electrode decreases, the (103) peak intensity of the ferroelectric layer decreases, and as the thickness of the first electrode increases, the (103) peak intensity of the ferroelectric layer may increase. As the thickness of the first electrode increases, the (002) peak intensity of the first electrode may increase. The first electrode and the ferroelectric layer <002> It can be aligned in the crystal direction. The ferroelectric memory device has a tolerance voltage (V) greater than 0 and less than or equal to 10 [V]. c It has ) and preferably can be 4.35V. As the thickness of the ferroelectric increases, the breakdown electric field (E) of the ferroelectric memory device bd ) decreases, and as the thickness of the first electrode increases, the leakage current of the ferroelectric memory device decreases, and the second electrode may include TiN, Pt, Ru, Au, TaN, Ir, Pd, Ru, ITO (Indium Tin Oxide) or an alloy thereof.

[0014] According to another embodiment of the present invention, a method for manufacturing a ferroelectric memory device may be provided, comprising the steps of: forming a first electrode comprising hafnium nitride on a substrate; forming a ferroelectric layer comprising aluminum (Al), scandium (Sc), and nitrogen (N) on the first electrode; and forming a second electrode on the ferroelectric layer, wherein a coherent interface is formed between the first electrode and the ferroelectric layer in the step of forming the ferroelectric layer, and the crystal structure of the first electrode and the crystal structure of the ferroelectric are aligned at the coherent interface. The forming step may be performed by applying a direct current to the upper electrode of the plasma chamber to cause sputtering of a target arranged on the substrate, or by performing at least one of atomic layer deposition (ALD), physical vapor deposition (PVD), and chemical vapor deposition (CVD). The steps of forming the first electrode, forming the ferroelectric layer, and forming the second electrode may be performed under continuous vacuum conditions (in situ). The concentration ratio of the aluminum and the scandium in the ferroelectric layer may be 7:3. Effects of the invention

[0015] According to embodiments of the present invention, by providing a coherent interface between a first electrode comprising hafnium nitride and a ferroelectric layer comprising aluminum, scandium, and nitrogen, a ferroelectric device and a ferroelectric memory device that minimize the thickness and leakage current of ferroelectric aluminum scandium nitride (AlScN) can be provided.

[0016] In addition, it can provide excellent scalability and compatibility with CMOS standards by exhibiting ferroelectric properties at a thickness of 10 nm or less of ferroelectric aluminum scandium nitride (AlScN) and reducing the coercive voltage (Vc) to about 10 V or less.

[0017] In addition, a method for manufacturing a ferroelectric memory device having the aforementioned advantages can be provided.

[0018] However, the effects of the present invention are not limited to the above effects and can be extended in various ways without departing from the technical concept and scope of the present invention. Brief explanation of the drawing

[0019] FIG. 1a is a cross-sectional view showing a ferroelectric device according to one embodiment of the present invention. FIG. 1b is a cross-sectional view showing a ferroelectric memory device according to one embodiment of the present invention. FIGS. 2a and 2b are drawings for explaining the crystallographic characteristics of a ferroelectric layer (ASN) of a ferroelectric memory device according to one embodiment of the present invention. FIG. 3 is a graph showing the residual polarization value according to the change in thickness of the first electrode of a ferroelectric memory device according to one embodiment of the present invention. FIG. 4a shows HfN according to thickness change according to an embodiment of the present invention. 0.4 and HfN 0.4 / ASN is a graph showing roughness, Fig. 4b is an AFM (Atomic Force Microscopy) image showing the roughness of the first electrode and the first electrode / ferroelectric layer according to thickness change, and Fig. 4c is HfN according to thickness change 0.4 and HfN 0.4 This is a graph showing the θ-2θ XRD results for each / ASN film. FIGS. 5a to 5c are HfN according to an embodiment of the present invention 0.4 This is a high-resolution transmission electron microscopy (HRTEM) image showing the bottom and top interfaces at low and high magnifications of a (15 nm) / ASN (40 nm) / TiN (50 nm) sample. FIGS. 6a to 6c are HfN according to an embodiment of the present invention 0.4This is a high-resolution transmission electron microscopy (HRTEM) image showing the bottom and top interfaces at low and high magnifications of a (150 nm) / ASN (40 nm) / TiN (50 nm) sample. FIG. 7 is an HfN according to an embodiment of the present invention 0.4 This is a graph showing the ASN (103) peak intensity of the (75, 150 nm) / ASN (5 to 40 nm) sample. FIGS. 8A and 8B show HfN at the upper and lower interfaces according to an embodiment of the present invention. 0.4 These are HRTEM images of (75nm) / ASN(40nm) / TiN(50nm) samples, and Figs. 8c and 8d are HfN images taken at low and high magnification, respectively. 0.4 This is an HRTEM image of a (75nm) / ASN(40nm) / TiN(50nm) sample. FIG. 9 shows the residual polarization (P) according to the change in coercive field according to one embodiment of the present invention. r This is a graph showing the value. FIG. 10 shows the residual polarization (P) according to the change in thickness of the ferroelectric layer (ASN) according to one embodiment of the present invention. r This is a graph showing the value. FIG. 11 shows the anti-voltage (V) according to the change in thickness of a ferroelectric layer (ASN) according to one embodiment of the present invention. c ) and coercive field (E c This is a graph showing the value. FIGS. 12a and FIGS. 12b are a coercive field (E) according to an embodiment of the present invention. c This is a graph showing the switching current value according to the change. FIG. 13 is d according to one embodiment of the present invention -2 / 3 coercive field (E) according to change c This is a graph showing the value. FIG. 14 shows the breakdown electric field (E) according to the thickness change of a ferroelectric layer (ASN) according to one embodiment of the present invention. bd This is a graph showing the value. FIGS. 15a and FIGS. 15b are HfN according to an embodiment of the present invention 0.4 This is a graph showing the electrical characteristics of a (150nm) / ASN (3nm to 5nm) / TiN (50nm) sample. Specific details for implementing the invention

[0020] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings.

[0021] The embodiments of the present invention described below are provided to more clearly explain the present invention to those skilled in the art, and the scope of the present invention is not limited by the following embodiments, and the following embodiments may be modified in various other forms.

[0022] The terms used herein are for describing specific embodiments and are not intended to limit the invention. Terms used herein in the singular form may include plural forms unless the context clearly indicates otherwise. Additionally, the terms “comprise” and / or “comprising” used herein specify the presence of the mentioned features, steps, numbers, actions, components, elements, and / or groups thereof, and do not exclude the presence or addition of one or more other features, steps, numbers, actions, components, elements, and / or groups thereof. Furthermore, the term “connected” used herein means not only that components are directly connected, but also includes the concept of indirectly connecting components through the interposition of additional components between them.

[0023] Furthermore, when a component is described in this specification as being located "on" another component, this includes not only cases where a component is in contact with another component, but also cases where another component exists between the two components. The term "and / or" as used in this specification includes any one of the listed items and all combinations of one or more thereof. Additionally, terms of degree such as "about" and "substantially" as used in this specification are used to mean a range of numerical values ​​or degrees or approximate values, taking into account inherent manufacturing and material tolerances, and are used to prevent an infringer from unfairly exploiting the disclosures in which precise or absolute figures provided to aid in understanding this specification are mentioned.

[0024] Embodiments of the present invention will be described in detail below with reference to the attached drawings. The sizes or thicknesses of the areas or parts depicted in the attached drawings may be slightly exaggerated for the clarity of the specification and convenience of explanation. Throughout the detailed description, the same reference numerals indicate the same components.

[0025] FIG. 1a is a cross-sectional view showing a ferroelectric element (100) according to one embodiment of the present invention.

[0026] Referring to FIG. 1a, a ferroelectric element (100) may include a first electrode (10) comprising hafnium nitride, a ferroelectric layer (20) formed on the first electrode (10) comprising aluminum, scandium, and nitrogen, and a coherent interface (CI) between the first electrode (10) and the ferroelectric layer (20). The crystal structure of the first electrode (10) and the crystal structure of the ferroelectric (20) may be aligned through the coherent interface (CI). The first electrode (10) and the ferroelectric layer (20) <002> It can be aligned in the crystal direction. Non-limitingly, the ferroelectric layer (20) is of the chemical formula Al 0.7 Sc 0.3It includes the HCP (hexagonal close packed) structure of N, and similarly, the first electrode (10) has the chemical formula HfN 0.4 It may include an HCP structure.

[0027] The thickness of the ferroelectric material (20) has a range of greater than 0 nm and less than or equal to 10 nm. If it is greater than 10 nm, high leakage current occurs, raising concerns about performance degradation. Preferably, the thickness of the ferroelectric material (20) has a range of greater than 3 nm and less than or equal to 10 nm. The thickness of the first electrode (10) has a range of greater than 10 nm and less than or equal to 200 nm. If the thickness of the first electrode (10) is less than or equal to 10 nm, the induction of leakage current due to the reduction in the thickness of the ferroelectric material (20) cannot be suppressed, and if the thickness of the first electrode (10) is greater than or equal to 200 nm, the matching interface between the first electrode (10) and the ferroelectric layer (20) is degraded, which may result in a decrease in the residual polarization value. Preferably, the thickness of the first electrode (10) has a range of greater than 10 nm and less than or equal to 150 nm.

[0028] The mismatch between the lattice constant of the first electrode (10) and the lattice constant of the ferroelectric layer (20) may be less than 10%. If the mismatch between the lattice constants is 10% or more, a matching interface (CI) may not be formed between the first electrode (10) and the ferroelectric layer (20). Non-limitingly, a quasi-matching interface may be formed between the first electrode (10) and the ferroelectric layer (20).

[0029] These ferroelectric devices (100) can be used in memory devices, piezoelectric devices, and solar cells without limitation.

[0030] FIG. 1b is a cross-sectional view showing a ferroelectric memory device (200) according to one embodiment of the present invention.

[0031] A ferroelectric memory device (200) may include a first electrode (10) comprising hafnium nitride, a ferroelectric layer (20) formed on the first electrode (10) comprising aluminum, scandium, and nitrogen, a second electrode (30) formed on the ferroelectric layer (20), and a coherent interface between the first electrode (10) and the ferroelectric layer (20). Since the first electrode (10) and the ferroelectric layer (20) are identical to the first electrode (10) and the ferroelectric layer (20) of FIG. 1a, reference may be made to the description of the first electrode (10) and the ferroelectric layer (20) of FIG. 1a, unless there is a contradiction.

[0032] The first electrode (10) has a lattice constant similar to that of the ferroelectric layer (20) within an error range. As the thickness of the first electrode (10) decreases, the peak intensity of (103) of the ferroelectric layer decreases, and as the thickness of the first electrode (10) increases, the peak intensity of (103) of the ferroelectric layer may increase. Additionally, as the thickness of the first electrode (10) increases, the peak intensity of (002) of the first electrode (10) may increase. The first electrode (10), the ferroelectric layer (20), and the second electrode (30) are <002> It can be aligned in the direction of determination.

[0033] In one embodiment, the ferroelectric memory device (200) has an anti-voltage (V) greater than 0 and less than or equal to 10 V. c ) has. Preferably, the ferroelectric memory device (200) has an anti-voltage (V) of approximately 4.35 V. c ) can have. As the thickness of the ferroelectric material (20) increases, the breakdown electric field (E) of the ferroelectric memory device (200) bd ) can be reduced. As the thickness of the first electrode (10) increases, the leakage current of the ferroelectric memory device (200) can be reduced.

[0034] The second electrode (30) may, without limitation, comprise TiN, Pt, Ru, Au, TaN, Ir, Pd, Ru, ITO (Indium Tin Oxide), or an alloy thereof. Preferably, the second electrode (30) may comprise TiN. In another embodiment, the second electrode (30) is the same HfN as the first electrode (10). 0.4 It may include.

[0035] Additionally, the present invention may include the steps of: forming a first electrode comprising hafnium nitride on a substrate; forming a ferroelectric layer comprising aluminum (Al), scandium (Sc), and nitrogen (N) on the first electrode; and forming a second electrode on the ferroelectric layer. In the step of forming the ferroelectric layer, a coherent interface is formed between the first electrode and the ferroelectric layer, and the crystal structure of the first electrode and the crystal structure of the ferroelectric layer are aligned at the coherent interface. The forming step may be performed by applying direct current to the upper electrode of the plasma chamber to cause sputtering of a target arranged on the substrate, or by performing at least one of atomic layer deposition (ALD), physical vapor deposition (PVD), and chemical vapor deposition (CVD). The steps of forming the first electrode, forming the ferroelectric layer, and forming the second electrode may be performed under continuous vacuum conditions (in situ).

[0036] The concentration ratio of the aluminum and the scandium in the ferroelectric layer has a range of 6:4 to 8:2. Preferably, the concentration ratio of the aluminum and the scandium in the ferroelectric layer may be 7:3. When the Sc concentration is 30% or less, the coercive field (E) when the thickness is less than 20 nm c ) is the breakdown voltage (E bdIf the value exceeds ) and ferroelectric properties do not appear, and if the Sc concentration is increased above the critical value, the solubility limit is reached and electrical properties may deteriorate.

[0037] Conventionally, aluminum scandium nitride (AlScN) is being developed as a material for next-generation ferroelectric memory because it offers a much higher residual charge density than other materials with a stable ferroelectric phase. However, AlScN inherently possesses a high coercive field, and to lower the high operating voltage required by this high coercive field, it is necessary to significantly reduce the AlScN film thickness. Furthermore, significant leakage current faces a serious challenge during thickness scaling, particularly when maintaining compatibility with CMOS manufacturing standards. The present invention relates to AlScN to form a coherent interface that effectively reduces leakage current even at AlScN film thicknesses of approximately 10 nm or less. 0.7 Sc 0.3 HfN that minimizes N(ASN) and lattice mismatch 0.4 Electrodes were applied. In addition, CMOS-compatible HfN deposited without vacuum interruption between each layer was applied. 0.4 The / ASN / TiN stack exhibits excellent scalability and ferroelectricity in the ASN film at a thickness of about 0 nm to 10 nm, and the coercive voltage is reduced to 10 V or less, preferably 4.35 V, allowing for the fabrication of low-voltage ferroelectric devices that meet CMOS standards.

[0039] Materials and Device Fabrication : HfN 0.4The electrode can be formed on a Si / SiO2 substrate using radio frequency reactive sputtering with a 4-inch diameter Hf target. The sputtering process can be performed, without limitation, at room temperature with a power setting of approximately 400 W, an operating pressure of 2 mTorr, and gas flow rates of 19 sccm Ar and 1 sccm N2. Subsequently, the ASN film is formed using HfN via RF reactive magnetron sputtering with AlN and Sc targets. 0.4 It was deposited on the electrode. Deposition can be performed without limitation at room temperature under a 20 sccm N2 gas flow at an operating pressure of 20 mTorr. Power settings for each target were maintained at approximately 290 W and 210 W, respectively, to form an Al:Sc ratio of 7:3. When the Sc concentration is lowered to 30% or less, E when the thickness is less than 20 nm c Ga E bd It exceeded. Conversely, increasing the Sc concentration reached the solubility limit, causing the electrical properties to deteriorate. Preferably, in the present invention, a Sc concentration of 30% is the optimal value. HfN 0.4 and the thickness of the ASN film was controlled through the deposition time.

[0040] Subsequently, a 50 nm thick TiN top electrode can be deposited using DC reactive sputtering at room temperature with a power setting of 400 W, an operating pressure of 2 mTorr, and a gas flow of 20 sccm N2. After depositing the TiN layer, a 200 µm layer is formed using photolithography and dry etching. 2 A cylindrical top electrode with an area can be patterned.

[0041] Characteristic analysis :HfN0.4 and ASN thicknesses were confirmed via X-ray fluorescence spectroscopy (Thermo Scientific, Quant'X EDXRF) and calibrated using HRTEM and Spectroscopic Ellipsometry. The crystal quality of the film was analyzed using XRD (X'pert Pro, PAN- alytical) and HRTEM (JEM-2100F, JEOL Ltd). Surface morphology was analyzed using AFM (Park Systems, NX10). The electrical properties of the film were measured using a semiconductor characterization system (Keithley, 4200A-SCS). The ferroelectric properties of the film were measured via triangular PUND measurements at a frequency of 100 kHz. The top electrode was biased, and the bottom electrode was grounded. BE-PFM hysteresis loop measurements were performed using a Cr / Pt coated conductive tip (Multi75E-G, BudgetSensors, nominal spring constant k). It was performed using an AFM with 3 Nm⁻¹. Band-excitation was controlled via a function generator and data acquisition system (NI-PXIe 5122 / 5412, National Instruments) using LabVIEW / MATLAB. An AC modulation voltage of 1.5 V was applied to the BE-PFM in the range of 335–415 kHz. Since the surface morphology was slightly damaged by contact-mode AFM imaging, non-contact-mode AFM imaging was performed to locate the hysteresis loop measurement positions.

[0042] FIGS. 2a and 2b are drawings illustrating the crystallographic characteristics of a ferroelectric layer of a ferroelectric memory device according to an embodiment of the present invention. Here, the ferroelectric layer is Al 0.7 Sc 0.3 It may be composed of a substance having a chemical formula represented by N (hereinafter referred to as ASN).

[0043] Referring to FIG. 2a, the relationship between ASN (002) and ASN (103) in the crystal unit cell is shown. ASN (002) is <002> ASN (103) represents a plane of direction. <103> It refers to the plane of the direction. Through calculation, Al 0.7 Sc 0.3 It can be seen that the lattice constants of the a-axis and c-axis of N are approximately 3.21 Angstroms and approximately 5.15 Angstroms, respectively. The angle between ASN (002) and ASN (103) is 32.1°.

[0044] Referring to FIG. 2b, the concept of the θ-2θ and GIXRD scan of ASN (002) and ASN (103) is schematically shown. Here, ω is the angle of incidence at GIXRD.

[0045] HfN through FIGS. 3 to 6c 0.4 Changes in the characteristics of a 40 nm ASN film with an electrode thickness were confirmed. The crystallographic characteristics of the downscaled ASN film were confirmed through Figures 7 to 8d. The electrical characteristics of the ASN film under thickness reduction were confirmed through Figures 9 to 14. The ferroelectricity of the ASN film was verified through Figures 15a and 15b.

[0046] FIG. 3 is a graph showing the residual polarization value according to the change in thickness of the first electrode of a ferroelectric memory device according to one embodiment of the present invention. The ferroelectric memory device (200) is HfN 0.4 Experiments were conducted using samples fabricated from (15–175 nm) / ASN (40 nm) / TiN (50 nm). ASN is Al 0.7 Sc 0.3 It is a ferroelectric layer composed of N, and HfN 0.4 is the first electrode and TiN is the second electrode.

[0047] Referring to Fig. 3, HfN 0.4Residual polarization (P) measured by PUND (positive up, negative down) PE (polarization-electric) field measurement using a triangular pulse of 35V amplitude and 100kHz frequency as a function of thickness r The value of ) was calculated. Residual polarization (P r The ) value is HfN 0.4 Thickness increases linearly up to 50 nm, and at a thickness of 150 nm, it is 140 μC cm -2 It becomes saturated, and then at 175 nm, the residual polarization (P r ) decreased slightly. This indicates that the ferroelectricity of the ASN film <002> Given that it is observed along the direction, HfN 0.4 As thickness increases, residual polarization (P r An increase in ) improves the crystallinity of the ASN film and follows the out-of-plane direction <002> It is determined that alignment is better in this direction. Here, the coercive field (E c Since the ) value hardly changed, HfN 0.4 It shows that the effect of stress due to changes in thickness can be neglected.

[0048] FIG. 4a shows HfN according to thickness change according to an embodiment of the present invention. 0.4 and HfN 0.4 This is a graph showing the roughness of the / ASN (40nm) sample, and Fig. 4b is HfN according to thickness change 0.4 and HfN 0.4 This is an AFM (Atomic force microscopy) image showing the roughness of / ASN (40 nm). Fig. 4c shows HfN according to thickness variation. 0.4 (upper panel) and HfN 0.4 This is a graph showing the θ-2θ XRD results for each / ASN (40nm) (lower panel) film. Specifically, HfN 0.4 (15 to 175 nm) and HfN 0.4The roughness and crystallographic properties of the (15 to 175 nm) / ASN (40 nm) samples were analyzed using atomic force microscopy (AFM) and X-ray diffraction (XRD), respectively.

[0049] Referring to FIGS. 4a and 4b, HfN 0.4 Samples and HfN 0.4 It can be seen that the roughness increased linearly in all / ASN samples. Additionally, referring to Fig. 4c, the θ-2θXRD results for each sample show that as the thickness increases, HfN 0.4 (002) As peak intensity increases, HfN 0.4 <002> The texture appears to be improved. Also, HfN 0.4 As can be seen from the / ASN sample XRD results, HfN 0.4 Since the lattice constants between the and ASN films are nearly identical, HfN as thickness increases 0.4 (002) The peak intensity appears to have increased.

[0050] ASN film is HfN 0.4 If a coherent interface is formed with, HfN 0.4 Aligned with the crystal structure, ASN out-of-plane despite surface roughness <002> It can be seen that it maintains. However, as the alignment interface degrades, the ASN film is HfN with localized wrinkles 0.4 It grows perpendicular to the surface. As a result, various directions appear at non-uniform locations, and uniform <002> It can inhibit directional growth. Therefore, HfN up to 150 nm 0.4 Residual polarization (P at thickness) r An increase in the ) value is HfN 0.4 ASN formed by the formation of a matching interface between the and the ASN film <002> This may be due to the improvement in directional growth, and 150nm thick HfN 0.4of <002> As the orientation increases, the growth of ASN films in a similar orientation also improves. However, 175 nm thick HfN 0.4 In the case of severe roughness, the matching interface is degraded, resulting in residual polarization (P r The value appears to decrease. As shown in Figures 5a to 6c, the matching interface was further confirmed using high resolution transmission electron microscopy (HRTEM).

[0051] FIGS. 5a to 5c are HfN according to an embodiment of the present invention 0.4 These are high-resolution transmission electron microscopy (HRTEM) images showing the bottom and top interfaces at low and high magnification of a (15 nm) / ASN (40 nm) / TiN (50 nm) sample, and FIGS. 6a to 6c are HfN according to an embodiment of the present invention 0.4 This is a high-resolution transmission electron microscopy (HRTEM) image showing the bottom and top interfaces at low and high magnifications of a (150nm) / ASN (40nm) / TiN (50nm) sample.

[0052] Referring to FIGS. 5a and 6a, HfN with a thickness of 150 nm 0.4 The electrode sample is HfN with a thickness of 15 nm 0.4 Roughness is higher at both the bottom and top interfaces than in the electrode sample. Referring to Figs. 5b, 5c and Figs. 6b, 6c, HfN 0.4 The ASN film adjacent to the TiN electrode is <002> It can be seen that it is well aligned in the decision direction. Specifically, ASN <002> The out-of-plane alignment of is HfN 0.4It demonstrates that this is well achieved at both the bottom and top interfaces regardless of thickness. In particular, the formation of a matched interface can be confirmed through the red rectangular area in Fig. 6b, and for HfN with a thickness of 150 nm 0.4 The electrode sample has relatively high HfN 0.4 It shows that it has roughness. HfN 0.4 The FFT result at the interface between the and the ASN film is ASN <002> and HfN 0.4 <002> Common out-of-plane direction even at coarse grain interfaces <002> It has nearly identical lattice parameters, which shows that a matched interface is being formed.

[0053] In the present invention, the crystallographic properties of ASN films with various ASN film thicknesses were further analyzed using glancing angle XRD (GIXRD) as shown in Figures 7 to 8d below.

[0054] FIG. 7 is an HfN according to an embodiment of the present invention 0.4 This is a graph showing the ASN (103) peak intensity of the (75, 150 nm) / ASN (5 to 40 nm) sample.

[0055] Referring to Fig. 7, HfN with thicknesses of 75 nm (black circle) and 150 nm (red triangle) 0.4 It shows the change in peak intensity as a function of the ASN film thickness on the film. The ASN (103) peak intensity is HfN 0.4 It is normalized to a (75nm) / ASN(40nm) sample. The ASN film is <002> In the case of texture, the ASN (103) peak is detected in GIXRD measurements at an angle of incidence of approximately 0.175°, which also indicates HfN under the ASN film 0.4 (103) Minimize the influence of the peak. The ASN (103) peak intensity is HfN 0.4In all thicknesses, it decreases as the thickness of the ASN film decreases, and generally, at a given ASN film thickness, HfN 0.4 The thinner the film, the lower the strength. In other words, at a given ASN film thickness, HfN 0.4 As the film becomes thicker, the ASN (103) peak intensity increases.

[0056] Two reasons can explain this trend: first, the degree of crystallization decreases as the ASN film thickness decreases, and thin HfN 0.4 Second, it appears that the ASN (002) is more severely degraded in the surface direction and does not satisfy Bragg's law, so it is not detected in GIXRD. To confirm the two possible reasons, HRTEM analysis was performed as shown in Figures 8a to 8d.

[0057] FIGS. 8A and 8B show HfN at the upper and lower interfaces according to an embodiment of the present invention. 0.4 HRTEM images of (75nm) / ASN(40nm) / TiN(50nm) samples, and FIGS. 8c and 8d are HfN images taken at low magnification (d) and high magnification (e), respectively. 0.4 This is an HRTEM image of a (75nm) / ASN(40nm) / TiN(50nm) sample. The inset images in Figures 8a to 8d show the FFT results of the ASN film.

[0058] Referring to Figs. 8a and 8b, in these HRTEM images and FFT results, the 40 nm thick ASN film is ASN <002> It can be confirmed that it grows well with a texture. However, the 5 nm thick ASN film contained many grains, and among them <002> The direction deviated from the direction outside the plane.

[0059] Nevertheless, no evidence of incomplete crystallization was found even in 5 nm thick ASN films. Therefore, the reduced GIXRD peak intensity at thinner thicknesses is ASN <002> This appears to be due to the growth of grains that are less aligned out-of-plane. Also, generally thicker HfN 0.4 The higher ASN (103) peak intensity at a given ASN thickness is the ASN grain of <002> This is because the direction has improved out-of-plane, and this is HfN 0.4 <002> It can be seen that this is due to better alignment of the crystal grains.

[0060] FIG. 9 shows the residual polarization (P) according to the change in coercive field according to one embodiment of the present invention. r This is a graph showing the value.

[0061] Referring to Fig. 9, HfN measured using triangular pulse PUND measurement at 100 kHz 0.4 The PE graphs of the (150nm) / ASN(4-40nm) / TiN(50nm) samples are shown. In particular, reliable polarization values ​​could be measured even in the 4nm thick ASN sample despite the degradation of the curve shape due to the intervention of leakage current.

[0062] FIG. 10 shows the residual polarization (P) according to the change in thickness of the ferroelectric layer (ASN) according to one embodiment of the present invention. r This is a graph showing the value.

[0063] Fig. 10 shows the residual polarization (P) in Fig. 9. r It summarizes the ) values, and the residual polarization (P r The value is 140-135 μC cm up to 7 nm. -2 It maintained 100 μC cm at 4 nm -2 It was found to have decreased sharply. Conventionally, the residual polarization (P calculated for ASN films of 10 nm or less) r The ) value is the theoretical residual polarization (P due to high leakage current r) fell out of the range. However, in the present invention, HfN 0.4 By utilizing the lower electrode, leakage current is sufficiently suppressed, and as the ASN thickness decreases, residual polarization (P r It was confirmed that the ) value decreased. This performance degradation indicates that as the thickness decreases, the ASN <002> This may be because the grains are not aligned in a direction out of plane (Fig. 8d).

[0064] FIG. 11 shows the anti-voltage (V) according to the change in thickness of a ferroelectric layer (ASN) according to one embodiment of the present invention. c ) and coercive field (E c This is a graph showing the ) values. Referring to Fig. 11, as the ASN thickness increases, the anti-voltage (V c Increasing ) and coercive field (E c It can be seen that ) is decreasing.

[0065] FIGS. 12a and FIGS. 12b are a coercive field (E) according to an embodiment of the present invention. c This is a graph showing the switching current values ​​according to the change. Fig. 12a shows the HfN measured through the same PUND measurement. 0.4 Shows the switching current-electric field (IE) graph of (150nm) / ASN (4nm to 40nm) / TiN (50nm) samples. Applied electric field (E max ) represents the electric field required to achieve complete switching in each sample.

[0066] Referring to Fig. 12a, for an ASN film with a thickness of 40 nm, the coercive field (E c Due to the narrow distribution of ), E max and E c A small difference occurs between them. As the thickness of the ASN film decreases, the coercive field (E c The distribution of ) widens significantly, so E max - E c The difference becomes larger. Coercive field (E c Despite the widening of ), complete switching without destruction is still possible in 4nm samples (E max< breakdown field (E bd )). However, in the 3nm sample, the coercive field (E c If ) expands significantly, the destructive electric field (E bd Even if ) is applied, E max Unable to reach (E max > E bd ) can interfere with complete switching. A wide distribution of switching peaks can cause a coercive field (E c ) indicates the existence of grains with different values, which is ASN at thin thicknesses. <002> It appears to occur because the alignment of the crystal grains is not well achieved.

[0067] Fig. 12b shows HfN with a thickness of 75 nm or 150 nm. 0.4 This shows the magnified state of several IE graphs of ASN films with a thickness of less than 5 nm. 150 nm thick HfN 0.4 The IE graph using film is reproduced from Fig. 12a. Referring to Fig. 12b, HfN 0.4 A clear ferroelectric switching peak appeared in all samples regardless of thickness. However, for the 75 nm thick HfN 0.4 When electrodes were used, significant leakage current was not eliminated even with PUND measurements, as indicated by the arrow in Fig. 12b. However, HfN 0.4 Increasing the thickness reduces the unlimited leakage current, indicating that ASN films with less aligned structures are more susceptible to leakage current. Consequently, the coercive field (E) measured in Fig. 12a at the point where half of the total switching occurs, i.e., when dI / dE = 0 c The ) value is for HfN with a thickness of 150 nm, which is the lowest thickness compared to conventional ones. 0.4 It was possible to measure even on a 4nm thick ASN film on the electrode.

[0068] FIG. 13 is d according to one embodiment of the present invention -2 / 3 coercive field (E) according to change cThis is a graph showing the ) values. Fig. 13 shows two different HfN 0.4 Coercive field (E) according to the thickness of the ASN film c Shows the change in the ) value. The inset shows 150 nm thick HfN 0.4 Antivoltage (V) as a function of ASN film thickness at the electrode c Shows the change in ). HfN 0.4 Regardless of thickness, the coercive field (E c The ) value increased as the ASN film thickness decreased. According to Kay-Dunn law, the coercive field (E) of a ferroelectric material c The value of ) is d -2 / 3 It varies in proportion to, where d is the thickness of the ferroelectric layer. HfN 0.4 The coercive field (E) of the ASN film regardless of thickness c The ) value follows Cadone's law up to 7nm. However, HfN 0.4 (75nm) / ASN(5nm) and HfN 0.4 coercive field (E) of (150nm) / ASN(4nm) c The ) value increases significantly compared to the expected trend (indicated by the arrow in Fig. 13). As previously mentioned in Fig. 12b, if the ASN film layer is thin, leakage current cannot be eliminated even by PUND measurement, so the coercive field (E c The value of ) may be inaccurately increased. However, since Caden's law assumes single-crystal polarization with fast switching speeds, the coercive field (E) of these thinnest films c The ) value is the polarization direction (ASN) of the polycrystalline grain <002> The direction) can actually increase due to the deviation from the direction of electric field application (out-of-plane direction). Thicker HfN 0.4 Such deviations can be minimized even in a 4 nm thick ASN film of the electrode. The inset in Fig. 13 shows a 150 nm thick HfN 0.4 Antivoltage (V) on a 4 nm thick ASN film of the electrode c) decreased to approximately 4.35V, showing that a notable improvement has been made in memory device applications.

[0069] FIG. 14 shows the breakdown electric field (E) according to the thickness change of a ferroelectric layer (ASN) according to one embodiment of the present invention. bd This is a graph showing the ) values. Figure 14 is HfN measured by the DC-current electric field method. 0.4 Breakdown electric field (E) of (150nm) / ASN(4 to 40nm) / TiN(50nm) samples bd Shows ). Destruction electric field (E bd ) shows a value that increases as thickness decreases, regardless of the voltage direction. The breakdown electric field (E) of AlN bd A similar trend was observed in the prior art regarding ), where as film thickness decreases, the decrease in defect density, which is the main cause of breakdown, leads to a breakdown electric field (E bd It appears that ) increased. Consequently, similar to conventional methods, as the ASN thin film thickness decreases, the number of defects in the thin film decreases, resulting in a breakdown electric field (E bd ) increases. +, - indicate the direction of voltage.

[0070] Coercive field (E c As can be seen in Fig. 13, the value increases as the ASN film thickness decreases. To measure the ferroelectricity of the thin film using a triangular pulse PUND, the breakdown electric field (E bd ) is the coercive field (E c It must be higher than ).

[0071] As mentioned above, HfN 0.4 The matching interface between the electrode and the ASN film helps reduce defect formation during deposition. Consequently, even with a 4 nm thick ASN film, the breakdown electric field (E bd ) coercive field (E c It can be increased above ), allowing ferroelectricity to be measured. However, below 4 nm, the coercive field (E c ) is the destructive electric field (E bdIt may be difficult to measure ferroelectric properties through triangular pulse PUND when the value exceeds ) value.

[0072] FIGS. 15a and FIGS. 15b are HfN according to an embodiment of the present invention 0.4 This is a graph showing the electrical characteristics of (150 nm) / ASN (3 nm to 5 nm) / TiN (50 nm) samples. To further analyze the ferroelectricity of ASN films smaller than 5 nm, the films were analyzed through square pulse PUND measurements.

[0073] Fig. 15a shows the HfN calculated using a square pulse PUND with a pulse width (pulse duration) of 10 µs. 0.4 This shows the calculated 2Pr values ​​for the (150 nm) / ASN (3 to 5 nm) / TiN (50 nm) samples. Figure 15b shows the current response to pulse voltages where switching peaks are clearly visible. In triangular pulse PUND measurements, it was difficult to measure ferroelectricity when complete switching did not occur. On the other hand, in square pulse PUND, ferroelectricity can be confirmed by the appearance of switching current peaks when P or N pulses are applied. Therefore, the 2Pr value was calculated by subtracting the area under the switching current-time (It) curve of the U(D) pulse from the P(N) pulse, as shown in Figure 15b. Figure 15a shows the electric field as the coercive field (E c When the value exceeds ), the 2Pr value increases sharply with the electric field at all thicknesses, demonstrating that ferroelectric switching occurred even in a 3 nm thick ASN film. However, similar to the results shown in Fig. 13, the calculated 2Pr value was overestimated due to insufficient removal of leakage current, falling outside the general range and failing to prevent saturation of the 2Pr value calculated in Fig. 15a. Nevertheless, consistent with Fig. 13, approximately 11-12 MV cm⁻¹ -1 The coercive field (E c Switching behavior of a 3nm thick ASN film could be observed at the value.

[0074] As mentioned above, the ultrathin ferroelectric (ASN) film reduces ferroelectricity to a thickness of 3 nm under CMOS compatible conditions and anti-voltage (V c It can be fabricated by lowering the voltage to approximately 4.35V, which is an industrially viable level. The reason scalability was possible under these conditions is that HfN forms a matching interface with ASN. 0.4 This is because electrodes were used, and negative interfacial oxidation was minimized by depositing all layers without vacuum blockage to avoid interfacial oxidation. Reducing the ASN thickness degrades c-axis alignment in the out-of-plane direction, but HfN 0.4 Increasing the thickness of the bottom electrode to 150 nm to enhance c-axis alignment improves the c-axis alignment of the ASN film, allowing the thickness to be extended to 3 nm. However, due to uncontrollable leakage current, it is difficult to verify ferroelectricity at thinner thicknesses. Nevertheless, as the ASN thin film thickness decreases, the breakdown electric field (E bd ) is the anti-telepathic voltage (E c The fact that it increases faster than the increase of ) indicates that there is greater scalability if leakage current is properly controlled, which demonstrates that it is possible to fabricate low-operating-voltage ASN devices that fully satisfy CMOS compatibility.

[0075] Furthermore, by improving the coherency between the AlScN film and the electrode (e.g., the bottom electrode), better scalability can be achieved by minimizing performance degradation at the bottom interface while maintaining CMOS compatibility. Therefore, the present invention relates to an HfN of an HCP structure. 0.4 A thin film is used as the bottom electrode (BE). HfN 0.4 The lattice constants a and c are 3.22, respectively. and 5.15 is, and this is the Al adopted in the present invention 0.7 Sc 0.3It is in very good agreement with the lattice constants a and c of the N (referred to as ASN or AScN) film (3.21 angstroms and 5.11 angstroms, with a mismatch of about 1%). Another important component is HfN without a vacuum break in a cluster-type sputtering tool to avoid inducing any negative oxidation of the nitride layer. 0.4 The method involves depositing a ferroelectric capacitor layer including a bottom electrode, an ASN ferroelectric layer, and a TiN top electrode. HfN 0.4 The thickness of the bottom electrode is a factor determining the quality of the ASN film, and 150nm thick HfN 0.4 Using a triangular pulse, the ferroelectric properties of the ASN film could be measured down to 4 nm, and the coercive voltage (Vc) decreased to approximately 4.35 V. In addition, ferroelectricity was confirmed in a 3 nm thick ASN film when measured with a square pulse. This suggests that ASN films can be industrially utilized as CMOS-compatible materials for ferroelectric memory applications.

[0076] This specification discloses preferred embodiments of the present invention. Although specific terms have been used, they are used merely in a general sense to facilitate the explanation of the technical content of the invention and to aid in understanding the invention, and are not intended to limit the scope of the invention. It is obvious to those skilled in the art that, in addition to the embodiments disclosed herein, other variations based on the technical concept of the present invention are possible. Those skilled in the art will understand that the ferroelectric device according to the embodiments described with reference to FIGS. 1a to 15b, the ferroelectric memory device including the same, and the method of manufacturing the same can be variously substituted, changed, and modified within the scope of the technical concept of the present invention. Therefore, the scope of the invention should not be determined by the described embodiments but by the technical concept described in the claims. Explanation of the symbols

[0078] * Explanation of symbols for major parts of the drawing * 100: Ferroelectric device 10: First electrode 20: Ferroelectric layer 200: Ferroelectric memory device 30: Second electrode CI: Matching interface

Claims

Claim 1 A ferroelectric device comprising: a first electrode comprising hafnium nitride; and a ferroelectric layer formed on the first electrode and comprising aluminum, scandium, and nitrogen, wherein a coherent interface is formed between the first electrode and the ferroelectric layer in which the continuity of the crystal lattice is maintained, the first electrode and the ferroelectric layer have similar hexagonal crystal structures, the crystal structure of the first electrode and the crystal structure of the ferroelectric are aligned through the coherent interface, and the thickness of the ferroelectric is greater than 0 nm and less than or equal to 40 nm. Claim 2 In claim 1, the ferroelectric layer has the formula Al 0.7 Sc 0.3 Ferroelectric device including an HCP (hexagonal close packed) structure of N. Claim 3 In claim 1, the first electrode is of the formula HfN 0.4 Ferroelectric device including an HCP structure. Claim 4 A ferroelectric device according to claim 1, wherein the ferroelectric layer exhibits ferroelectric properties even at a thickness of 10 nm or less, and the anti-coupling voltage of the ferroelectric layer is 10 V or less. Claim 5 A ferroelectric device according to claim 1, wherein the thickness of the first electrode is 10 nm or more and 200 nm or less. Claim 6 A ferroelectric device according to claim 1, wherein the mismatch between the lattice constant of the first electrode and the lattice constant of the ferroelectric layer is less than 10%. Claim 7 In claim 1, the first electrode and the ferroelectric layer <002> Ferroelectric device aligned in the crystal direction. Claim 8 In claim 1, the ferroelectric element is a ferroelectric element used in memory elements, piezoelectric elements, and solar cells. Claim 9 A ferroelectric memory device comprising: a first electrode comprising hafnium nitride; a ferroelectric layer formed on the first electrode comprising aluminum, scandium, and nitrogen; and a second electrode formed on the ferroelectric layer, wherein the first electrode and the ferroelectric layer have similar hexagonal crystal structures, a coherent interface is formed between the first electrode and the ferroelectric layer in which the continuity of the crystal lattice is maintained, the crystal structure of the first electrode and the crystal structure of the ferroelectric are aligned through the coherent interface, and the thickness of the ferroelectric layer is greater than 0 nm and less than or equal to 40 nm. Claim 10 In claim 9, the first electrode is a ferroelectric memory device having a lattice constant similar to the lattice constant of the ferroelectric layer within an error range. Claim 11 A ferroelectric memory device according to claim 9, wherein as the thickness of the first electrode decreases, the peak intensity of the (103) of the ferroelectric layer decreases, and as the thickness of the first electrode increases, the peak intensity of the (103) of the ferroelectric layer increases. Claim 12 A ferroelectric memory device according to claim 9, wherein the (002) peak intensity of the first electrode increases as the thickness of the first electrode increases. Claim 13 In claim 9, the first electrode and the ferroelectric layer <002> Ferroelectric memory device aligned in the crystal direction. Claim 14 In claim 9, the ferroelectric memory device has a tolerance voltage (V) greater than 0 and less than or equal to 10 [V]. c Ferroelectric memory device having ). Claim 15 In claim 9, as the thickness of the ferroelectric material increases, the breakdown electric field (E) of the ferroelectric memory device bd ) is a decreasing ferroelectric memory device. Claim 16 In claim 9, a ferroelectric memory device in which the leakage current of the ferroelectric memory device decreases as the thickness of the first electrode increases. Claim 17 In claim 9, the second electrode is a ferroelectric memory device comprising TiN, Pt, Ru, Au, TaN, Ir, Pd, Ru, ITO (Indium Tin Oxide), or an alloy thereof. Claim 18 A method for manufacturing a ferroelectric memory device comprising: a step of forming a first electrode comprising hafnium nitride on a substrate; a step of forming a ferroelectric layer comprising aluminum (Al), scandium (Sc), and nitrogen (N) on the first electrode; and a step of forming a second electrode on the ferroelectric layer, wherein the first electrode and the ferroelectric layer have similar hexagonal crystal structures, and in the step of forming the ferroelectric layer, a coherent interface is formed between the first electrode and the ferroelectric layer in which the continuity of the crystal lattice is maintained, and the crystal structure of the first electrode and the crystal structure of the ferroelectric are aligned at the coherent interface, and the thickness of the ferroelectric layer is greater than 0 nm and less than or equal to 40 nm. Claim 19 A method for manufacturing a ferroelectric memory device according to claim 18, wherein the steps of forming the first electrode, forming the ferroelectric layer, and forming the second electrode are performed through at least one of sputtering deposition, atomic layer deposition (ALD), physical vapor deposition (PVD), and chemical vapor deposition (CVD). Claim 20 A method for manufacturing a ferroelectric memory device according to claim 18, wherein the steps of forming the first electrode, forming the ferroelectric layer, and forming the second electrode are performed under continuous vacuum conditions (in situ). Claim 21 A method for manufacturing a ferroelectric memory device according to claim 18, wherein the concentration ratio of the aluminum and the scandium in the ferroelectric layer is 7:3.

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