Ferroelectric material structure, Ferroelectric random access memory including the same and method of fabricating the same

Abstract

A ferroelectric material structure, a ferroelectric memory device including the same, and a method for manufacturing the same are disclosed. The disclosed ferroelectric material structure includes a first electrode including hafnium nitride; a first ferroelectric layer including aluminum, scandium, and nitrogen formed on the first electrode; a second ferroelectric layer including aluminum and nitrogen formed on the first ferroelectric layer; a third ferroelectric layer having the same configuration as the first ferroelectric layer formed on the second ferroelectric layer; and a second electrode including titanium nitride formed on the third ferroelectric layer.

Description

Technology Field

[0001] The present invention relates to a ferroelectric material, a device including the same, and a related method, and more specifically, to a ferroelectric material structure, a ferroelectric memory device including the same, and a method for manufacturing the same. Background Technology

[0002] NAND flash memory, a major storage solution, stores data by trapping electric charges in silicon nitride known as charge trap nitride (CTN). CTN-based NAND flash has improved storage capacity through multi-bit storage and vertical memory cell stacking. However, this approach has faced limitations due to inter-cell interference and vertical pitch scaling.

[0003] Ferroelectric Random Access Memory (FeRAM) is emerging as a promising candidate to replace conventional NAND flash memory. As a type of non-volatile memory device, FeRAM offers the advantage of retaining information even when the power is off, as well as enabling high-speed access, consuming less power during operation, and being resistant to shock. Consequently, it is being researched and developed as a primary memory or a recording medium for audio or images in various electronic devices and equipment with file storage and retrieval functions, such as portable computers, cellular phones, and game consoles.

[0004] The above-mentioned ferroelectric memory is receiving renewed industrial attention as a non-volatile working and storage memory with the emergence of HfO2-based ferroelectrics with a fluorite structure. However, when the thickness is less than 10 nm, the metastable of the polar orthorhombic phase of the ferroelectric causes various significant problems, including a degradation of ferroelectric performance.

[0005] Ferroelectric memory stores data using ferroelectric polarization charges, offering the advantages of higher storage density and faster operation compared to CTN-based memory. However, these ferroelectric memories are limited by the forced voltage (2V) of the ferroelectric film. c It is facing problems due to the memory window (MW) being limited to twice the value of ). This limitation is due to the coercivity (E c This is prominently observed in ferroelectrics with a fluorite-structure where ) is 1 M / cm or less.

[0006] To improve this, ferroelectric aluminum scandium nitride (AlScN) with a stable hexagonal closed-packed (HCP) structure is being introduced. Aluminum scandium nitride offers distinct advantages over fluorite-based ferroelectrics, such as high coercivity and excellent thermal stability, and exhibits more uniform switching characteristics than fluorite-based ferroelectric films. However, ferroelectric devices containing aluminum scandium nitride still exhibited a narrow memory window due to a high depolarization field caused by large remanent polarization. Furthermore, since the depolarization field has a negative impact on data retention, it can cause serious problems in the performance of ferroelectric memory devices.

[0007] To achieve a wide memory window and enhanced operating stability, depolarization-resistant ferroelectric materials are required, which can be achieved by increasing the coercivity of the material. However, in ferroelectric memory devices containing aluminum scandium nitride, lowering the scandium concentration increases coercivity but undesirably increases residual polarization, thereby strengthening the depolarization field. Therefore, research on ferroelectric devices of new materials or structures is necessary. The problem to be solved

[0008] The technical problem that the present invention aims to solve is to provide a ferroelectric material structure having improved data retention by reducing the depolarization field as the residual polarization does not increase, and at the same time having improved coercivity and a wide memory window, and a ferroelectric memory device including the same.

[0009] In addition, the invention provides a method for manufacturing a ferroelectric memory device having the aforementioned advantages.

[0010] The problems that the present invention aims to solve are not limited to those mentioned above, and other unmentioned problems will be understood by those skilled in the art from the description below. means of solving the problem

[0011] A ferroelectric material structure according to one embodiment of the present invention may include: a first electrode comprising hafnium nitride; a first ferroelectric layer comprising aluminum, scandium, and nitrogen formed on the first electrode; a second ferroelectric layer comprising aluminum and nitrogen formed on the first ferroelectric layer; a third ferroelectric layer having the same configuration as the first ferroelectric layer formed on the second ferroelectric layer; and a second electrode comprising titanium nitride formed on the third ferroelectric layer.

[0012] In one embodiment, the hafnium nitride is of the formula HfN 0.4It includes an HCP (hexagonal close packed) structure, wherein the first ferroelectric layer and the third ferroelectric layer have the chemical formula Al 0.8 Sc 0.2 It may include ferroelectrics of N.

[0013] The second ferroelectric layer may include a ferroelectric with the chemical formula AlN, the thickness of the second ferroelectric layer may be greater than 0 nm and less than or equal to 40 nm, and the thickness of the stacked structure of the first ferroelectric layer to the third ferroelectric layer may be less than or equal to 80 nm.

[0014] In addition, the ferroelectric material structure may have a memory window characteristic of 7 V or more, and the ferroelectric material structure may be used in memory devices, piezoelectric devices, and solar cells.

[0015] A ferroelectric memory device according to another embodiment of the present invention comprises: a first electrode comprising hafnium nitride; a first ferroelectric layer comprising aluminum, scandium, and nitrogen formed on the first electrode; a second ferroelectric layer comprising aluminum and nitrogen formed on the first ferroelectric layer; and a third ferroelectric layer having the same configuration as the first ferroelectric layer formed on the second ferroelectric layer, and may have a memory window characteristic of 7 V or higher.

[0016] In addition, a method for manufacturing a ferroelectric memory device according to another embodiment of the present invention comprises the steps of: forming a first electrode comprising hafnium nitride on a substrate; forming a first ferroelectric layer comprising aluminum (Al), scandium (Sc), and nitrogen (N) on the first electrode; forming a second ferroelectric layer comprising aluminum and nitrogen on the first ferroelectric layer; forming a third ferroelectric layer having the same configuration as the first ferroelectric layer on the second ferroelectric layer; and forming a second electrode comprising titanium nitride on the third ferroelectric layer, and may have a memory window characteristic of 7 V or higher. Effects of the invention

[0017] According to embodiments of the present invention, by forming different ferroelectric layers between ferroelectric layers including AlScN, a ferroelectric material structure having improved data retention and improved coercivity can be provided, as the depolarization field is reduced by not increasing the residual polarization.

[0018] In addition, it has a wide memory window of 7 V or more, exhibits ferroelectric properties with a ferroelectric material structure of 80 nm or less and a second ferroelectric layer (AlN) thickness of 40 nm or less, and can provide excellent scalability and compatibility.

[0019] In addition, a method for manufacturing a ferroelectric memory device having the aforementioned advantages can be provided.

[0020] However, the effects of the present invention are not limited to the above effects and can be extended in various ways without departing from the technical concept and scope of the present invention. Brief explanation of the drawing

[0021] FIG. 1 is a cross-sectional view showing a ferroelectric device according to one embodiment of the present invention. FIGS. 2a and 2b are X-ray diffraction (XRD) θ-2θ measurement results of a ferroelectric material structure according to an embodiment of the present invention. FIG. 2c shows the current density-electric field (JE) curve of a ferroelectric material structure according to the thickness of the second ferroelectric layer, measured using the positive-up-negative-down (PUND) method according to one embodiment of the present invention. FIG. 2d is a graph showing the relationship between remanent polarization and voltage measured using a square pulse with a width of 1 μs in a ferroelectric material structure according to one embodiment of the present invention, and FIG. 2e is the thickness (t) of the second ferroelectric layer in the ferroelectric material structure according to one embodiment of the present invention. AlN Coercivity (E) according to ) c ) and residual polarization (P r It is a graph representing ). Fig. 3a is <110> It shows an atomic model of a wurtzite structure down-poled and up-poled along crystallographic directions. FIG. 3b is an iDPC-STEM image of the interface between the bottom of the second ferroelectric layer and the first ferroelectric layer of a ferroelectric material structure according to one embodiment of the present invention, and FIG. 3c and FIG. 3d are enlarged images of the second ferroelectric layer and the first ferroelectric layer regions, respectively, in the iDPC-STEM image of FIG. 3b. FIG. 3e is a high-angle annular dark-field (HAADF) STEM image of a ferroelectric material structure according to one embodiment of the present invention, FIG. 3f is an iDPC-STEM image at the interface between the first ferroelectric layer and the second ferroelectric layer of a ferroelectric material structure according to one embodiment of the present invention, and FIG. 3g is an iDPC-STEM image of the second ferroelectric layer. FIG. 4a is the result of fitting the distribution of the local electric field in each region, extracted by a non-uniform field mechanism (FIM) model for a first ferroelectric layer containing different scandium (Sc) concentrations according to one embodiment of the present invention, to a Gaussian distribution. FIGS. 4b and 4c show E according to the thickness of the second ferroelectric layer according to the scandium (Sc) concentration of the first ferroelectric layer in a ferroelectric material structure according to an embodiment of the present invention. loc Standard deviation of the distribution and remanent polarization (P) according to scandium (Sc) concentration in the first ferroelectric layer within the ferroelectric material structure r ) and coercivity (E c This is the result showing ). FIG. 4d shows polarization-voltage (PV) curves measured at low voltage for a first ferroelectric layer or a second ferroelectric layer with different scandium concentrations within a ferroelectric material structure according to one embodiment of the present invention, and FIG. 4e shows the relationship between remanent polarization and coercivity that can be had in a first ferroelectric layer with various compositional ratios. FIG. 5a shows a cross-section of a ferroelectric memory device according to an embodiment of the present invention, FIG. 5b shows the polarity according to the thickness and voltage of a second ferroelectric layer in a ferroelectric memory device according to an embodiment of the present invention, and FIG. 5c shows the drain current versus gate-source voltage (I) of a ferroelectric memory device according to an embodiment of the present invention. d -V gs It represents the curve. FIG. 5d shows a ferroelectric memory device according to an embodiment of the present invention, in which a program (PGM) pulse with a width of 1000 ms is applied to the gate and the corresponding threshold voltage (V th This is the result of measuring the change in ). FIG. 5e is a current-voltage (I) as a function of PGM pulse voltage of a ferroelectric memory device according to one embodiment of the present invention. d -V gs ) is a graph, and FIG. 5f is a graph of the change in threshold voltage (V) before and after PGM according to the thickness of the second ferroelectric layer in a ferroelectric memory device according to an embodiment of the present invention. th ) and 1 / C multi This is a graph representing . FIG. 6a is a graph showing the change in threshold voltage of the ferroelectric memory device (1000) of the present invention, and FIG. 6b is a graph showing the change in threshold voltage according to the pulse amplitude of the ferroelectric memory device of the present invention. FIG. 6c shows the change in pulse amplitude as a function of pulse width to achieve a target memory window value of 7 V of the ferroelectric memory device of the present invention, and FIG. 6d shows the thickness (t) of the second dielectric layer in the ferroelectric memory device of the present invention. AlN This is a graph showing the change in the memory window according to ). FIG. 6e is 10 to compare the performance of a ferroelectric memory device according to one embodiment of the present invention 4 This is the result of evaluating the memory retention capability of a ferroelectric memory device by measuring the percentage of the memory window maintained after 2 seconds. FIG. 6f is the result of an experiment on the effect of the channel length of a ferroelectric memory device according to one embodiment of the present invention on the ferroelectric memory device, and FIG. 6g shows the threshold voltage according to the length of the channel layer of the ferroelectric memory device of the present invention according to the state of the memory device. FIG. 6h is a graph showing an Incremental Step Pulse Programming (ISPP) curve for verifying the program efficiency of a ferroelectric memory device according to one embodiment of the present invention, and FIG. 6i is a graph showing the state and distribution that a plurality of ferroelectric memory devices may have according to one embodiment of the present invention. Specific details for implementing the invention

[0022] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings.

[0023] The embodiments of the present invention described below are provided to more clearly explain the present invention to those skilled in the art, and the scope of the present invention is not limited by the following embodiments, and the following embodiments may be modified in various other forms.

[0024] The terms used herein are for describing specific embodiments and are not intended to limit the invention. Terms used herein in the singular form may include plural forms unless the context clearly indicates otherwise. Additionally, the terms “comprise” and / or “comprising” used herein specify the presence of the mentioned features, steps, numbers, actions, components, elements, and / or groups thereof, and do not exclude the presence or addition of one or more other features, steps, numbers, actions, components, elements, and / or groups thereof. Furthermore, the term “connected” used herein means not only that components are directly connected, but also includes the concept of indirectly connecting components through the interposition of additional components between them.

[0025] Furthermore, when a component is described in this specification as being located "on" another component, this includes not only cases where a component is in contact with another component, but also cases where another component exists between the two components. The term "and / or" as used in this specification includes any one of the listed items and all combinations of one or more thereof. Additionally, terms of degree such as "about" and "substantially" as used in this specification are used to mean a range of numerical values ​​or degrees or approximate values, taking into account inherent manufacturing and material tolerances, and are used to prevent an infringer from unfairly exploiting the disclosures in which precise or absolute figures provided to aid in understanding this specification are mentioned.

[0026] Embodiments of the present invention will be described in detail below with reference to the attached drawings. The sizes or thicknesses of the areas or parts depicted in the attached drawings may be slightly exaggerated for the clarity of the specification and convenience of explanation. Throughout the detailed description, the same reference numerals indicate the same components.

[0027] FIG. 1 is a cross-sectional view showing a ferroelectric material structure (100) according to one embodiment of the present invention.

[0028] Referring to FIG. 1, the ferroelectric material structure (100) comprises a first electrode (10), a first ferroelectric layer (20) formed on the first electrode (10) and comprising aluminum, scandium, and nitrogen, a second ferroelectric layer (30) formed on the first ferroelectric layer (20) and comprising aluminum and nitrogen, a third ferroelectric layer (40) having the same composition as the first ferroelectric layer (10) formed on the second ferroelectric layer (30), and a second electrode (50) formed on the third ferroelectric layer (40).

[0029] The first electrode (10) may include hafnium nitride, and the hafnium nitride has the chemical formula HfN 0.4 It may have a hexagonal close packed (HCP) structure. The hafnium nitride may then be used as a bottom electrode (BE) to minimize lattice mismatch with the ferroelectric material formed on the first electrode (10) containing the hafnium nitride.

[0030] The first ferroelectric layer (20) is formed on the first electrode (10) and may include aluminum, scandium, and nitrogen (AlScN). For example, the first ferroelectric layer (20) has the chemical formula Al 1-x Sc x It includes the HCP (hexagonal close packed) structure of N, and similarly, the first electrode (10) has the chemical formula HfN 0.4It may include an HCP structure. In this specification, the Al of the first ferroelectric layer (20) 1-x Sc x The scandium (Sc) concentration (x) in the N film was fixed at 0.2, and if it was not 0.2, it was indicated.

[0031] The second ferroelectric layer (30) is formed on the first ferroelectric layer (10) and may include aluminum and nitrogen (AlN). The thickness (t) of the second ferroelectric layer AlN ) can have a range of 0 to 40 nm, and when the thickness is 0, it represents an AlScN monolayer, and when the thickness is 40 nm, it represents an AlN monolayer.

[0032] The third ferroelectric layer (40) may be formed on the second ferroelectric layer (30) and may include a material having the same composition as the first ferroelectric layer (20). The first ferroelectric layer (20) to the third ferroelectric layer (40) may be deposited and crystallized without a vacuum process, and the total thickness of these multilayers may be 20 to 60 nm, preferably 40 nm.

[0033] The second electrode (50) may be formed on the third ferroelectric layer (40). The second electrode may include a metal, and preferably may include titanium nitride (TiN).

[0034] A ferroelectric material structure (100) having the above structure adjusts the ratio of the second ferroelectric layer (30) and the first and third ferroelectric layers (20, 40) within a multilayer to achieve a remanent polarization (P r ) and coercivity (E c ) can be controlled. This indicates that the multilayer of the ferroelectric material structure (100) of the present invention can isolate important material properties to meet device requirements.

[0035] FIGS. 2a and 2b are X-ray diffraction (XRD) θ-2θ measurement results of a ferroelectric material structure according to an embodiment of the present invention.

[0036] Referring to FIG. 2a and 2b, the second ferroelectric layer (30) and the first or third ferroelectric layer (20, 40) within the ferroelectric material structure (100) of the present invention <002> It can be confirmed that the crystal orientation is aligned out-of-plane. HfN 0.4 (101) Although the peak (002) of the first or third ferroelectric layer (20, 40) near 35.5° overlaps with the peak (002) of the first or third ferroelectric layer (20, 40) near 35.5°, the thickness (t) of the second ferroelectric layer (30) AlN As ) increases, it can be observed that there is a distinct shift to a higher 2θ region. This result may occur because the compressive residual stress of the first ferroelectric layer (20) is higher than the compressive residual stress of the second ferroelectric layer (30). When the thickness of the ferroelectric material structure (100) is 40 nm, the first ferroelectric layer (20) and the second ferroelectric layer (30) exhibited residual stresses of -1.9 and -1.3 GPa, respectively.

[0037] FIG. 2c shows the current density-electric field (JE) curve of a ferroelectric material structure (100) according to the thickness of the second ferroelectric layer (30), measured using a positive-up-negative-down (PUND) method according to an embodiment of the present invention. Referring to FIG. 2c, the thickness (t) of the second ferroelectric layer (30) within the ferroelectric material structure (100) AlN It can be confirmed that ferroelectric switching occurs regardless of ), but it can be seen that a ferroelectric material structure (100) in which only the second ferroelectric layer (30) is formed without the first and third ferroelectric layers (20, 40) shows failure before ferroelectric switching and is not measured.

[0038] Additionally, according to another embodiment of the present invention, a double-layer structure in which a second ferroelectric layer (30) is disposed on the top or bottom of a first or third ferroelectric layer (20, 40) may also exhibit ferroelectric switching. However, since such a double-layer structure may exhibit excessive leakage current at a specific bias voltage due to an asymmetric interface, a symmetric multilayer structure such as AlScN / AlN / AlScN is preferred for the ferroelectric material structure (100) according to one embodiment of the present invention.

[0039] FIG. 2d is a graph showing the relationship between remanent polarization and voltage measured using a square pulse with a width of 1 μs in a ferroelectric material structure according to one embodiment of the present invention, and FIG. 2e is the thickness (t) of the second ferroelectric layer in the ferroelectric material structure according to one embodiment of the present invention. AlN Coercivity (E) according to ) c ) and residual polarization (P r It is a graph representing ).

[0040] Referring to FIG. 2d, the thickness (t) of the second ferroelectric layer (30) within the ferroelectric material structure (100) AlN Regardless of ) 2 x Residual Polarization (2P r ) can be maintained constant within the range of -200 to 200 μC / cm². On the other hand, referring to FIG. 2e, the thickness (t) of the second ferroelectric layer (30) AlN As ) increases, coercivity (E c ) increased linearly, for example, as the thickness increased from 0 to 36 nm, it increased from 7.0 MV / cm to 8.6 MV / cm. Therefore, the ferroelectric material structure (100) of the present invention has a symmetric multilayer structure such as AlScN / AlN / AlScN, and a second ferroelectric layer (30) comprising AlN with a thickness in the range of 30 nm or more and less than 40 nm would be preferred.

[0041] In addition, it was confirmed whether the ferroelectric switching of the first ferroelectric layer (20) in the ferroelectric material structure according to one embodiment of the present invention induces the switching of the second ferroelectric layer (30). First, FIG. 3a is <110> It shows an atomic model of a wurtzite structure down-poled and up-poled along crystallographic directions.

[0042] FIG. 3b is an iDPC-STEM image of the interface between the bottom of the second ferroelectric layer and the first ferroelectric layer of a ferroelectric material structure according to one embodiment of the present invention, and FIG. 3c and FIG. 3d are enlarged images of the regions of the second ferroelectric layer (AlN) and the first ferroelectric layer (AlScN) in the iDPC-STEM image of FIG. 3b.

[0043] A ferroelectric material structure (HfN) in which the thickness of the second ferroelectric layer is 18 nm is obtained by applying -36 V to the second electrode (TE) while the first electrode (BE) is initially grounded. 0.4 The AlScN / AlN / AlScN / TiN) was polarized upward. Referring to Figures 3b to 3d, it can be seen that both the AlN layer and the AlScN layer exhibit upward polarization.

[0044] Subsequently, +36V was applied to the second electrode (TE) of the ferroelectric material structure to polarize it downward, and then STEM analysis was performed. FIG. 3e is a high-angle annular dark-field (HAADF) STEM image of the ferroelectric material structure according to one embodiment of the present invention, FIG. 3f is an iDPC-STEM image of the interface between the first ferroelectric layer and the second ferroelectric layer of the ferroelectric material structure according to one embodiment of the present invention, and FIG. 3g is an iDPC-STEM image of the second ferroelectric layer (AlN). Referring to FIG. 3e to FIG. 3g, downward polarization can be confirmed in both the first ferroelectric layer (AlScN) and the second ferroelectric layer (AlN). In this way, the alignment of polarization of the second ferroelectric layer (AlN) according to the poling direction enables ferroelectric conversion of the AlN layer, which is the second ferroelectric layer (30), within the ferroelectric material structure (100) containing the AlScN layer, unlike general non-ferroelectric behavior.

[0045] This phenomenon may be due to electrostatic energy generated at the interface between the non-switched first ferroelectric layer and the second ferroelectric layer. The electrostatic energy generated in the second ferroelectric layer is lower than the homogeneous switching barrier of the second ferroelectric layer. However, since the wortzite structure material switches through various non-polar intermediate structures, the switching barrier may be lower than that of homogeneous switching. Therefore, even if switching does not occur in the single-layer second ferroelectric layer (AlN), high electrostatic energy at the interface of the multilayer structure can enable switching of the second ferroelectric layer.

[0046] Figure 4a shows the result of fitting the distribution of the local electric field in each region, extracted by the Non-uniform Field Mechanism (FIM) model for the first ferroelectric layer containing different scandium (Sc) concentrations, to a Gaussian distribution. Referring to Figure 4a, E app , E loc , f(E loc / E app ) are the applied electric field, the local electric field of each region, and E, respectively.loc Representing the distribution function, as the concentration of scandium (Sc) increases from 0.2 to 0.3, E loc It can be seen that the standard deviation of the distribution increases from 0.04 to 0.09.

[0047] FIGS. 4b and 4c show E according to the thickness of the second ferroelectric layer (AlN) according to the scandium (Sc) concentration of the first ferroelectric layer in a ferroelectric material structure according to an embodiment of the present invention. loc Standard deviation of the distribution and remanent polarization (P) according to scandium (Sc) concentration in the first ferroelectric layer within the ferroelectric material structure r ) and coercivity (E c This is the result showing ). Referring to Fig. 4b, when a first ferroelectric layer having the same scandium concentration is included and only the thickness of the second ferroelectric layer is varied, E loc The distribution remains unchanged, and the thickness of the second ferroelectric layer (t AlN The intrinsic characteristics of the first ferroelectric layer can be displayed regardless of ). In addition, referring to Fig. 4c, the remanent polarization (P r It can be seen that ) also does not depend on the thickness of the second ferroelectric layer. These results suggest that in a multilayer ferroelectric material structure, the remanent polarization (P r ) and E loc This is because the distribution is determined by the characteristics of the first ferroelectric layer.

[0048] On the other hand, coercivity (E c ) increased linearly with the thickness of the second ferroelectric layer, and it was observed that the slope became steeper as the scandium concentration of the first ferroelectric layer increased. This coercivity (E c The linear increase in ) is because the second ferroelectric layer has a lower permittivity compared to the first ferroelectric layer.

[0049] FIG. 4d shows polarization-voltage (PV) curves measured at low voltage for a first ferroelectric layer or a second ferroelectric layer with different scandium concentrations, and FIG. 4e shows the remanent polarization (P) that can be had in the first ferroelectric layer with various compositional ratios. r ) and coercivity (E c Represents the relationship of ).

[0050] Referring to Fig. 4d, the slope in the graph is the dielectric constant (ε) of each layer AlN = 10.1, ε AlScN It represents (= 12.8 ~ 17.0), and ε AlN / ε Al(Sc)(N) decreased as the scandium (Sc) concentration in the first ferroelectric layer increased. In addition, ferroelectric switching occurs when the electric field applied to the first ferroelectric layer within the ferroelectric material structure is a voltage-reducing field (E C,Al(S)(c)(N) If it occurs when it reaches ), the electric field of the ferroelectric material structure can be expressed as Equation 1 below.

[0051]

[0052] This is the coercivity (E) of the ferroelectric material structure. c ) is the thickness of the second ferroelectric layer (t AlN It can be confirmed that it increases linearly according to ), and the slope derived from the above mathematical equation 1 matched the slope observed in the coercivity graph according to the thickness of the second ferroelectric layer in Fig. 4c. Therefore, an electric field is applied to the first ferroelectric layer, and the electric field E C,Al(S)(c)N When it reaches, ferroelectric switching in the ferroelectric material structure can begin. Consequently, the coercivity (E) in the ferroelectric material structure c ) is the thickness of the second ferroelectric layer (t AlN While it is linearly proportional to ), residual polarization (P r ) and E loc Ferroelectric properties such as distribution can be maintained consistently with the properties of the first ferroelectric layer. Therefore, the multilayer ferroelectric material structure has a remanent polarization (Pr ) and coercivity (E c It enables decoupling of the proportional relationship between ) and, by referring to Fig. 4e, can provide enhanced flexibility in designing and optimizing ferroelectric properties to meet the requirements of various applications.

[0053] FIG. 5a shows a cross-section of a ferroelectric memory device according to one embodiment of the present invention. In order to evaluate the feasibility of a ferroelectric material structure (100) for a data storage application, the present invention fabricated an a-IGZO (In:Ga:Zn=1:1:1) FeTFT as an example of a ferroelectric memory device as shown in FIG. 5a, which includes a ferroelectric material structure (100) as a ferroelectric layer.

[0054] Referring to FIG. 5a, a ferroelectric memory device (1000) comprises a substrate (not shown), a ferroelectric material structure (100'), an a-IGZO thin film layer (200), and a TiN source / drain electrode (300). The substrate may be composed of a material comprising one or more of silicon and silicon dioxide. The ferroelectric material structure (100') may be deposited on the substrate using RF sputtering according to a capacitor manufacturing process, and the ferroelectric material structure (100') may include a first electrode (10) and first to third ferroelectric layers (20 to 40). The ferroelectric material structure (100') may have the same configuration and material as the component having the same reference numeral as the ferroelectric material structure (100) described with reference to FIG. 1.

[0055] Subsequently, the a-IGZO thin film layer (200) can be deposited to a thickness of 20 nm by RF magnetron sputtering using a ceramic target with an In:Ga:Zn ratio of 1:1:1 under conditions of 300 W output, 5 m Torr operating pressure, and 60 sccm Ar gas flow rate at room temperature. The a-IGZO thin film layer (200) can be patterned using photolithography and wet-etched with a diluted hydrofluoric acid solution to define the channel area. Source and drain contacts are patterned using photolithography, a 100 nm thick TiN layer is deposited via DC sputtering, and then a lift-off process is performed. Finally, furnace annealing is performed at room temperature of 350°C to mitigate deposition damage to the TiN source / drain electrodes (300) and improve contact characteristics with the a-IGZO channel (200).

[0056] The thickness of the first to third ferroelectric layers (20 to 40) can be fixed at 40 nm, and the thickness of the second ferroelectric layer (t AlN ) can be varied between 0 and 30 nm. FIG. 5b shows the thickness of the second ferroelectric layer (20) and the polarity according to voltage in a ferroelectric memory device (1000) according to one embodiment of the present invention. Referring to FIG. 5b, it can be seen that the ferroelectric memory device (1000) has symmetric polarity according to the applied voltage, and the thickness (t) of the second ferroelectric layer (20) AlN It can be seen that as ) increases from 0 to 30 nm, the range of polarity decreases.

[0057] FIG. 5c is a drain current versus gate-source voltage (I) of a ferroelectric memory device (1000) according to one embodiment of the present invention. d -V gs This represents the ) curve. Referring to Fig. 5c, this graph shows the drain-source voltage (V ds When ) is 0.5 V, V gsThis is a curve measured as V increases from -5 V to 8 V. At this time, the width (W) of the a-IGZO channel (200) ch ) and length (L ch ) are 20 µm and 30 µm, respectively. (W ch / L ch Threshold voltage (V) extracted at a current level of ) x 10⁻⁷ A th ) is the thickness of the second ferroelectric layer (t AlN It can be confirmed that it remains constant regardless of ).

[0058] FIG. 5d shows a ferroelectric memory device (1000) according to an embodiment of the present invention, wherein a program (PGM) pulse with a width of 1000 ms is applied to the gate and the corresponding threshold voltage (V th This is the result of measuring the change of ). Referring to FIG. 5d, a ferroelectric memory device (1000) according to one embodiment of the present invention includes an a-IGZO thin film layer (200), and since the a-IGZO channel is an n-type semiconductor, it can provide enough electrons to block positive charges, so it can be confirmed that efficient PGM operation is possible.

[0059] FIG. 5e is a current-voltage (I) as a function of PGM pulse voltage of a ferroelectric memory device (1000) according to one embodiment of the present invention. d -V gs ) is a graph. Referring to FIG. 5e, when the second ferroelectric layer (20) has the same thickness, as the amplitude of the PGM pulse increases, the domain switches upward and the threshold voltage (V th It can be confirmed that ) decreases. In addition, when the entire switching is complete, the threshold voltage (V th It was evident that PGM operation was completed as ) reached saturation. Change in threshold voltage before and after PGM (V th ) can be expressed by the following mathematical formula 2.

[0060]

[0061] Here, P f and σt represents a change in ferroelectricity and trapped charge at the interface between the third ferroelectric layer (40) and the a-IGZO thin film layer (200) before and after the PGM, and C multi represents multilayer capacitance.

[0062] FIG. 5f shows the change in threshold voltage (V) before and after PGM according to the thickness of the second ferroelectric layer in a ferroelectric memory device according to one embodiment of the present invention. th ) and 1 / C multi This is a graph representing . As explained earlier with reference to Fig. 2d, the remanent polarization (Pr) is the thickness (t) of the second ferroelectric layer AlN It can be maintained constant in the ferroelectric material structure regardless of ). Therefore, the charge difference at the interface between the third ferroelectric layer (40) and the a-IGZO (200) may be independent of the thickness of the second ferroelectric layer. However, as the thickness of the second ferroelectric layer increases, C multi Since is decreasing, V th can increase. Referring to Fig. 5f, the change in threshold voltage (V) before and after the PGM th ) is 1 / C multi It can be confirmed that it increases in proportion to.

[0063] However, in the ferroelectric memory device (1000) according to one embodiment of the present invention, problems may occur during the erase (ERS) operation because there is insufficient positive charge (hole carrier) in the a-IGZO channel (200). When a negative voltage pulse is applied to the gate for the erase operation, the electric field may not be effectively applied to the ferroelectric material structure. Therefore, ferroelectric switching may occur only in localized regions near the source and drain electrodes due to the floating electric field effect.

[0064] FIG. 6a is a graph showing the change in threshold voltage of the ferroelectric memory device (1000) of the present invention. In order to accurately measure the memory window (MW) of the ferroelectric memory device (1000), the change in threshold voltage as a function of PGM and ERS pulse amplitudes was measured. Referring to FIG. 6a, the memory window (MW) was calculated using the saturation point of the threshold voltage after PGM and ERS operation, respectively V th,PGM and V th,ERS It was indicated as, and V th_PGM is approximately 16.7 V, and V th_ERS It can be confirmed that it is approximately 9.9 V.

[0065] FIG. 6b shows the change in threshold voltage according to the pulse amplitude of the ferroelectric memory device of the present invention. Referring to FIG. 6b, the pulse amplitude of the device was 100 ms, and the threshold voltage (V) according to the write voltage during PGM and ERS operation th ) varies, and the change in threshold voltage can be -9 to -18, which is approximately 9V. Fig. 6c shows the change in pulse amplitude as a function of pulse width to achieve the target memory window value of 7V for the ferroelectric memory device of the present invention. Referring to Fig. 6c, the write voltage with respect to pulse width in the PGM and ERS states showed a similar pattern and was inversely proportional as the pulse width increased. That is, due to the trade-off between pulse width and amplitude for ferroelectric switching, it was confirmed that a higher voltage is required for both PGM and ERS operation as the pulse becomes shorter.

[0066] FIG. 6d shows the thickness (t) of the second dielectric layer in the ferroelectric memory device of the present invention. AlN This is a graph showing the change in the memory window according to ). Referring to Fig. 6d, this measurement utilized a pulse with a width of 100 ms, and the thickness of the second dielectric layer (t AlN As ) increases, the memory window increases, and t AlNIt can be seen that at this 30 nm, the memory window increased up to a maximum of 12 V.

[0067] In addition, to compare the performance of a ferroelectric memory device according to one embodiment of the present invention, 10 4 The memory retention capability of the ferroelectric memory device was evaluated by measuring the percentage of the memory window maintained after t seconds, as shown in FIG. 6e. Referring to FIG. 6e, the normalized memory device and retention rate of the ferroelectric memory device fabricated with various ferroelectric materials and active layers, and the memory device according to an embodiment of the present invention with the thickness of the second ferroelectric layer within the ferroelectric memory material varied, can be confirmed. The thickness of the second ferroelectric layer (t AlN When the value is 30 nm, it can be seen that the normalized memory window and retention rate are the highest among ferroelectric memory devices, and therefore, the ferroelectric material structure (100) of the present invention can provide the ability to expand the memory window and ensure long-term data preservation.

[0068] FIG. 6f is the result of an experiment on the effect of the channel length of a ferroelectric memory device (1000) according to one embodiment of the present invention on the ferroelectric memory device. This experiment was conducted on the length (L) of the a-IGZO channel layer (200). ch Varying ) from 300 nm to 5 μm, the drain current (I) according to the gate voltage (V) d ) was measured. Referring to FIG. 6f, a ferroelectric memory device (1000) having a second ferroelectric layer (30) with a thickness of 30 nm has a total channel layer length (L ch It shows a counter-clockwise hysteresis loop over the length (L) of the channel layer (200). The drain current (Id) is the length (L) of the channel layer (200). ch ) and width (W ch It was normalized using ). In addition, the ferroelectric memory device (2000) of the present invention is normalized using the gate voltage (V) of the PGM state. th, PGM) is the length of the channel layer (L ch While it remains relatively constant regardless of ), the gate voltage (V in the ERS state) th ERS) may have the characteristic of increasing as the length of the channel layer decreases.

[0069] FIG. 6g illustrates the threshold voltage according to the length of the channel layer of the ferroelectric memory device of the present invention according to the state of the memory device. Referring to FIG. 6g, the length (L) of the channel layer (200) ch As ) decreases, the threshold voltage in the ERS state increases, reaching -6.5 V when the channel layer length is 300 nm. When the channel length is long, ferroelectric switching may be limited because the electric field is not effectively applied to the central region of the channel. However, when the channel layer length is reduced below a specific threshold, the stray electric field affects the entire channel, thereby enabling effective ERS switching. Furthermore, since the a-IGZO channel can continuously supply sufficient electrons regardless of the channel layer length, the threshold voltage (V) in the consistent PGM state th It can guarantee (, PGM). Therefore, the shorter the length of the channel layer, the more efficient ERS operation is possible, and thus the memory window can be increased. When the length of the channel layer is 300 nm, the memory window reaches 15 V, exceeding the quad-level cell operation threshold and confirming the potential for PLC data storage.

[0070] FIG. 6h is a graph showing an Incremental Step Pulse Programming (ISPP) curve for verifying the program efficiency of a ferroelectric memory device according to an embodiment of the present invention. Referring to FIG. 6h, after erasing the ferroelectric memory device, a PGM pulse of step 0.2 V is applied to V thThe change was measured, and an ISPP curve with a maximum slope of 2 was observed. This exceeds the theoretical ISPP slope limit of 1 for CTN-based NAND. Through this improved slope, the ferroelectric memory device of the present invention can provide efficient and fault-free multi-level operation.

[0071] The ferroelectric memory device of the present invention can have 32 different states (not shown). Referring to FIG. 6i, it is shown that 20 ferroelectric memory devices can have the above 32 states, and that the 32 states are densely distributed. Therefore, it can be confirmed that the ferroelectric memory device of the present invention enables the realization of PLC and possesses uniformity.

[0072] A ferroelectric material structure (100) according to one embodiment of the present invention has a multilayer structure and may include AlScN / AlN / AlScN layers. This multilayer structure can ferroelectrically switch upper and lower AlScN layers by ferroelectrically switching the AlN layers inserted between the AlScN layers. However, since the AlN layer has a lower dielectric constant than the AlScN layer, by changing the ratio of the AlN layer in the ferroelectric material structure (100), the remanent polarization (P r ) is not changed and coercivity (E c ) can be modulated. This decoupling can significantly improve the design flexibility of ferroelectrics with wortzite structures and extend their adaptability to various device applications.

[0073] Additionally, a ferroelectric memory device (1000) according to another embodiment of the present invention may include an a-IGZO thin film layer (200) and the ferroelectric material structure (100). The ferroelectric memory device FeFFT having such a structure can provide further enhanced memory window and retention characteristics. The ISPP method achieved 32 individual states and verified PLC operation. These performance highlights the potential of AlScN-based FeFETs as a promising alternative to existing NAND devices and can provide new possibilities for future memory technology.

[0074] This specification discloses preferred embodiments of the present invention. Although specific terms have been used, they are used merely in a general sense to facilitate the explanation of the technical content of the invention and to aid in understanding the invention, and are not intended to limit the scope of the invention. It is obvious to those skilled in the art that, in addition to the embodiments disclosed herein, other variations based on the technical concept of the present invention are possible. Those skilled in the art will understand that the ferroelectric device according to the embodiments described with reference to FIGS. 1a to 15b, the ferroelectric memory device including the same, and the method of manufacturing the same can be variously substituted, changed, and modified within the scope of the technical concept of the present invention. Therefore, the scope of the invention should not be determined by the described embodiments but by the technical concept described in the claims. Explanation of the symbols

[0075] * Explanation of symbols for major parts of the drawing * 100: Ferroelectric material structure 10: First electrode 20: First ferroelectric layer 30: Second ferroelectric layer 40: Third ferroelectric layer 50: Second electrode 1000: Ferroelectric memory device 200: α-IGZO thin film layer 300: Source / Drain Electrode

Claims

Claim 1 A ferroelectric material structure comprising: a first electrode comprising hafnium nitride; a first ferroelectric layer comprising aluminum, scandium, and nitrogen formed on the first electrode; a second ferroelectric layer comprising aluminum and nitrogen formed on the first ferroelectric layer; a third ferroelectric layer having the same composition as the first ferroelectric layer formed on the second ferroelectric layer; and a second electrode comprising titanium nitride formed on the third ferroelectric layer. Claim 2 In claim 1, the hafnium nitride is of the formula HfN 0.4 Ferroelectric material structure having an HCP (hexagonal close packed) structure. Claim 3 In claim 1, the first ferroelectric layer and the third ferroelectric layer are of the formula Al 0.8 Sc 0.2 Ferroelectric material structure containing a ferroelectric material of N. Claim 4 In claim 1, the second ferroelectric layer comprises a ferroelectric material structure having the chemical formula AlN. Claim 5 A ferroelectric material structure according to claim 1, wherein the thickness of the second ferroelectric layer is greater than 0 nm and less than or equal to 40 nm. Claim 6 A ferroelectric material structure according to claim 1, wherein the thickness of the stacked structure of the first to third ferroelectric layers is 80 nm or less. Claim 7 In claim 1, the first ferroelectric layer and the second ferroelectric layer <002> Ferroelectric material structure aligned in the crystal direction. Claim 8 In claim 1, the ferroelectric material structure is a ferroelectric material structure having a memory window characteristic of 7 V or more. Claim 9 In claim 1, the ferroelectric material structure is a ferroelectric material structure used in memory devices, piezoelectric devices, and solar cells. Claim 10 A ferroelectric memory device comprising: a first electrode comprising hafnium nitride; a first ferroelectric layer comprising aluminum, scandium, and nitrogen formed on the first electrode; a second ferroelectric layer comprising aluminum and nitrogen formed on the first ferroelectric layer; and a third ferroelectric layer having the same configuration as the first ferroelectric layer formed on the second ferroelectric layer, and having a memory window characteristic of 7 V or more. Claim 11 In claim 10, the hafnium nitride is of the formula HfN 0.4 Ferroelectric memory device having an HCP (hexagonal close packed) structure. Claim 12 In claim 10, the first ferroelectric layer and the third ferroelectric layer are of the formula Al 0.8 Sc 0.2 Ferroelectric memory device including a ferroelectric N. Claim 13 In claim 10, the second ferroelectric layer comprises a ferroelectric material having the chemical formula AlN, in a ferroelectric memory device. Claim 14 A ferroelectric memory device according to claim 10, wherein the thickness of the second ferroelectric layer is greater than 0 nm and less than or equal to 40 nm. Claim 15 A ferroelectric material structure according to claim 1, wherein the thickness of the stacked structure of the first to third ferroelectric layers is 80 nm or less. Claim 16 A method for manufacturing a ferroelectric memory device having a memory window characteristic of 7 V or higher, comprising: a step of forming a first electrode comprising hafnium nitride on a substrate; a step of forming a first ferroelectric layer comprising aluminum (Al), scandium (Sc), and nitrogen (N) on the first electrode; a step of forming a second ferroelectric layer comprising aluminum and nitrogen on the first ferroelectric layer; a step of forming a third ferroelectric layer having the same configuration as the first ferroelectric layer on the second ferroelectric layer; and a step of forming a second electrode comprising titanium nitride on the third ferroelectric layer.

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