Display device and driving method of the same

Abstract

A display device according to the present invention comprises a display panel including a plurality of pixels, a reference voltage generator, a controller, and a data driver. The reference voltage generator corrects at least one of a first and a second gamma reference voltage based on a dimming control signal and outputs a corrected reference voltage. The controller receives an input image signal and a dimming value, converts the dimming value into the dimming control signal and provides it to the reference voltage generator, and converts the input image signal into image data. The data driver generates a plurality of gamma voltages based on the corrected reference voltage and converts the image data into data voltages based on the plurality of gamma voltages and provides them to the pixels.

Description

Technology Field

[0001] The present invention relates to a display device and a method for driving the same, and more specifically, to a display device and a method for driving the same capable of improving display quality. Background Technology

[0002] The display device includes a display panel and a panel driver. The display panel includes scan lines, data lines, and pixels. The panel driver includes a scan driver that provides a scan signal to the scan lines and a data driver that provides a data signal to the data lines. Each pixel can emit light with a brightness corresponding to a data voltage provided through the corresponding data line in response to a scan signal provided through the corresponding scan line.

[0003] The data driver can convert gamma voltages corresponding to multiple grayscales into data voltages having grayscale values. The problem to be solved

[0004] The present invention aims to provide a display device and a driving method thereof for improving the problem of degraded display quality after dimming. means of solving the problem

[0005] A display device according to one feature of the present invention includes a display panel comprising a plurality of pixels, a reference voltage generator, a controller, and a data driver. The reference voltage generator corrects at least one of a first and a second gamma reference voltage based on a dimming control signal and outputs a corrected reference voltage. The controller receives an input image signal and a dimming value, converts the dimming value into the dimming control signal and provides it to the reference voltage generator, and converts the input image signal into image data. The data driver generates a plurality of gamma voltages based on the corrected reference voltage and converts the image data into data voltages based on the plurality of gamma voltages and provides them to the pixels.

[0006] A driving method for a display device according to one feature of the present invention comprises the steps of: receiving an input image signal and a dimming value; converting the dimming value into a dimming control signal and converting the input image signal into image data; generating a first and a second gamma reference voltage; correcting at least one of the first and second gamma reference voltages based on the dimming control signal to output a corrected reference voltage; generating a plurality of gamma voltages based on the corrected reference voltage; converting the image data into data voltages based on the plurality of gamma voltages; and displaying an image using the data voltages and the driving voltage. Effects of the invention

[0007] According to the present invention, by correcting one of the first and second gamma reference voltages according to the dimming value, gradation can be expressed without loss of gradation even at low brightness. Therefore, the problem of degraded display quality during dimming can be improved.

[0008] In addition, even when the driving voltage is corrected to reduce power consumption, the correction reference voltage is adjusted to reflect the corrected driving voltage, thereby reducing power consumption while preventing gradation loss due to dimming. Brief explanation of the drawing

[0009] FIG. 1 is a block diagram of a display device according to one embodiment of the present invention. Figure 2 is a block diagram showing some of the configurations illustrated in Figure 1. Figure 3a is an internal block diagram of the reference voltage generator shown in Figure 2. FIG. 3b is a drawing showing a dimming lookup table according to one embodiment of the present invention. FIGS. 4a to 4c are drawings showing a gamma voltage generator that outputs different gamma voltages depending on the correction reference voltage. FIG. 5 is a circuit diagram of a pixel according to one embodiment of the present invention. FIG. 6 is a timing diagram according to an embodiment of the present invention for explaining the operation of a pixel illustrated in FIG. 5. FIG. 7 is a block diagram showing a part of the configuration of a display device according to one embodiment of the present invention. Figure 8 is an internal block diagram of the panel voltage generator illustrated in Figure 7. Figure 9 is an internal block diagram of the reference voltage generator shown in Figure 7. FIG. 10 is a flowchart illustrating a method of driving a display device according to one embodiment of the present invention. FIG. 11 is a flowchart illustrating a method of driving a display device according to one embodiment of the present invention. Specific details for implementing the invention

[0010] In this specification, where a component (or region, layer, part, etc.) is described as being “on,” “connected,” or “joined” another component, it means that it may be directly placed / connected / joined on the other component, or that a third component may be placed between them.

[0011] Identical reference numerals denote identical components. Additionally, in the drawings, the thicknesses, proportions, and dimensions of components are exaggerated for the effective illustration of the technical content. “And / or” includes all one or more combinations that the associated components may define.

[0012] Terms such as "first," "second," etc., may be used to describe various components, but said components should not be limited by said terms. These terms are used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be named the second component, and similarly, the second component may be named the first component. A singular expression includes a plural expression unless the context clearly indicates otherwise.

[0013] Additionally, terms such as “below,” “lower,” “on,” and “upper” are used to describe the relationships between the components depicted in the drawings. These terms are relative concepts and are described based on the directions indicated in the drawings.

[0014] Terms such as "include" or "have" are intended to specify the existence of the features, numbers, steps, actions, components, parts, or combinations thereof described in the specification, and should be understood as not precluding the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.

[0015] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as generally understood by those skilled in the art to which the present invention pertains. Furthermore, terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and should not be interpreted in an overly ideal or overly formal sense unless explicitly defined herein.

[0016] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0017] FIG. 1 is a block diagram of a display device according to an embodiment of the present invention. FIG. 2 is a block diagram showing some configurations shown in FIG. 1. FIG. 3a is an internal block diagram of a reference voltage generator shown in FIG. 2, and FIG. 3b is a diagram showing a dimming lookup table according to an embodiment of the present invention.

[0018] Referring to FIG. 1, the display device (DD) includes a display panel (DP), a panel driver for driving the display panel (DP), and a controller (100) for controlling the operation of the panel driver. In one example of the present invention, the panel driver includes a data driver (200), a reference voltage generator (250), a scan driver (300), a light-emitting driver (350), and a panel voltage generator (400).

[0019] The controller (100) receives an input image signal (RGB) and a control signal (CTRL) from an external source (e.g., a host processor). In one example of the present invention, the host processor may be a Graphic Processing Unit (GPU). The input image signal (RGB) may include a red image signal, a green image signal, and a blue image signal. The controller (100) generates image data (I_data) by converting the data format of the input image signal (RGB) to match the interface specifications with the data driver (200). Based on the control signal (CTRL), the controller (100) generates a first drive control signal (SCS), a second drive control signal (DCS), and a third drive control signal (ECS).

[0020] The controller (100) can receive a preset dimming value (DBV) from a host processor. The dimming value (DBV) may be a value set so that the display device (DD) can display an image corresponding to a target brightness level. The dimming value (DBV) may be one value selected from a plurality of dimming values. The controller (100) generates a dimming control signal (S_DBV) based on the dimming value (DBV). The dimming control signal (S_DBV) may be a digital signal consisting of several bits. The dimming control signal (S_DBV) may have different digital values ​​depending on the magnitude of the dimming value (DBV). For example, if the dimming control signal (S_DBV) is composed of a 3-bit signal, when the dimming value (DBV) has a maximum brightness value, the dimming control signal (S_DBV) may have a digital value of 111, and when the dimming value (DBV) has a minimum brightness value (e.g., 4 nit), the dimming control signal (S_DBV) may have a digital value of 000. However, the number of bits of the dimming control signal (S_DBV) is not specifically limited.

[0021] Referring to FIGS. 1, 2 and 3a, a reference voltage generator (250) receives a dimming control signal (S_DBV) from a controller (100). The reference voltage generator (250) includes a voltage generation unit (251), a voltage correction unit (252), and a first memory (253). The voltage generation unit (251) receives an input voltage (Vin) and generates a gamma reference voltage based on the input voltage (Vin). In one example of the present invention, the gamma reference voltage includes a first gamma reference voltage (Vref_H) and a second gamma reference voltage (Vref_L). The first gamma reference voltage (Vref_H) may have a higher voltage level than the second gamma reference voltage (Vref_L). For example, the first gamma reference voltage (Vref_H) may be 7V, and the second gamma reference voltage (Vref_L) may be 1V.

[0022] The voltage correction unit (252) receives a first gamma reference voltage (Vref_H) and a second gamma reference voltage (Vref_L) from the voltage generation unit (251). The voltage correction unit (252) receives a dimming control signal (S_DBV) from the controller (100) and corrects at least one of the first gamma reference voltage (Vref_H) and the second gamma reference voltage (Vref_L) based on the dimming control signal (S_DBV). In one example of the present invention, the voltage correction unit (252) corrects the second gamma reference voltage (Vref_L) based on the dimming control signal (S_DBV) to generate a corrected reference voltage (C_Vref_L). However, the present invention is not limited thereto. Alternatively, the voltage correction unit (252) may correct only the first gamma reference voltage (Vref_H) or correct both the first and second gamma reference voltages (Vref_H, Vref_L) based on the dimming control signal (S_DBV).

[0023] The correction reference voltage (C_Vref_L) may have a voltage level between the first gamma reference voltage (Vref_H) and the second gamma reference voltage (Vref_L). When the first gamma reference voltage (Vref_H) is 7V and the second gamma reference voltage (Vref_L) is 1V, the correction reference voltage (C_Vref_L) may have a voltage level greater than or equal to 1V and less than 7V.

[0024] A dimming lookup table (LUTa) may be stored in the first memory (253). Voltage correction values ​​for each magnitude of the dimming control signal (S_DBV) may be stored in the dimming lookup table (LUTa). In FIG. 3b, for convenience of explanation, the dimming control signal (S_DBV) is shown as a luminance value corresponding to the dimming value (DBV), but the actual dimming control signal (S_DBV) may be a digital signal converted from the dimming value (DBV). The voltage correction values ​​may include first voltage correction values ​​(Cv_H1~Cv_Hp) for correcting the first gamma reference voltage (Vref_H) and second voltage correction values ​​(Cv_L1~Cv_Lp) for correcting the second gamma reference voltage (Vref_L).

[0025] The voltage correction unit (252) can select a final voltage correction value (Cv) corresponding to the magnitude of the dimming control signal (S_DBV) from the dimming lookup table (LUTa) and correct the gamma reference voltage using the selected final voltage correction value (Cv). For example, when the dimming control signal (S_DBV) has a maximum value (MHB), the voltage correction unit (252) can select a first high voltage correction value (Cv_H1) and / or a first low voltage correction value (Cv_L1) as the final voltage correction value (Cv). When the dimming control signal (S_DBV) has a corresponding magnitude of 50 nits, the voltage correction unit (252) can select a p-2 high voltage correction value (Cv_Hp-2) and / or a p-2 low voltage correction value (Cv_p-2) as the final voltage correction value (Cv).

[0026] As an example of the present invention, the voltage correction unit (252) can select a second voltage correction value corresponding to the magnitude of the dimming control signal (S_DBV) in the dimming lookup table (LUTa) as the final voltage correction value (Cv), and correct the second gamma reference voltage (Vref_L) using the selected second voltage correction value to generate a correction reference voltage (C_Vref_L).

[0027] Alternatively, when the dimming control signal (S_DBV) has a maximum value (MHB), the voltage correction unit (252) may not perform correction for the first and second gamma reference voltages (Vref_H, Vref_L). When the voltage correction unit (252) does not perform correction for the first and second gamma reference voltages (Vref_H, Vref_L), the first and second gamma reference voltages (Vref_H, Vref_L) may be output from the reference voltage generator (250).

[0028] The data driver (200) receives a second drive control signal (DCS) and image data (I_data) from the controller (100). The data driver (200) includes a gamma voltage generator (201) and a D / A converter (202). The gamma voltage generator (201) receives a first gamma reference voltage (Vref_H) and a correction reference voltage (C_Vref_L) from the reference voltage generator (250). The gamma voltage generator (201) generates a plurality of gamma voltages (VGMA1~VGMAk) using the first gamma reference voltage (Vref_H) and the correction reference voltage (C_Vref_L).

[0029] The D / A converter (202) receives a plurality of gamma voltages (VGMA1 to VGMAk) from the gamma voltage generator (201). The D / A converter (202) converts image data (I_data) into data voltages (DV1 to DVm) using the plurality of gamma voltages (VGMA1 to VGMAk). In FIG. 2, the D / A converter (202) is shown as directly receiving image data (I_data) from the controller (100), but the present invention is not limited thereto. For example, the data driver (200) may further include a shift register placed between the controller (100) and the D / A converter (202), and in this case, the D / A converter (202) may receive image data (I_data) through the shift register.

[0030] The data driver (200) outputs data voltages (DV1~DVm) converted through the D / A converter (202) to a plurality of data lines (DL1~DLm) provided on the display panel (DP). The data voltages are analog voltages corresponding to the grayscale values ​​of the image data (I_data). In FIG. 2, the D / A converter (202) is shown as directly outputting the data voltages (DV1~DVm) to the display panel (DP), but the present invention is not limited thereto. For example, the data driver (200) may further include an output buffer placed between the D / A converter (202) and the display panel (DP). In this case, the data voltages (DV1~DVm) converted through the D / A converter (202) are provided to the output buffer, and the display panel (DP) can receive the data voltages (DV1~DVm) through the output buffer.

[0031] The scan driver (300) receives a first drive control signal (SCS) from the controller (100). The scan driver (300) can output scan signals to scan lines in response to the first drive control signal (SCS).

[0032] The panel voltage generator (400) generates voltages required for the operation of the display panel (DP). In this embodiment, the panel voltage generator (400) generates a first driving voltage (ELVDD) (or may be referred to as the driving voltage), a second driving voltage (ELVSS), a first initialization voltage (VINT), and a second initialization voltage (AINT).

[0033] The display panel (DP) includes initialization scan lines (SIL1~SILn), compensation scan lines (SCL1~SCLn), write scan lines (SWL1~SWLn+1), light emission control lines (EML1~EMLn), data lines (DL1~DLm), and pixels (PX). Although not shown in the drawing, the display panel (DP) may further include black scan lines. The initialization scan lines (SIL1~SILn), compensation scan lines (SCL1~SCLn), write scan lines (SWL1~SWLn+1), light emission control lines (EML1~EMLn), data lines (DL1~DLm), and pixels (PX) may be placed in a display area (DA). The initialization scan lines (SIL1~SILn), compensation scan lines (SCL1~SCLn), write scan lines (SWL1~SWLn+1), and light emission control lines (EML1~EMLn) extend in a second direction (DR2). The initialization scan lines (SIL1~SILn), compensation scan lines (SCL1~SCLn), write scan lines (SWL1~SWLn+1), and light emission control lines (EML1~EMLn) are arranged spaced apart from each other in a first direction (DR1). The data lines (DL1~DLm) extend in a first direction (DR1) and are arranged spaced apart from each other in a second direction (DR2).

[0034] Multiple pixels (PX) are each electrically connected to initialization scan lines (SIL1–SILn), compensation scan lines (SCL1–SCLn), write scan lines (SWL1–SWLn+1), light emission control lines (EML1–EMLn), and data lines (DL1–DLm). Each of the multiple pixels (PX) can be electrically connected to four scan lines. For example, the pixels of the first row can be connected to the first initialization scan line (SIL1), the first compensation scan line (SCL1), the first write scan line (SWL1), and the second write scan line (SWL2). Additionally, the pixels of the second row can be connected to the second initialization scan line (SIL2), the second compensation scan line (SCL2), and the second and third write scan lines (SWL2, SWL3).

[0035] The scan driver (300) may be placed in the non-display area (NDA) of the display panel (DP). The scan driver (300) may output initial scan signals to initial scan lines (SIL1~SILn) and write scan signals to write scan lines (SWL1~SWLn+1) in response to a first drive control signal (SCS) provided by the controller (100). Additionally, the scan driver (300) may output compensation scan signals to compensation scan lines (SCL1~SCLn) in response to the first drive control signal (SCS).

[0036] The light-emitting driver (350) receives a third drive control signal (ECS) from the controller (100). The light-emitting driver (350) can output light-emitting control signals to the light-emitting control lines (EML1 to EMLn) in response to the third drive control signal (ECS). In another embodiment, a scan driver (300) may be connected to the light-emitting control lines (EML1 to EMLn). In this case, the scan driver (300) can output light-emitting control signals to the light-emitting control lines (EML1 to EMLn).

[0037] Each of the plurality of pixels (PX) includes a light-emitting element (ED, see FIG. 5) and a pixel circuit (PXC, see FIG. 5) that controls the light emission of the light-emitting element (ED). The pixel circuit (PXC) may include a plurality of transistors and capacitors. The scan driver (300) and the light-emitting driver (350) may include transistors formed through the same process as the pixel circuit (PXC).

[0038] Each of the plurality of pixels (PX) receives a first driving voltage (ELVDD), a second driving voltage (ELVSS), a first initialization voltage (VINT), and a second initialization voltage (AINT) from a panel voltage generator (400).

[0040] FIGS. 4a to 4c are drawings illustrating a gamma voltage generator that outputs different gamma voltages according to a correction reference voltage. FIG. 4a shows a first gamma reference voltage (Vref_H) and a first correction reference voltage (C1_Vref_L) supplied to the gamma voltage generator (201) when the dimming value (DBV) has a maximum luminance value, and shows gamma voltages (VGMA1~VGMAk) output from the gamma voltage generator (201). FIG. 4b shows a first gamma reference voltage (Vref_H) and a second correction reference voltage (C2_Vref_L) supplied to the gamma voltage generator (201) when the dimming value (DBV) is 200 nit, and shows gamma voltages (VGMA1a~VGMAka) output from the gamma voltage generator (201). FIG. 4c shows the first gamma reference voltage (Vref_H) and the third correction reference voltage (C3_Vref_L) supplied to the gamma voltage generator (201) when the dimming value (DBV) is 50 nits, and the gamma voltages (VGMA1b~VGMAkb) output from the gamma voltage generator (201).

[0041] As illustrated in FIGS. 2 and FIGS. 4a, when the dimming value (DBV) has a maximum brightness value, a first gamma reference voltage (Vref_H) and a first correction reference voltage (C1_Vref_L) may be output from the reference voltage generator (250). In this case, the first gamma reference voltage (Vref_H) may have a voltage level of 7V, and the first correction reference voltage (C1_Vref_L) may have a voltage level of 1V, which is the same as the second gamma reference voltage (Vref_L). That is, the second gamma reference voltage (Vref_L) may be output as the first correction reference voltage (C1_Vref_L) without substantial correction. Here, the first gamma reference voltage (Vref_H) is a voltage that determines the voltage level for the lowest grayscale among the grayscales that the image data (I-data) can express, and the first correction reference voltage (C1_Vref_L) is a voltage that determines the voltage level for the highest grayscale among the grayscales that the image data (I-data) can express.

[0042] The gamma voltage generator (201) may include k+1 resistors (R1 to Rk+1) connected in series between the first gamma reference voltage (Vref_H) and the first correction reference voltage (C1_Vref_L). Here, k may be determined according to the number of bits of the image data (I_data). For example, if the image data (I_data) is 8-bit data, k may be 255. The gamma voltage generator (201) may generate k gamma voltages (VGMA1 to VGMAk) based on the first gamma reference voltage (Vref_H) and the first correction reference voltage (C1_Vref_L). The k gamma voltages (VGMA1 to VGMAk) may have voltage levels between the first gamma reference voltage (Vref_H) (e.g., 7V) and the first correction reference voltage (C1_Vref_L) (e.g., 1V). As an example of the present invention, the deviation between the first gamma reference voltage (Vref_H) and the first correction reference voltage (C1_Vref_L) may be approximately 6V.

[0043] As illustrated in FIGS. 2 and FIGS. 4b, when the dimming value (DBV) has a luminance value of 200 nits, a first gamma reference voltage (Vref_H) and a second correction reference voltage (C2_Vref_L) may be output from a reference voltage generator (250). In one example of the present invention, the first gamma reference voltage (Vref_H) may have a voltage level of 7V, and the second correction reference voltage (C2_Vref_L) may have a voltage level of 5V. Here, the first gamma reference voltage (Vref_H) is a voltage that determines the voltage level for the lowest grayscale among the grayscales that the image data (I-data) can express, and the second correction reference voltage (C2_Vref_L) is a voltage that determines the voltage level for the highest grayscale among the grayscales that the image data (I-data) can express.

[0044] The gamma voltage generator (201) may include k+1 resistors (R1 to Rk+1) connected in series at the first gamma reference voltage (Vref_H) and the second correction reference voltage (C2_Vref_L). That is, even if the second gamma reference voltage (Vref_L) is corrected to the second correction reference voltage (C2_Vref_L) and the deviation between the second correction reference voltage (C2_Vref_L) and the first gamma reference voltage (Vref_H) is reduced to 2V, the number of resistors (R1 to Rk+1) placed between the first gamma reference voltage (Vref_H) and the second correction reference voltage (C2_Vref_L) can be maintained at k+1. Therefore, even if the voltage level of the second correction reference voltage (C2_Vref_L) increases above the second gamma reference voltage (Vref_L) according to the dimming value (DBV), the resolution of the gamma voltage generator (201) may not decrease. As such, since the resolution of the gamma voltage generator (201) does not decrease, it is possible to express gradations richly at the same level as the maximum brightness (MHB) without gradation loss even at intermediate brightness.

[0045] As illustrated in FIG. 2 and FIG. 4c, when the dimming value (DBV) has a luminance value of 50 nits, a first gamma reference voltage (Vref_H) and a third correction reference voltage (C3_Vref_L) may be output from the reference voltage generator (250). In one example of the present invention, the first gamma reference voltage (Vref_H) may have a voltage level of 7V, and the third correction reference voltage (C3_Vref_L) may have a voltage level of 6V. Here, the first gamma reference voltage (Vref_H) is a voltage that determines the voltage level for the lowest grayscale among the grayscales that the image data (I-data) can express, and the third correction reference voltage (C3_Vref_L) is a voltage that determines the voltage level for the highest grayscale among the grayscales that the image data (I-data) can express.

[0046] The gamma voltage generator (201) may include k+1 resistors (R1 to Rk+1) connected in series at the first gamma reference voltage (Vref_H) and the third correction reference voltage (C3_Vref_L). That is, even if the second gamma reference voltage (Vref_L) is corrected to the third correction reference voltage (C3_Vref_L) and the deviation between the third correction reference voltage (C3_Vref_L) and the first gamma reference voltage (Vref_H) is reduced to 1V, the number of resistors (R1 to Rk+1) placed between the first gamma reference voltage (Vref_H) and the third correction reference voltage (C3_Vref_L) can be maintained at k+1. Therefore, even if the voltage level of the third correction reference voltage (C3_Vref_L) increases above the second gamma reference voltage (Vref_L) according to the dimming value (DBV), the resolution of the gamma voltage generator (201) may not decrease. As such, since the resolution of the gamma voltage generator (201) does not decrease, it is possible to express gradations richly at the same level as the maximum brightness (MHB) without gradation loss even at low brightness.

[0047] FIGS. 4a to 4c illustrate that the gamma voltage generator (201) includes a single gamma string, but the present invention is not limited thereto. For example, the gamma voltage generator (201) may include a gamma string for a red image signal, a gamma string for a green image signal, and a gamma string for a blue image signal. In this case, the reference voltage generator (250) may individually generate first to third correction reference voltages (C1_Vref_L, C2_Vref_L, C3_Vref_L) for the red image signal, first to third correction reference voltages (C1_Vref_L, C2_Vref_L, C3_Vref_L) for the green image signal, and first to third correction reference voltages (C1_Vref_L, C2_Vref_L, C3_Vref_L) for the blue image signal. Additionally, when the reference voltage generator (250) corrects the second gamma reference voltages (Vref_L) to the first to third correction reference voltages (C1_Vref_L, C2_Vref_L, C3_Vref_L), it can correct using different correction values ​​depending on the red, green, and blue image signals.

[0048] FIG. 5 is a circuit diagram of a pixel according to an embodiment of the present invention. FIG. 6 is a timing diagram according to an embodiment of the present invention for explaining the operation of the pixel illustrated in FIG. 5.

[0049] FIG. 5 illustrates an exemplary equivalent circuit diagram of one pixel (PXij) among the plurality of pixels shown in FIG. 1. Since each of the plurality of pixels has the same circuit structure, a detailed description of the remaining pixels is omitted in the description of the circuit structure for the pixel (PXij). The pixel (PXij) is connected to the i-th data line (DLi) (hereinafter referred to as the data line) among the data lines (DL1~DLm) and the j-th light emission control line (EMLj) (hereinafter referred to as the light emission control line) among the light emission control lines (EML1~EMLn). The pixel (PXij) is connected to the j-th initialization scan line (SILj) (hereinafter referred to as the initialization scan line) among the initialization scan lines (SIL1~SILn), the j-th write scan line (SWLj) (hereinafter referred to as the first write scan line) and the j+1-th write scan line (SWLj+1) (hereinafter referred to as the second write scan line) among the write scan lines (SWL1~SWLn+1). Additionally, pixel (PXij) is connected to the j-th compensation scan line (SCLj) (hereinafter referred to as the compensation scan line) among the compensation scan lines (SCL1 to SCLn). Alternatively, pixel (PXij) may be connected to a separate j-th black scan line instead of the j+1-th write scan line (SWLj+1).

[0050] The pixel (PXij) includes a light-emitting element (ED) and a pixel circuit (PXC). The light-emitting element (ED) may include a light-emitting diode. The light-emitting diode may include an organic light-emitting material, an inorganic light-emitting material, quantum dots, and quantum rods as a light-emitting layer.

[0051] The pixel circuit (PXC) comprises first to seventh transistors (T1, T2, T3, T4, T5, T6, T7) and one capacitor (Cst). Each of the first to seventh transistors (T1 to T7) may be a transistor having a low-temperature polycrystalline silicon (LTPS) semiconductor layer. All of the first to seventh transistors (T1 to T7) may be P-type transistors. However, the configuration of the circuit (PXC) according to the present invention is not limited to the embodiment shown in FIG. 5. The pixel circuit (PXC) shown in FIG. 5 is merely an example, and the configuration of the pixel circuit (PXC) may be modified. For example, some of the first to seventh transistors (T1 to T7) may be P-type transistors, and the remaining some may be N-type transistors. For example, among the first to seventh transistors (T1 to T7), the first, second, fifth to seventh transistors (T1, T2, T5 to T7) are P-type transistors, and the third and fourth transistors (T3, T4) may be N-type transistors having an oxide semiconductor as the semiconductor layer.

[0052] The initialization scan line (SILj), the compensation scan line (SCLj), the first and second write scan lines (SWLj, SWLj+1), and the light emission control line (EMLj) can each transmit the j-th initialization scan signal (SIj, hereinafter referred to as the initialization scan signal), the j-th compensation scan signal (SCj, hereinafter referred to as the compensation scan signal), the j-th write scan signal (SWj, hereinafter referred to as the write scan signal), the j+1-th write scan signal (SBj, hereinafter referred to as the black scan signal), and the j-th light emission control signal (EMj, hereinafter referred to as the light emission control signal) to the pixel (PXij). The data line (DLi) transmits the data voltage (DVi) to the pixel (PXij). The data voltage (DVi) may have a voltage level corresponding to the gradation of the corresponding input image signal among the input image signals (RGB) input to the display device (DD, see FIG. 1). The first to fourth driving voltage lines (VL1, VL2, VL3, VL4) can each transmit a first driving voltage (ELVDD), a second driving voltage (ELVSS), a first initialization voltage (VINT), and a second initialization voltage (AINT) to a pixel (PXij).

[0053] The first transistor (T1) includes a first electrode connected to the first driving voltage line (VL1) via the fifth transistor (T5), a second electrode electrically connected to the anode of the light-emitting element (ED) via the sixth transistor (T6), and a gate electrode connected to one end of the capacitor (Cst). The first transistor (T1) can receive the data voltage (DVi) transmitted by the data line (DLi) according to the switching operation of the second transistor (T2) and supply a driving current (Id) to the light-emitting element (ED).

[0054] The second transistor (T2) includes a first electrode connected to a data line (DLi), a second electrode connected to the first electrode of the first transistor (T1), and a gate electrode connected to the first write scan line (SWLj). The second transistor (T2) is turned on according to a write scan signal (SWj) received through the first write scan line (SWLj) and can transmit a data voltage (DVi) transmitted from the data line (DLi) to the first electrode of the first transistor (T1).

[0055] The third transistor (T3) includes a first electrode connected to the second electrode of the first transistor (T1), a second electrode connected to the gate electrode of the first transistor (T1), and a gate electrode connected to the compensation scan line (SCLj). The third transistor (T3) is turned on according to a compensation scan signal (SCj) received through the compensation scan line (SCLj) to connect the gate electrode of the first transistor (T1) and the second electrode to each other, thereby allowing the first transistor (T1) to be diode-connected.

[0056] The fourth transistor (T4) includes a first electrode connected to the gate electrode of the first transistor (T1), a second electrode connected to a third voltage line (VL3) to which a first initialization voltage (VINT) is transmitted, and a gate electrode connected to an initialization scan line (SILj). The fourth transistor (T4) can perform an initialization operation by turning on according to an initialization scan signal (SIj) received through the initialization scan line (SILj) to transmit a first initialization voltage (VINT) to the gate electrode of the first transistor (T1) and initialize the voltage of the gate electrode of the first transistor (T1).

[0057] The fifth transistor (T5) includes a first electrode connected to the first driving voltage line (VL1), a second electrode connected to the first electrode of the first transistor (T1), and a gate electrode connected to the light emission control line (EMLj).

[0058] The sixth transistor (T6) includes a first electrode connected to the second electrode of the first transistor (T1), a second electrode connected to the anode of the light-emitting element (ED), and a gate electrode connected to the light-emitting control line (EMLj).

[0059] The fifth transistor (T5) and the sixth transistor (T6) are turned on simultaneously according to the light emission control signal (EMj) received through the light emission control line (EMLj). The first driving voltage (ELVDD) applied through the turned-on fifth transistor (T5) can be delivered to the light-emitting element (ED) after being compensated through the diode-connected first transistor (T1).

[0060] The seventh transistor (T7) includes a first electrode connected to the second electrode of the sixth transistor (T6), a second electrode connected to a fourth voltage line (VL4) through which a second initialization voltage (AINT) is transmitted, and a gate electrode connected to a second write scan line (SWLj+1).

[0061] One end of the capacitor (Cst) is connected to the gate electrode of the first transistor (T1) as described above, and the other end is connected to the first driving voltage line (VL1). The cathode of the light-emitting element (ED) can be connected to the second driving voltage line (VL2) that transmits the second driving voltage (ELVSS).

[0062] Referring to FIGS. 5 and 6, the light emission control signal (EMj) has a high level during the non-emissive period (NEP). During the non-emissive period (NEP), the initialization scan signal (SIj) is activated. During the activation period (AP1) (hereinafter referred to as the first activation period) of the initialization scan signal (SIj), if a low-level initialization scan signal (SIj) is provided through the initialization scan line (SILj), the fourth transistor (T4) is turned on in response to the low-level initialization scan signal (SIj). The first initialization voltage (VINT1) is transmitted to the gate electrode of the first transistor (T1) through the turned-on fourth transistor (T4), and the gate electrode of the first transistor (T1) is initialized with the first initialization voltage (VINT). Thus, the first activation period (AP1) can be defined as the initialization period of the pixel (PXij).

[0063] Next, the compensation scan signal (SCj) and the write scan signal (SWj) are activated. The compensation scan signal (SCj) and the write scan signal (SWj) may be activated simultaneously during the second activation period (AP2). In one example of the present invention, the first activation period (AP1) may not overlap with the second activation period (AP2). When a low-level compensation scan signal (SCj) is supplied through the compensation scan line (SCLj), the third transistor (T3) is turned on. The first transistor (T1) is diode-connected by the turned-on third transistor (T3) and is forward-biased. During the second activation period (AP2), the second transistor (T2) is turned on by the low-level write scan signal (SWj). Then, a compensation voltage ("DVi-Vth"), which is reduced by the threshold voltage (Vth) of the first transistor (T1) from the data voltage (DVi) supplied from the data line (DLi), is applied to the gate electrode of the first transistor (T1). That is, the potential of the gate electrode of the first transistor (T1) can be the compensation voltage ("DVi-Vth").

[0064] A first driving voltage (ELVDD) and a compensation voltage ("DVi-Vth") are applied to both ends of the capacitor (Cst), and a charge corresponding to the voltage difference between the two ends can be stored in the capacitor (Cst). Here, the second activation section (AP2) may be referred to as the compensation section or write section of the pixel (PXij).

[0065] Meanwhile, the black scan signal (SBj) has a low level during the third activation period (AP3). In one example of the present invention, the third activation period (AP3) may not overlap with the second activation period (AP2). During the third activation period (AP3), the seventh transistor (T7) is turned on by receiving the low-level black scan signal (SBj) through the second write scan line (SWLj+1). A portion of the driving current (Id) can be discharged through the seventh transistor (T7) as a bypass current (Ibp) by the seventh transistor (T7). When the seventh transistor (T7) is turned on in response to the black scan signal (SBj), the anode of the light-emitting element (ED) can be initialized to the second initialization voltage (AINT).

[0066] When a pixel (PXij) displays a black image, if the light-emitting element (ED) emits light even though the minimum driving current of the first transistor (T1) flows as the driving current (Id), the pixel (PXij) cannot display a black image normally. Therefore, the seventh transistor (T7) in the pixel (PXij) according to one embodiment of the present invention can distribute a portion of the minimum driving current of the first transistor (T1) as a bypass current (Ibp) to a current path other than the current path toward the light-emitting element (ED). Here, the minimum driving current of the first transistor (T1) refers to the current flowing to the first transistor (T1) under the condition that the gate-source voltage (Vgs) of the first transistor (T1) is smaller than the threshold voltage (Vth) and the first transistor (T1) is turned off. Under this condition of turning off the first transistor (T1), the minimum driving current flowing to the first transistor (T1) (e.g., a current of 10 pA or less) is delivered to the light-emitting element (ED), thereby displaying a black gradation image. When the pixel (PXij) displays a black image, the influence of the bypass current (Ibp) on the minimum driving current is relatively large, whereas when displaying an image such as a normal image or a white image, the influence of the bypass current (Ibp) on the driving current (Id) is almost negligible. Therefore, when displaying a black image, a current (i.e., light-emitting current (Ied)) reduced by the amount of the bypass current (Ibp) that exits from the driving current (Id) through the seventh transistor (T7) is supplied to the light-emitting element (ED), thereby clearly expressing the black image. Accordingly, the pixel (PXij) can implement an accurate black gradation image using the seventh transistor (T7), and as a result, the contrast ratio can be improved.

[0067] Next, the light emission control signal (EMj) supplied from the light emission control line (EMLj) is changed from a high level to a low level. The fifth and sixth transistors (T5, T6) are turned on by the low-level light emission control signal (EMj). Then, a driving current (Id) is generated according to the voltage difference between the voltage of the gate electrode of the first transistor (T1) and the first driving voltage (ELVDD), and the driving current (Id) is supplied to the light-emitting element (ED) through the sixth transistor (T6), causing current (Ied) to flow in the light-emitting element (ED).

[0068] FIG. 7 is a block diagram showing a partial configuration of a display device according to an embodiment of the present invention, FIG. 8 is an internal block diagram of a panel voltage generator shown in FIG. 7, and FIG. 9 is an internal block diagram of a reference voltage generator shown in FIG. 7. For components shown in FIG. 7 and FIG. 9 that are identical to components shown in FIG. 2 and FIG. 3a, the same reference numerals are used, and redundant descriptions thereof are omitted.

[0069] Referring to FIG. 7, the controller (100a) can receive a preset power saving signal (PSV) from the host processor. The power saving signal (PSV) may be a value set so that the display device (DD) can display an image at a target power. The power saving signal (PSV) may be one signal selected from a plurality of power saving signals. The controller (100a) generates a power control signal (S_PSV) based on the power saving signal (PSV). The power control signal (S_PSV) may be a digital signal consisting of several bits. The power control signal (S_PSV) may have different digital values ​​depending on the magnitude of the power saving signal (PSV). For example, if the power control signal (S_PSV) is composed of a 2-bit signal, when the power saving signal (PSV) has a maximum power value, the power control signal (S_PSV) may have a digital value of 11, and when the power saving signal (PSV) has a minimum power value, the power control signal (S_PSV) may have a digital value of 00. However, the number of bits of the power control signal (S_PSV) is not specifically limited.

[0070] Referring to FIGS. 7 and 8, a panel voltage generator (400a) receives a power control signal (S_PSV) from a controller (100a). The panel voltage generator (400a) includes a panel voltage generation unit (401), a driving voltage correction unit (402), and a second memory (403). The panel voltage generation unit (401) can generate voltages required to drive a display panel (DP), for example, first and second driving voltages (ELVDD, ELVSS) and first and second initialization voltages (VINT, AINT). In one example of the present invention, the first driving voltage (ELVDD) may be 5V and the second driving voltage (ELVSS) may be -2.5V. The first and second initialization voltages (VINT, AINT) may have a lower voltage level than the second driving voltage (ELVSS).

[0071] The second driving voltage (ELVSS) and the first and second initialization voltages (VINT, AINT) generated from the panel voltage generation unit (401) can be supplied to the display panel (DP). In one example of the present invention, the first driving voltage (ELVDD) can be supplied to the driving voltage correction unit (402). The driving voltage correction unit (402) receives a power control signal (S_PSV) from the controller (100a) and corrects the first driving voltage (ELVDD) based on the power control signal (S_PSV).

[0072] A power lookup table may be stored in the second memory (403). Power correction values ​​(Pv) corresponding to the magnitude of the power control signal (S_PSV) may be stored in the power lookup table. The driving voltage correction unit (402) may select a power correction value (Pv) corresponding to the magnitude of the power control signal (S_PSV) from the power lookup table and correct the first driving voltage (ELVDD) using the selected power correction value (Pv). Hereinafter, the corrected first driving voltage (ELVDD) is referred to as the corrected driving voltage (C_ELVDD).

[0073] The corrected driving voltage (C_ELVDD) generated from the driving voltage correction unit (402) can be provided to the display panel (DP). If the power control signal (S_PSV) has a maximum magnitude, the correction of the first driving voltage (ELVDD) may not be substantially performed. That is, the corrected driving voltage (C_ELVDD) may have the same voltage level as the first driving voltage (ELVDD). Meanwhile, if the power control signal (S_PSV) has a magnitude smaller than the maximum magnitude, the driving voltage correction unit (402) can generate the corrected driving voltage (C_ELVDD) by lowering the voltage level of the first driving voltage (ELVDD) by the power correction value (Pv).

[0074] The driving voltage correction unit (402) can provide the generated correction driving voltage (C_ELVDD) to the reference voltage generator (250a). In this way, by correcting the first driving voltage (ELVDD) according to the power saving signal (PSV), the power consumed by the display device (DD, see FIG. 1) can be reduced.

[0075] However, as illustrated in FIG. 5, a corrected driving voltage (C_ELVDD) corrected from the first driving voltage (ELVDD) may be supplied to the pixel circuit (PXC) instead of the first driving voltage (ELVDD). In this case, even if the corrected driving voltage (C_ELVDD) is supplied to the pixel circuit (PXC), for the normal operation of the pixel circuit (PXC), the relationship that the potential (Vs) of the first electrode of the first transistor (T1) is greater than the potential (Vg) of the gate electrode of the first transistor (T1) must hold. Therefore, when the first driving voltage (ELVDD) is corrected to the corrected driving voltage (C_ELVDD), the data voltages (DV1~DVm) must also be varied accordingly. In order to vary the data voltages (DV1~DVm), the first gamma reference voltage (Vref_H) and the correction reference voltage (C_Vref_L) supplied to the gamma voltage generator (201) must be changed in conjunction with the correction driving voltage (C_ELVDD).

[0076] Referring to FIGS. 7 and 9, the reference voltage generator (250a) may include a voltage generating unit (251), a voltage correction unit (252), a first memory (253), and a voltage adjustment unit (254).

[0077] The voltage adjustment unit (254) receives the first gamma reference voltage (Vref_H) and the correction reference voltage (C_Vref_L) from the voltage correction unit (252), and receives the correction driving voltage from the panel voltage generator (400a). The voltage adjustment unit (254) adjusts the voltage levels of the first gamma reference voltage (Vref_H) and the correction reference voltage (C_Vref_L) based on the correction driving voltage (C_ELVDD).

[0078] For example, if the corrected driving voltage (C_ELVDD) has 3V, which is 2V lower than the first driving voltage (ELVDD), a first gamma reference voltage (Vref_H) of 7V and a corrected reference voltage (C_Vref_L) of 5V may be input to the voltage adjustment unit (254). In this case, the voltage adjustment unit (254) can adjust the first gamma reference voltage (Vref_H) and the corrected reference voltage (C_Vref_L) by the deviation (e.g., 2V) between the corrected driving voltage (C_ELVDD) and the first driving voltage (ELVDD). That is, the voltage adjustment unit (254) can generate a first adjusted reference voltage (A_Vref_H) by lowering the first gamma reference voltage (Vref_H) by a first adjustment value, and generate a second adjusted reference voltage (A_Vref_L) by lowering the corrected reference voltage (C_Vref_H) by a second adjustment value. As an example of the present invention, the first and second adjustment values ​​may have the same magnitude. For example, the first and second adjustment values ​​may have a magnitude corresponding to the deviation between the corrected driving voltage (C_ELVDD) and the first driving voltage (ELVDD).

[0079] When the voltage adjustment unit (254) receives the first and second gamma reference voltages (Vref_H, Vref_L) from the voltage correction unit (252), the voltage adjustment unit (254) can generate the first and second adjustment reference voltages (A_Vref_H, A_Vref_L) by lowering the first and second gamma reference voltages (Vref_H, Vref_L) by the deviation amount, respectively.

[0080] In this way, even in a structure that reduces the power consumed by the display device (DD) by adjusting the first gamma reference voltage (Vref_H) and the correction reference voltage (C_Vref_L) according to the correction driving voltage (C_ELVDD), dimming can be performed without grayscale loss through the correction of the first and second gamma reference voltages (Vref_H, Vref_L).

[0081] FIG. 10 is a flowchart illustrating a method of driving a display device according to one embodiment of the present invention.

[0082] Referring to FIGS. 1, FIGS. 2 and FIGS. 10, in a driving method of a display device (DD) according to an embodiment of the present invention, the display device (DD) receives an input image signal (RGB) and a dimming value (DBV) through a controller (100) (S110).

[0083] The controller (100) converts the dimming value (DBV) into a dimming control signal (S_DBV) and converts the input image signal (RGB) into image data (I_data) (S120).

[0084] Subsequently, the display device (DD) generates first and second gamma reference voltages (Vref_H, Vref_L) using a reference voltage generator (250) (S130). The reference voltage generator (250) receives a dimming control signal (S_DBV) from the controller (100) and, based on the dimming control signal (S_DBV), corrects at least one of the first and second gamma reference voltages (Vref_H, Vref_L) to output a corrected reference voltage (C_Vref_L) (S140). In one example of the present invention, the reference voltage generator (250) can correct the second gamma reference voltage (Vref_L) to the corrected reference voltage (C_Vref_L).

[0085] Subsequently, the display device (DD) generates a plurality of gamma voltages (VGMA1~VGMAk) based on a correction reference voltage (C_Vref_L) using a gamma voltage generator (201) (S150). In one example of the present invention, the gamma voltage generator (201) receives a first gamma reference voltage (Vref_H) and a correction reference voltage (C_Vref_L) from a reference voltage generator (250), and can generate a plurality of gamma voltages (VGMA1~VGMAk) based on the first gamma reference voltage (Vref_H) and the correction reference voltage (C_Vref_L).

[0086] The display device (DD) converts image data (I_data) into data voltages (DV1~DVm) based on multiple gamma voltages (VGMA1~VGMAk) through a D / A converter (202) (S160).

[0087] Afterwards, the display device (DD) can display an image using a display panel (DP) that receives data voltages (DV1~DVm) and a first driving voltage (ELVDD) (S170).

[0088] FIG. 11 is a flowchart illustrating a method of driving a display device according to one embodiment of the present invention.

[0089] Referring to FIGS. 1, FIGS. 7, FIGS. 9 and FIGS. 11, in a driving method of a display device (DD) according to an embodiment of the present invention, the display device (DD) receives an input image signal (RGB), a dimming value (DBV), and a power saving signal (PSV) through a controller (100a) (S110a).

[0090] The controller (100a) converts the dimming value (DBV) into a dimming control signal (S_DBV) and converts the input video signal (RGB) into video data (I_data) (S120a). The controller (100a) can further convert the power saving signal (PSV) into a power control signal (S_PSV) (S120a).

[0091] The display device (DD) can correct the first driving voltage (ELVDD) to a corrected driving voltage (C_ELVDD) using a panel voltage generator (400a) that receives a power control signal (S_PSV) (S145). The panel voltage generator (400a) can generate the corrected driving voltage (C_ELVDD) based on the power control signal (S_PSV).

[0092] Subsequently, the display device (DD) generates first and second gamma reference voltages (Vref_H, Vref_L) using a reference voltage generator (250) (S130a). The reference voltage generator (250) receives a dimming control signal (S_DBV) from the controller (100a) and, based on the dimming control signal (S_DBV), corrects at least one of the first and second gamma reference voltages (Vref_H, Vref_L) to output a corrected reference voltage (C_Vref_L) (S140a). In one example of the present invention, the reference voltage generator (250) can correct the second gamma reference voltage (Vref_L) to the corrected reference voltage (C_Vref_L).

[0093] The display device (DD) can adjust the correction reference voltage (C_Vref_L) and at least one of the first and second gamma reference voltages (Vref_H, Vref_L) (e.g., the first gamma reference voltage (Vref_H)) based on the correction driving voltage (C_ELVDD) through the voltage adjustment unit (254) (S148).

[0094] Subsequently, the display device (DD) generates a plurality of gamma voltages (VGMA1~VGMAk) based on the correction reference voltage (C_Vref_L) through the gamma voltage generator (201) (S150). In one example of the present invention, the gamma voltage generator (201) receives a first gamma reference voltage (Vref_H) and a correction reference voltage (C_Vref_L) from the reference voltage generator (250), and can generate a plurality of gamma voltages (VGMA1~VGMAk) based on the first gamma reference voltage (Vref_H) and the correction reference voltage (C_Vref_L).

[0095] The display device (DD) converts image data (I_data) into data voltages (DV1~DVm) based on multiple gamma voltages (VGMA1~VGMAk) through a D / A converter (202) (S160).

[0096] Afterwards, the display device (DD) can display an image using a display panel (DP) that receives data voltages (DV1~DVm) and a first driving voltage (ELVDD) (S170).

[0097] Although the present invention has been described above with reference to preferred embodiments, those skilled in the art or those with ordinary knowledge in the relevant technical field will understand that various modifications and changes can be made to the invention without departing from the spirit and technical scope of the invention as set forth in the claims below. Accordingly, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be determined by the claims. Explanation of the symbols

[0098] DD: Display device DP: Display panel 300: Scan driver PX: Pixel 350: Light-emitting driver 100, 100a: Controller 200: Data driver 250, 250a: Reference voltage generator 400, 400a: Panel voltage generator 251: Voltage generation unit 252: Voltage correction unit 253: First memory 254: Voltage Adjustment Unit 401: Panel Voltage Generation Unit 402: Driving voltage correction unit 403: Second memory S_DBV: Dimming control signal S_PSV: Power control signal Vref_H: 1st gamma reference voltage Vref_L: 2nd gamma reference voltage C_Vref_L: Correction reference voltage ELVDD: First driving voltage C_ELVDD: Corrected driving voltage A_Vref_H: First adjustment reference voltage A_Vref_L: Second adjustment reference voltage

Claims

Claim 1 A display panel comprising a plurality of pixels; a reference voltage generator comprising a voltage generator that generates a first and second gamma reference voltage and a voltage correction unit that receives the first and second gamma reference voltages from the voltage generator and corrects the second gamma reference voltage among the first and second gamma reference voltages based on a dimming control signal to generate a corrected reference voltage; a controller that receives an input image signal and a dimming value, converts the dimming value into the dimming control signal and provides it to the reference voltage generator, and converts the input image signal into image data; and a data driver that generates a plurality of gamma voltages based on the corrected reference voltage and converts the image data into data voltages based on the plurality of gamma voltages and provides them to the pixels, wherein the first gamma reference voltage is a voltage that determines the voltage level of the lowest gradation among the gradations expressed by the data voltages, and the second gamma reference voltage is a voltage that determines the voltage level of the highest gradation among the gradations expressed by the data voltages, and the voltage correction unit provides the first gamma reference voltage to the data driver without correcting it. Claim 2 delete Claim 3 In claim 1, the voltage generating unit is a display device that generates the first and second gamma reference voltages based on the input voltage. Claim 4 In paragraph 3, the data driver comprises: a gamma voltage generator that receives the first gamma reference voltage and the correction reference voltage and generates the plurality of gamma voltages based on the first gamma reference voltage and the correction reference voltage; and a D / A converter that receives the plurality of gamma voltages from the gamma voltage generator and converts the image data into the data voltages based on the plurality of gamma voltages. Claim 5 In paragraph 3, the voltage correction unit is a display device that corrects the second gamma reference voltage such that the deviation from the first gamma reference voltage decreases as the dimming value becomes smaller. Claim 6 In paragraph 3, the reference voltage generator further comprises a first memory including a dimming lookup table in which a first voltage correction value for the first gamma reference voltage and a second voltage correction value for the second gamma reference voltage are stored according to the magnitude of the dimming control signal. Claim 7 A display device according to claim 1, wherein each of the pixels comprises: a pixel circuit portion that receives a corresponding data voltage among the data voltages and receives a driving voltage; and a light-emitting element connected to the pixel circuit portion. Claim 8 In claim 7, the pixel circuit comprises: a first transistor connected between a driving voltage line receiving the driving voltage and the light-emitting element; a second transistor connected between a data line receiving a corresponding data voltage among the data voltages and the first electrode of the first transistor; and a third transistor connected between the second electrode of the first transistor and the gate electrode of the first transistor. Claim 9 A display device according to claim 7, further comprising a panel voltage generator that receives a power control signal and corrects the driving voltage based on the power control signal to generate a corrected driving voltage. Claim 10 In claim 9, the panel voltage generator comprises: a panel voltage generating unit that generates the driving voltage; and a driving voltage correction unit that receives the driving voltage from the panel voltage generating unit and corrects the driving voltage to the corrected driving voltage based on the power control signal. Claim 11 In claim 10, the panel voltage generator further comprises a second memory including a power lookup table in which power correction values ​​are stored according to the magnitude of the power control signal. Claim 12 In item 10, the reference voltage generator is a display device that receives the correction driving voltage and adjusts the voltage level of the correction reference voltage based on the correction driving voltage. Claim 13 delete Claim 14 A display device according to claim 12, wherein the voltage generating unit generates the first and second gamma reference voltages based on the input voltage, and the reference voltage generator receives the correction driving voltage, the first gamma reference voltage, and the correction reference voltage, and further includes a voltage adjusting unit that adjusts the voltage levels of the first gamma reference voltage and the correction reference voltage based on the correction driving voltage. Claim 15 In paragraph 14, the voltage correction unit is a display device that provides the voltage adjustment unit without correcting the first gamma reference voltage. Claim 16 In claim 15, the voltage adjustment unit outputs a first adjustment reference voltage by adjusting the voltage level of the first gamma reference voltage by a first adjustment value, and outputs a second adjustment reference voltage by adjusting the voltage level of the correction reference voltage by a second adjustment value. Claim 17 In paragraph 16, the first adjustment value and the second adjustment value are a display device having the same size. Claim 18 In claim 15, the voltage correction unit is a display device that corrects the second gamma reference voltage such that the deviation from the first gamma reference voltage decreases as the dimming value becomes smaller. Claim 19 The method comprises: receiving an input video signal and a dimming value; converting the dimming value into a dimming control signal and converting the input video signal into video data; generating a first and a second gamma reference voltage; correcting the second gamma reference voltage among the first and second gamma reference voltages based on the dimming control signal to output a corrected reference voltage, while not correcting the first gamma reference voltage; generating a plurality of gamma voltages based on the corrected reference voltage and the first gamma reference voltage; converting the video data into data voltages based on the plurality of gamma voltages; and displaying a video using the data voltages and a driving voltage. The first gamma reference voltage is a voltage that determines the voltage level of the lowest grayscale among the grayscales expressed by the data voltages, and the second gamma reference voltage is a voltage that determines the voltage level of the highest grayscale among the grayscales expressed by the data voltages. Driving method of a display device. Claim 20 A driving method for a display device according to claim 19, further comprising: a step of generating a corrected driving voltage by correcting the driving voltage based on a power control signal; and a step of adjusting at least one of the corrected reference voltage and the first and second gamma reference voltages based on the corrected driving voltage.

Images