Ferroelectric, and Electronic device comprising ferroelectric

Abstract

A ferroelectric material and an electronic device comprising the same are provided, the first domain comprising a first polarization layer polarized in a first direction and a spacer layer disposed adjacent to the first polarization layer, and a second domain comprising a second polarization layer polarized in a second direction distinct from the first direction and a spacer layer disposed adjacent to the second polarization layer, and a structural layer disposed at the domain wall between the first domain and the second domain and belonging to the Pbcn space group.

Description

Technology Field

[0001] The invention relates to a ferroelectric material and an electronic device containing the same. Background Technology

[0002] Semiconductor devices such as memory and transistors are used in various household and industrial devices. As household and industrial devices become more high-performance, the high integration and miniaturization of semiconductor devices are progressing.

[0003] Accordingly, various types of semiconductor devices are being proposed. For example, semiconductor devices employing a dielectric layer containing a ferroelectric material are proposed. Since ferroelectric materials allow for domain inversion, they can be applied to various semiconductor devices by utilizing these properties. Perovskite-based ferroelectrics and fluorite-based ferroelectrics are known as ferroelectrics. The problem to be solved

[0004] Fluorite-based ferroelectrics have a slow domain inversion rate because the magnitude of the energy barrier that must be overcome during domain inversion is high. For example, the magnitude of the energy barrier during domain inversion in conventional fluorite-based ferroelectrics is more than twice that of perovskite-based ferroelectrics. Therefore, a new fluorite-based ferroelectric is required that has an increased domain inversion rate by reducing the magnitude of the energy barrier during domain inversion compared to conventional fluorite-based ferroelectrics.

[0005] One aspect is to provide a ferroelectric material in which the magnitude of the energy barrier during domain inversion is reduced by including a structural layer having a new symmetry structure.

[0006] Another aspect is to provide an electronic device comprising the above-mentioned ferroelectric material. means of solving the problem

[0007] Depending on one aspect,

[0008] A first domain comprising a first polarization layer polarized in a first direction and a spacer layer disposed adjacent to the first polarization layer; and

[0009] It includes a second domain comprising a second polarization layer polarized in a second direction distinct from the first direction and a spacer layer disposed adjacent to the second polarization layer, and

[0010] A ferroelectric material is provided, comprising a structural layer disposed at the domain wall between the first domain and the second domain and belonging to the Pbcn space group.

[0011] According to another aspect,

[0012] An electronic device including a ferroelectric material according to the above is provided. Effects of the invention

[0013] According to one aspect, the energy barrier during domain inversion of a ferroelectric is reduced by including a structural layer having a new symmetry structure at the domain boundary. Brief explanation of the drawing

[0014] FIG. 1 is a schematic diagram showing the structure of a ferroelectric material according to one embodiment. FIG. 2 is a schematic diagram showing the structure of a ferroelectric material and the propagation of domain walls in one embodiment. Figure 2(a) is a schematic diagram showing the structure of a ferroelectric material in the state before domain boundary movement. Figure 2(b) is a schematic diagram showing the structure of a ferroelectric material in a state during domain boundary movement. Figure 2(c) is a schematic diagram showing the structure of a ferroelectric material in a state after domain boundary movement. FIGS. 3 (a) to 3 (h) are schematic diagrams showing orthorhombic crystal structures of a ferroelectric material according to one embodiment. FIG. 4 is a schematic diagram showing the chirality of the structure of a ferroelectric material according to one embodiment. FIGS. 5(a) to 5(c) are schematic diagrams showing an orthorhombic crystal structure belonging to the Pbcn space group disposed at the domain boundary of a ferroelectric material according to one embodiment. FIGS. 6(a) to 6(c) are schematic diagrams showing an orthorhombic crystal structure belonging to a Pbcn space group disposed within a bulk domain of a ferroelectric material according to one embodiment. Figure 7a is a graph showing the calculation results of the change in energy barrier and the change in energy barrier according to strain magnitude during domain inversion from a domain belonging to the Pbcn space group to a domain belonging to the P42 / nmc space group in a ferroelectric material containing a domain belonging to the Pbcn space group. Figure 7b is a graph showing the energy barrier (i.e., switching energy) at domain inversion according to strain size and the relative stability of domains belonging to the Pbcn space group compared to domains belonging to the P42 / nmc space group. FIGS. 8 and 9 are schematic diagrams illustrating a field-effect transistor according to one embodiment. FIG. 10 is a schematic diagram showing a semiconductor device according to another embodiment. FIG. 11 is a schematic diagram showing the structure of a Fin-FET, a semiconductor device according to another embodiment. FIG. 12 is a schematic diagram showing the structure of a Gate-all-around-FET, which is a semiconductor device according to another embodiment. FIG. 13 is a schematic diagram illustrating a capacitor according to one embodiment. FIG. 14 is a schematic diagram showing the structure of a semiconductor device according to another embodiment, namely the connection structure of a capacitor and a field-effect transistor. Specific details for implementing the invention

[0015] The present inventive concept described below is subject to various modifications and may have various embodiments, and specific embodiments are illustrated in the drawings and described in detail. However, this is not intended to limit the present inventive concept to specific embodiments, and it should be understood that it includes all modifications, equivalents, or substitutions that fall within the scope of the description of the present inventive concept.

[0016] The terms used below are used merely to describe specific embodiments and are not intended to limit the creative concept. Singular expressions include plural expressions unless the context clearly indicates otherwise. In the following, terms such as "comprising" or "having" are intended to indicate the existence of the features, numbers, steps, actions, components, parts, components, materials, or combinations thereof described in the specification, and should be understood as not precluding the existence or addition of one or more other features, numbers, steps, actions, components, parts, components, materials, or combinations thereof. The " / " used below may be interpreted as "and" or "or" depending on the context.

[0017] In the drawings, thicknesses have been enlarged or reduced to clearly represent various layers and regions. Throughout the specification, the same reference numerals have been used for similar parts. Throughout the specification, when a part such as a layer, film, region, or plate is described as being "on" or "above" another part, this includes not only cases where it is directly above another part but also cases where there is another part in between. Throughout the specification, terms such as "first," "second," etc., may be used to describe various components, but the components should not be limited by these terms. Terms are used solely for the purpose of distinguishing one component from another. In this specification and drawings, components having substantially the same functional configuration are referred to by the same reference numerals to avoid redundant descriptions.

[0018] In the present disclosure, "Domain Wall (DW)" refers to an area between a plurality of domains, for example, an area comprising 0 to 5 unit cells.

[0019] In the present disclosure, the expression “placed at the domain boundary” means that it is placed to include part or all of the domain boundary.

[0020] Ferroelectrics according to exemplary embodiments and electronic devices including the same will be described in more detail below.

[0021] A ferroelectric material according to one embodiment comprises: a first domain including a first polarization layer polarized in a first direction and a spacer layer disposed adjacent to the first polarization layer; and a second domain including a second polarization layer polarized in a second direction distinct from the first direction and a spacer layer disposed adjacent to the second polarization layer; and a structural layer disposed at a domain wall between the first domain and the second domain and belonging to the Pbcn space group.

[0022] In a ferroelectric material comprising a structural layer belonging to the Pbcn space group at the domain boundary, when an external electric field is applied to the ferroelectric material, the symmetry structure of the structural layer at the domain boundary between the first domain and the second domain contained in the ferroelectric material changes according to the direction of the applied electric field, and a reversal of the polarization direction of the structural layer occurs. Due to this reversal of the polarization direction of the structural layer, domain inversion occurs, and consequently, the domain boundary moves. As the domain boundary moves repeatedly, the polarization direction of the first domain and / or the second domain changes overall. By placing a structural layer belonging to the Pbcn space group at the domain boundary of the ferroelectric material, the magnitude of the energy barrier during domain inversion is reduced. Therefore, the speed of movement of the domain boundary contained in the ferroelectric material increases, and the operating speed of the electronic device containing the ferroelectric material increases.

[0023] FIG. 1 is an exemplary schematic diagram showing a domain wall (DW) of a ferroelectric material of the present disclosure.

[0024] Referring to FIG. 1, the ferroelectric of the present disclosure comprises a first domain (D1) comprising a first polarization layer (PL1) polarized in a first direction and a spacer layer (SL) disposed adjacent to the first polarization layer (PL1), and a second domain (D2) comprising a second polarization layer (PL2) polarized in a second direction distinct from the first direction and a spacer layer (SL) disposed adjacent to the second polarization layer (PL2). A structural layer (STL) belonging to the Pbcn space group is disposed at the domain wall (DW) between the first domain (D1) and the second domain (D2). The structural layer (STL) included in the ferroelectric may have, for example, an orthorhombic crystal structure. Accordingly, the structural layer (STL) included in the ferroelectric may include an orthorhombic crystal phase belonging to the Pbcn space group. By having a structural layer (STL) placed at the domain boundary of a ferroelectric material that includes an orthorhombic crystal phase belonging to the Pbcn space group, the magnitude of the energy barrier during domain inversion or polarization direction switching can be reduced.

[0025] Referring to FIG. 1, the structure (STL) layer includes, for example, a first polarization layer (PL1) and a second polarization layer (PL2). The first polarization layer (PL1) and the second polarization layer (PL2) may be arranged sequentially along one direction. The first polarization layer (PL1) and the second polarization layer (PL2) may be arranged to be in direct contact. For example, a spacer layer (SL) may be free between the first polarization layer (PL1) and the second polarization layer (PL2). By having such a structure, the magnitude of the energy barrier during domain inversion or polarization direction switching may be reduced.

[0026] Referring to FIG. 2, when an external electric field is applied, for example, to a ferroelectric having the structure of FIG. 2 (a), the symmetry structure of the second polarization layer (PL2) included in the structural layer (STL) changes first, causing the second polarization layer (PL2) to be converted into a spacer layer (SL), thereby reaching a ferroelectric state having the structure of FIG. 2 (b). Subsequently, the symmetry structure of the spacer layer (SL) included in the structural layer (STL) changes, causing the spacer layer (SL) to be additionally converted into a first polarization layer (PL1), thereby converting to a ferroelectric having the structure of FIG. 2 (c). Accordingly, as the symmetry structure of the structural layer placed at the domain boundary changes, a polarization direction reversal occurs in the second polarization layer (PL2) and / or the adjacent spacer layer (SL). Due to this polarization direction reversal of the structural layer at the domain boundary, domain inversion occurs and the domain boundary shifts. That is, domain propagation occurs. For example, the domain boundary (DW) moves sequentially as the structural layer undergoes a process of forming an orthorhombic crystal phase belonging to the Pbcn space group, passing through a tetragonal crystal phase belonging to the P42 / nmc space group, and then back to an orthorhombic crystal phase belonging to the Pbcn space group. Since the structural layer (STL) placed at the domain boundary (DW) contains an orthorhombic crystal phase belonging to the Pbcn space group, the energy barrier during such domain inversion is reduced, thereby increasing the domain propagation speed. In other words, the operating speed of an electronic device containing a ferroelectric material can be increased.

[0027] The ferroelectric material of the present disclosure may be a fluorite-based ferroelectric material comprising a fluorite compound. Fluorite-based ferroelectric materials have a fluorite structure. Therefore, they are distinguished from perovskite-based ferroelectric materials having a perovskite structure.

[0028] FIG. 3 is a schematic diagram showing in more detail the structure of a first polarization layer (PL1), a second polarization layer (PL2), and a spacer layer (SL) included in a ferroelectric material of the present disclosure having a fluorite structure. In FIG. 3, {} represents right-handed chirality, and [ ] represents left-handed chirality. In FIG. 3, Mxy represents the mirror image relationship. In FIG. 3, Ry(π) represents a relationship rotated 180 degrees about the y-axis.

[0029] Structure (a) of FIG. 3 is an exemplary image in the (100) plane direction of a ferroelectric unit cell having a fluorite structure and comprising a spacer layer (SL) and a first polarization layer (PL1). The first polarization layer (PL1) is a region corresponding to the right half of the unit cell and is defined by two large metal ions and four small oxygen ions between them. More specifically, the first polarization layer (PL1) is a region comprising four 1 / 8 metal ions placed at the right corner, four 1 / 4 metal ions placed on the front, back, top, and bottom surfaces, and one 1 / 2 metal ion placed on the right side. Thus, the first polarization layer (PL1) comprises four oxygen ions and two metal ions. Additionally, the first polarization layer (PL1) is arranged such that four oxygen ions and two metal ions have non-symmetry in the polar C-axis direction, and the first direction is one of two directions parallel to the polar C-axis direction. For example, in the first polarization layer (PL1), four oxygen ions may be arranged so as to be offset from the center plane between the two metal ions. Thus, the first polarization layer (PL1) may have polarization and may influence the polarization of the ferroelectric material. Depending on the polarization direction ((-)→(+)) according to the positions of the oxygen ions and metal ions in the polarization layer, it may have a "u" shape or a "d" shape. For example, the first polarization layer (PL1) polarized in the first direction may have a "u" shape. Therefore, the first direction is indicated as ↑ in FIG. 1 and may be indicated as u in FIG. 3(a) to FIG. 3(h). The first polarization layer (PL1) can also be referred to as a non-symmetric segment.

[0030] Structure (b) of FIG. 3 is an exemplary image in the (100) plane direction of a ferroelectric unit cell having a fluorite structure and comprising a spacer layer (SL) and a second polarization layer (PL2). The second polarization layer (PL2) is a region corresponding to the right half of the unit cell and is defined by two large metal ions and four small oxygen ions between them. More specifically, the first polarization layer (PL2) is a region comprising four 1 / 8 metal ions placed at the corners, four 1 / 4 metal ions placed on the front, back, top, and bottom surfaces, and one 1 / 2 metal ion placed on the right side. Thus, the second polarization layer (PL2) comprises four oxygen ions and two metal ions. Additionally, the second polarization layer (PL2) is arranged such that four oxygen ions and two metal ions have non-symmetry in the polar C-axis direction, and the second direction is opposite to the first direction in the polar C-axis direction. For example, in the second polarization layer (PL2), four oxygen ions may be positioned so as to be offset from the center plane between the two metal ions. Thus, the second polarization layer (PL2) can influence the polarization of the ferroelectric material. Depending on the polarization direction ((-)→(+)) according to the positions of the oxygen ions and metal ions in the polarization layer, it may have a "u" shape or a "d" shape. For example, the second polarization layer (PL2) polarized in the second direction may have a "d" shape. Therefore, the second direction is indicated as ↓ in FIG. 1 and may be indicated as d in FIG. 3(a) to 3(h). The second polarization layer (PL2) can also be referred to as a non-symmetric segment.

[0031] Referring to structures (a) and (b) of FIG. 3, the spacer layer (PL2) is a region corresponding to the left half of the unit cell and is defined by two large metal ions and four small oxygen ions between them. More specifically, the spacer layer (SL) is a region containing four 1 / 8 metal ions placed at the left corner, four 1 / 4 metal ions placed on the front, back, top, and bottom surfaces, and one 1 / 2 metal ion placed on the left side. Thus, the spacer layer (SL) contains four oxygen ions and two metal ions. Additionally, the spacer layer (SL) is arranged such that the four oxygen ions and the two metal ions have symmetry in the polar C-axis direction. For example, in the spacer layer (SL), four oxygen ions may be placed in the center plane between the two metal ions. Therefore, the spacer layer (SL) may not affect the polarization of the ferroelectric material. The spacer layer is not separately indicated in FIG. 1 and is indicated by s in FIG. 3(a) to FIG. 3(h). The spacer layer (SL) may also be referred to as a symmetric segment.

[0032] Structure (b) of Fig. 3 corresponds to the structure obtained by rotating structure (a) of Fig. 3 180 degrees around the y-axis. Therefore, structure (b) of Fig. 3 has the same chirality as structure (a) of Fig. 3. Structure (e) of Fig. 3 corresponds to the mirror image structure of structure (a) of Fig. 3. Therefore, structure (e) of Fig. 3 has different chirality from structure (a) of Fig. 3. Structure (f) of Fig. 3 corresponds to the mirror image structure of structure (b) of Fig. 3. Therefore, structure (f) of Fig. 3 has different chirality from structure (b) of Fig. 3. Structure (c) of Fig. 3 corresponds to the structure in which the positions of the first polarization layer (PL1) and the spacer layer (SL) are reversed from structure (a) of Fig. 3. Structure (d) of Fig. 3 corresponds to the structure obtained by rotating structure (c) of Fig. 3 180 degrees around the y-axis. Therefore, structure (d) in Fig. 3 has the same chirality as structure (c) in Fig. 3. Structure (g) in Fig. 3 corresponds to the mirror image structure of structure (c) in Fig. 3. Therefore, structure (g) in Fig. 3 has different chirality from structure (c) in Fig. 3. Structure (h) in Fig. 3 corresponds to the mirror image structure of structure (d) in Fig. 3. Therefore, structure (h) in Fig. 3 has different chirality from structure (d) in Fig. 3.

[0033] Referring to FIGS. 1 to 4, a first domain (D1) may include a plurality of first polarization layers (PL1) and a plurality of spacer layers (SL) disposed respectively between the plurality of first polarization layers (PL1), and a second domain (D2) may include a plurality of second polarization layers (PL2) and a plurality of spacer layers (SL) disposed respectively between the plurality of second polarization layers (PL2). For example, the first domain (D1) may have a structure in which a plurality of first polarization layers (PL1) and a plurality of spacer layers (SL) are alternately arranged along one direction. The direction in which the plurality of first polarization layers (PL1) and a plurality of spacer layers (SL) are alternately arranged may be, for example, a direction facing the domain boundary (DW). For example, the second domain (D2) may have a structure in which a plurality of second polarization layers (PL2) and a plurality of spacer layers (SL) are alternately arranged along one direction. The direction in which the plurality of second polarization layers (PL2) and the plurality of spacer layers (SL) are alternately arranged may, for example, be a direction facing the domain boundary (DW). A plurality of first polarization layers (PL1) included in the first domain (D1) may be polarized in the same first direction. For example, a plurality of first polarization layers (PL1) may be indicated as ↑ in FIGS. 1, 2, and 4, and as u in FIGS. 3(a) to 3(h). A plurality of second polarization layers (PL2) included in the second domain (D2) may be polarized in the same second direction. For example, a plurality of second polarization layers (PL2) may be indicated as ↓ in FIGS. 1, 2, and 4, and as d in FIGS. 3(a) to 3(h).

[0034] Referring to FIG. 4, the first polarization layer (PL1) and the second polarization layer (PL2) included in the structural layer (STL) may have the same chirality, for example. For example, the first polarization layer (PL1) is polarized in the first direction and is denoted as U, and the second polarization layer (PL2) is polarized in the second direction and is denoted as D, but the first polarization layer (PL1) and the second polarization layer (PL2) may be denoted as {} because they have the same right-handed chirality. That is, the first polarization layer (PL1) and the second polarization layer (PL2) are denoted as {U} and {D}, respectively. Thus, mirror images of the three-dimensional atomic arrangement of the first polarization layer (PL1) and the second polarization layer (PL2) can be superimposed on each other. Since the first polarization layer (PL1) and the second polarization layer (PL2) have the same chirality, the magnitude of the energy barrier during domain inversion and / or polarization direction switching can be reduced.

[0035] FIGS. 5a to 5c are schematic diagrams showing a fluorite crystal structure in a crystalline phase belonging to the Pcbn space group containing a structural layer locally disposed at the domain boundary, and FIGS. 6a to 6c are schematic diagrams showing a fluorite crystal structure in a crystalline phase belonging to the Pbcn space group in a bulk state. FIGS. 5a and 6a are fluorite crystal structures in the (010) direction. FIGS. 5b and 6b are fluorite crystal structures in the (001) direction. FIGS. 5c and 6c are fluorite crystal structures in the (100) direction.

[0036] As shown in FIGS. 5a to 5c and FIGS. 6a to 6c, the crystal structure of a crystalline phase belonging to the Pbcn space group, which includes a structural layer locally placed at the domain boundary, has a different atomic arrangement from the crystal structure of a crystalline phase belonging to the Pbcn space group in the bulk state. Therefore, in a ferroelectric material containing a structural layer belonging to the Pbcn space group at the domain boundary, the magnitude of the energy barrier during domain inversion or polarization direction switching can be reduced.

[0037] Figure 7a shows the calculation results for the change in energy barrier during domain inversion from a domain in the Pbcn space group to a domain in the P42 / nmc space group and the change in energy barrier according to strain magnitude in a ferroelectric material containing a domain in the Pbcn space group. Figure 7b shows the energy barrier (i.e., switching energy) during domain inversion according to strain magnitude and the relative stability of a domain in the Pbcn space group with respect to a domain in the P42 / nmc space group.

[0038] As shown in FIGS. 7a and 7b, when the strain applied to the ferroelectric material was 0%, the energy barrier for domain inversion from a domain belonging to the Pbcn space group to a domain belonging to the P42 / nmc space group was 73 meV. In contrast, when the strain applied to the ferroelectric material was 0.3%, the energy barrier for domain inversion from a domain belonging to the Pbcn space group to a domain belonging to the P42 / nmc space group was 36 meV. Therefore, as the strain applied to the ferroelectric material increased, the energy barrier for domain inversion from a domain belonging to the Pbcn space group to a domain belonging to the P42 / nmc space group decreased by 51%. In addition, as shown in FIG. 5b, the relative stability of the crystalline phase belonging to the Pbcn space group with respect to the crystalline phase belonging to the P42 / nmc space group increased significantly. For example, in a ferroelectric material that locally includes a structural layer belonging to the Pbcn space group at the domain boundaries between domains in the P42 / nmc space group, the energy barrier during domain inversion is significantly reduced compared to conventional fluorate-based ferroelectric materials, e.g., Science, 369, 1343, 2020, and it was confirmed that the energy barrier during domain inversion is further reduced when strain is applied to this ferroelectric material.

[0039] Referring to FIGS. 7a and 7b, the strain applied to the structural layer (STL) may be, for example, -1% to 1%, or -0.5% to 0.5%. The strain applied to the structural layer (STL) may be, for example, -1% to -0.1%, or -0.5% to -0.1%. The strain applied to the structural layer (STL) may be, for example, 0.1% to 1%, or 0.1% to 0.5%. By having the strain applied to the structural layer within these ranges, the magnitude of the energy barrier during domain inversion or polarization direction switching may be reduced. The strain applied to the structural layer (STL) may be, for example, tensile strain. Strain applied to the structural layer (STL) can be implemented in various ways, such as heat treatment like annealing or doping with a dopant. For example, strain can be applied to the structural layer by doping a ferroelectric compound with a dopant having an atomic size different from that of the atoms constituting the ferroelectric. For example, strain can be applied to the structural layer by placing a metal electrode layer on a dielectric layer containing a ferroelectric compound and annealing it.

[0040] Referring to FIGS. 1, 2 and 4, the first domain (D1) and the second domain (D2) included in the ferroelectric material may each independently include one or more crystal phases selected from an orthorhombic crystalline phase, a tetragonal crystalline phase, and a cubic crystalline phase. For example, the first domain (D1) and the second domain (D2) may each independently include an orthorhombic crystalline phase. For example, the first domain (D1) and the second domain (D2) may each independently include an orthorhombic crystalline phase and a tetragonal crystalline phase. For example, the first domain (D1) and the second domain (D2) may each independently include an orthorhombic crystalline phase and a cubic crystalline phase. For example, the first domain (D1) and the second domain (D2) may each independently include an orthorhombic crystalline phase, a tetragonal crystalline phase, and a cubic crystalline phase. The ferroelectric material may, for example, predominantly include an orthorhombic crystalline phase. The meaning of "dominantly including" is that it has the highest content among all crystalline phases or has a double-digit content.

[0041] The orthorhombic crystal phase may have a structure belonging to, for example, the Pca21 space group. The tetragonal crystal phase may have a structure belonging to, for example, the P42 / nmc space group. The cubic crystal phase may have a structure belonging to, for example, the Fm-3m space group. For example, a ferroelectric material may include a tetragonal crystal phase, which is a structural layer belonging to the Pbcn space group, at the domain boundary (DW) between multiple domains containing a tetragonal crystal phase belonging to the P42 / nmc space group.

[0042] The crystal structure, crystal phase, and atomic arrangement of a ferroelectric material can be confirmed using, for example, STEM (Scanning transmission electron microscopy), HAADF-STEM (High-Angle Annular Dark-Field - Scanning Transmission Electron Microscopy), TEM (Transmission electron microscopy), GIXRD (Grazing Incidence X-ray Diffraction), but are not limited to these methods and any method used in the relevant technical field is possible.

[0043] The content of the structural layer belonging to the Pbcn space group contained in the ferroelectric material may be, for example, greater than 0 to 40 vol%, greater than 0 to 30 vol%, greater than 0 to 20 vol%, or greater than 0 to 10 vol% with respect to the total volume of the ferroelectric material. vol% is a volume percentage.

[0044] The content of the structural layer belonging to the Pbcn space group contained in the ferroelectric material may be, for example, greater than 0 to 40 mol%, greater than 0 to 30 mol%, greater than 0 to 20 mol%, or greater than 0 to 10 mol% with respect to the total moles of the ferroelectric material. mol% is a mole percentage.

[0045] The content of the structural layer belonging to the Pbcn space group contained in the ferroelectric material may be, for example, greater than 0 to 40 at%, greater than 0 to 30 at%, greater than 0 to 20 at%, or greater than 0 to 10 at% with respect to the total atoms of the ferroelectric material. at% is an atomic percentage.

[0046] The content of the structural layer belonging to the Pbcn space group contained in the ferroelectric material may be, for example, greater than 0 to 40 wt%, greater than 0 to 30 wt%, greater than 0 to 20 wt%, or greater than 0 to 10 wt% with respect to the total mass of the ferroelectric material. wt% is a mass percentage.

[0047] By having a ferroelectric material with this range of content, the magnitude of the energy barrier during domain inversion or polarization direction switching of the ferroelectric material can be reduced more effectively.

[0048] Ferroelectrics may include, for example, binary metal oxides represented by the following chemical formula 1:

[0049] <Chemical Formula 1>

[0050] MO2

[0051] In the above formula, M is an element belonging to Group 4 of the periodic table.

[0052] In binary metal oxides, M can be, for example, Hf, Zr, or a combination of Hf and Zr. Binary metal oxides are, for example, HfO2, ZrO2, or Hf 1-a Zr a O2 (0≤a≤0.15) may be used. By including such binary metal oxides in the ferroelectric material, the magnitude of the energy barrier during domain inversion or polarization direction switching can be reduced more effectively.

[0053] Binary metal oxides may further include, for example, dopants.

[0054] Structural strain can be added to the binary metal oxide by including a dopant. Accordingly, as shown in FIGS. 7a and 7b, the magnitude of the energy barrier during domain inversion or polarization direction switching of the ferroelectric containing the binary metal oxide can be further reduced.

[0055] The dopant included in the binary metal oxide may be one or more selected from, for example, C, Si, Ge, Sn, Pb, Al, Y, La, Gd, Mg, Ca, Sr, Ba, and Ti. The content of the dopant included in the binary metal oxide may be greater than 0 to 20 at%, greater than 0 to 18 at%, greater than 0 to 15 at%, or greater than 0 to 12 at%, greater than 0 to 10 at%, greater than 0 to 8 at%, greater than 0 to 7 at%, or greater than 0 to 5 at%, greater than 0 to 4 at%, greater than 0 to 3 at%, greater than 0 to 2 at%, greater than 0 to 1 at%, greater than 0 to 0.8 at%, greater than 0 to 0.5 at%, greater than 0 to 0.2 at%, or greater than 0 to 0.1 at% with respect to the total of elements other than oxygen included in the binary metal oxide.

[0056] Ferroelectrics may include, for example, binary metal oxides represented by the following chemical formulas 2 or 3:

[0057] <Chemical Formula 2>

[0058] Hf 1-x D x O2

[0059] <Chemical Formula 3>

[0060] Zr 1-y D y O2

[0061] In the above equations, D is one or more selected from C, Si, Ge, Sn, Pb, Al, Y, La, Gd, Mg, Ca, Sr, Ba, and Ti, and 0≤x≤0.15, 0≤y≤0.15.

[0062] In Chemical Formula 2, x is, for example, 0≤x≤0.12, 0≤x≤0.1, 0≤x≤0.08, 0≤x≤0.07, 0≤x≤0.05, 0≤x≤0.04, 0≤x≤0.03, 0≤x≤0.02, 0≤x≤0.01, 0≤x≤0.008, 0≤x≤0.005, 0≤x≤0.002, or 0≤x≤0.001. In Chemical Formula 3, y is, for example, 0≤y≤0.12, 0≤y≤0.1, 0≤y≤0.08, 0≤y≤0.07, 0≤y≤0.05, 0≤y≤0.04, 0≤y≤0.03, 0≤y≤0.02, 0≤y≤0.01, 0≤y≤0.008, 0≤y≤0.005, 0≤y≤0.002, or 0≤y≤0.001.

[0063] An electronic device according to another embodiment includes a thin film dielectric layer, wherein the thin film dielectric layer includes the ferroelectric material described above.

[0064] By including the aforementioned ferroelectric material in the electronic device, the performance of the electronic device, such as the driving speed, is improved.

[0065] The thickness of the thin film dielectric layer may be, for example, 0.1 nm to 50 nm, 0.1 nm to 40 nm, 0.1 nm to 30 nm, 0.1 nm to 20 nm, 0.1 nm to 10 nm, 0.1 nm to 7 nm, 0.1 nm to 5 nm, 0.1 nm to 4 nm, 0.1 nm to 3 nm, 0.1 nm to 2 nm, 0.1 nm to 1.5 nm, or 0.1 nm to 1 nm. By having a thickness within this range, the thin film dielectric layer can provide ferroelectricity more effectively.

[0066] The current profile over time during polarization switching due to voltage application to the thin film dielectric layer is greater than 0 to 5 × 10-7 sec, greater than 0 to 1 × 10 -7 sec, greater than 0 to 5 × 10 -8 sec, greater than 0 to 1 × 10 -8 sec, greater than 0 to 5 × 10 -9 sec, or greater than 0 to 1 × 10⁻⁶ -9 It can have a peak in the time range of seconds. Since the current profile according to time during polarization switching by voltage application of the thin film dielectric layer has a peak in this short time range, the driving speed of the electronic device including the thin film dielectric layer can be increased.

[0067] A thin film dielectric layer can be manufactured, for example, by forming an amorphous layer containing a ferroelectric having the composition of Chemical Formulas 1 to 3, and then annealing the amorphous layer to induce a crystalline phase.

[0068] The amorphous layer can be formed by conventional methods known in the art. The amorphous layer can be manufactured by methods such as atomic layer deposition (ALD), chemical vapor deposition (CVD), and physical vapor deposition (PVD). The atomic layer deposition (ALD) method can form a uniform layer at the atomic level and can be performed at a relatively low temperature.

[0069] When forming an amorphous layer through an atomic layer deposition (ALD) method, conventional precursors known in the art may be used for the hafnium source, zirconium source, and oxygen source.

[0070] Hafnium sources may be selected from, for example, Hf(OtBu)4, TEMAH (Tetrakis Ethyl Methyl Amino Hafnium), TDMAH (Tetrakis Di-Methyl Amino Hafnium), TDEAH (Tetrakis Di-Ethyl Amino Hafnium), or a combination of two or more of these, but are not necessarily limited to these and any source that can be used as a hafnium source in the relevant technical field is acceptable.

[0071] Zirconium sources may be selected from, for example, Zr(OtBu)4, TEMAZ (Tetrakis Ethyl Methyl Amino Zirconium), TDMAZ (Tetrakis Di-Methyl Amino Zirconium), TDEAZ (Tetrakis Di-Ethyl Amino Zirconium), or combinations of two or more of these, but are not necessarily limited to these, and any that can be used as a zirconium source in the relevant technical field is possible.

[0072] The oxygen source may be selected from, for example, O3, H2O, O2, N2O, O2 plasma, or a combination of two or more of these, but is not necessarily limited to these, and any that can be used as an oxygen source in the relevant technical field is possible.

[0073] The amorphous layer may additionally contain a dopant. By additionally containing a dopant in the amorphous layer, strain may be applied to the crystalline phase induced from the amorphous layer. Consequently, the energy barrier during domain inversion of the thin film dielectric layer may be reduced. The dopant source may be a compound containing an element selected from, for example, C, Si, Ge, Sn, Pb, Al, Y, La, Gd, Mg, Ca, Sr, Ba, and Ti, and any such compound used in the relevant art field is acceptable. The dopant content may be adjusted according to the required physical properties of the thin film dielectric layer.

[0074] The carbon source may be a hydrocarbon such as methane or ethane, but is not necessarily limited to these; any carbon source that can be used in the relevant technical field is acceptable.

[0075] The silicon source may be a silane-based compound such as SiH4 or Si2H6, but is not necessarily limited to these; any silicon source that can be used in the relevant technical field is acceptable.

[0076] The germanium source is TDMAGe(C8H 24 N4Ge), BDMEDAGe(C8H 20 It may be germanium-based compounds such as N4Ge, but is not necessarily limited to these; any that can be used as a germanium source in the relevant technical field is acceptable.

[0077] The tin source may be a tin-based compound such as SnCl2, Sn(SPh)4, or tin(IV) bis(hexamethylsilylamide), but is not necessarily limited to these; any source that can be used as a tin source in the relevant technical field is acceptable.

[0078] Lead sources may include lead-based compounds such as Pb(Ac)2 (ac=acetate) and PbCl2, but are not necessarily limited to these; any source that can be used as a lead source in the relevant technical field is acceptable.

[0079] Aluminum sources may be aluminum-based compounds such as TMA (trimethoxyaluminum) and DMACl (dimethylaluminum chloride), but are not necessarily limited to these; any aluminum source that can be used in the relevant technical field is acceptable.

[0080] The yttrium source may be yttrium-based compounds such as Y(thd)3 (thd = 2,2,6,6-tetramethyl-3,5-heptanedionato) and Y(CH3Cp)3 (Cp = cyclopentadienyl), but is not necessarily limited to these; any that can be used as a yttrium source in the relevant technical field is acceptable.

[0081] The lanthanum source may be a lanthanide compound such as La(thd)3 (thd = 2,2,6,6-tetramethyl-3,5-heptane-dione) and La(Cp)3 (Cp = cyclopentadienyl), but is not necessarily limited to these, and any that can be used as a lanthanum source in the relevant technical field is acceptable.

[0082] The gadolium source may be a gadolium-based compound such as Gd(thd)3 or Gd(DPDMG)3 (DPDMG = N,N-diisopropyl-2-dimethylamido-guanidinato), but is not necessarily limited to these; any source that can be used as a gadolium source in the relevant technical field is acceptable.

[0083] Magnesium sources may be magnesium compounds such as Mg(thd)2, MgCl2, and Mg(NO3)2, but are not necessarily limited to these; any magnesium source that can be used in the relevant technical field is acceptable.

[0084] Calcium sources are (α-methylstyrene) With It may be a calcium-based compound such as (I)(hfac) (hfac = hexafluoroacetylacetonate) and (hfac)Cu(I)DMB (DMB = 3,3-dimethyl-1-butene), but is not necessarily limited to these, and any that can be used as a calcium source in the relevant technical field is acceptable.

[0085] The strontium source is Sr(tmhd)2 (tmhd = 2,2,6,6-tetramethyl-3.5-heptanedione), Sr It may be a strontium-based compound such as (iPrCp)2(iPr = isopropyl, Cp = cyclopentadienyl), but is not necessarily limited to these, and any that can be used as a strontium source in the relevant technical field is acceptable.

[0086] The barium source may be a barium-based compound such as Ba(CpiPr₃)₂ (Bis (triisopropylcyclopentadienyl)barium) and Ba(TMHD)₂ (Bis(2,2,6,6-tetramethyl-3,5-heptanedionato)barium hydrate), but is not necessarily limited to these, and any that can be used as a barium source in the relevant technical field is acceptable.

[0087] Titanium sources are TiCl4, TTIP(C8H 24 It may be a titanium-based compound such as N4Ti) and trimethoxy(pentamethylcyclopentadienyl)titanium ((CpMe5)Ti(OMe)3), but is not necessarily limited to these; any that can be used as a titanium source in the relevant technical field is acceptable.

[0088] The temperature, time, atmosphere, etc., of the annealing step can be controlled so that the amorphous layer crystallizes to have a crystal structure, for example, an orthorhombic crystal structure. The thermal budget of the annealing step can be determined by considering the composition and thickness of the amorphous layer. Annealing can be performed at a temperature of, for example, 400°C to 1100°C, but is not necessarily limited to this range and can be adjusted according to the required physical properties. Annealing may be performed for, for example, 1 nanosecond to 1 hour, 1 microsecond to 30 minutes, 0.001 second to 10 minutes, 0.01 second to 10 minutes, 0.05 second to 5 minutes, 0.1 second to 3 minutes, 0.5 second to 2 minutes, 1 second to 1 minute, 3 seconds to 1 minute, or 5 seconds to 30 seconds, but is not necessarily limited to these ranges and can be adjusted according to the required physical properties. Annealing may be performed one or more times. Annealing may be performed multiple times, for example. Annealing may include, for example, a first annealing step and a second annealing step. One or more of the annealing temperature and time may differ from each other in the first annealing step and the second annealing step. For example, the first annealing step may be performed at a lower temperature or for a shorter time than the second annealing step. The atmosphere in which the annealing is performed is not particularly limited. For example, the first annealing step and the second annealing step may be performed under an atmosphere of H2O, O2, O3, N2, H2, and / or NH3, respectively.

[0089] Alternatively, the thin film dielectric layer can be manufactured by forming a crystalline layer comprising a ferroelectric having the composition of Formulas 1 to 3 on a substrate having, for example, a crystalline layer. For example, the crystalline layer can be manufactured by methods such as epitaxy, liquid phase epitaxy, vapor phase epitaxy, chemical vapor deposition (CVD), sputtering, and pulsed laser deposition (PLD).

[0090] The electronic device further includes, for example, a thin film electrode layer, and the thin film electrode layer may be disposed on one or both sides of the thin film dielectric layer.

[0091] The electronic device may include, for example, a thin film dielectric layer comprising the ferroelectric material described above; and a thin film electrode layer disposed on one or both sides of the thin film dielectric layer.

[0092] The thickness of the thin film electrode layer can be, for example, 10 nm to 1000 nm, 10 nm to 500 nm, or 10 nm to 100 nm.

[0093] The thin film electrode layer included in the electronic device may be, for example, amorphous or crystalline. The crystalline thin film electrode layer may have various crystal structures. For example, the thin film electrode layer may have a tetragonal structure, a cubic structure, a hexagonal structure, a monoclinic structure, a triclinic structure, or an orthorhombic structure. Interfacial stability with the thin film dielectric layer can be improved by the thin film electrode layer having such crystal structures.

[0094] One or more of the thin film electrode layers may include one or more selected from a metal, an oxide of the metal, a doped oxide of the metal, a nitride of the metal, and a carbide of the metal.

[0095] The metal included in one or more of the thin film electrode layers may include, for example, one or more selected from Ti, W, Ta, Co, Mo, Ni, V, Hf, Al, Cu, Pt, Pd, Ir, Au, and Ru. The metal included in one or more of the thin film electrode layers is not limited to these, and any metal used in electrode layers in the relevant technical field is possible.

[0096] The metal oxides included in one or more of the thin film electrode layers may include, for example, one or more selected from RuO2, IrO2, PtO2, SnO2, MnO2, Sb2O3, and In2O3. The metal oxides included in one or more of the thin film electrode layers are not limited to these, and any metal oxide used in electrode layers in the relevant technical field is possible.

[0097] The doped metal oxide included in one or more of the thin film electrode layers may include, for example, one or more selected from Ta-doped SnO2, Ti-doped In2O3, Ni-doped SnO2, Sb-doped SnO2, and Al-doped ZnO. The doped metal oxide included in one or more of the thin film electrode layers is not limited to these, and any doped metal oxide used in electrode layers in the art is possible. The type of doped metal, i.e., the dopant, is not particularly limited and is possible as long as it improves the conductivity of the metal oxide. The dopant is, for example, a metal.

[0098] One or more metal nitrides included in the thin film electrode layers may include, for example, one or more selected from TiN, WN, TaN, TiAlN, TaSiN, TiSiN, WSiN, TiAlN, TiCN, TiAlCN, RuCN, and RuTiN. The metal nitrides included in one or more of the thin film electrode layers are not limited to these, and any metal nitride used in electrode layers in the relevant technical field is possible. The metal nitrides include carbon-containing metal nitrides.

[0099] The electronic device may be used for various applications by additionally including a thin-film electrode layer. The electronic device is, for example, a capacitor, a transistor, or a memory. The electronic device may be a semiconductor device, for example, a memory device or a non-memory device. The semiconductor device may be, for example, a capacitor, a field-effect transistor, or a combined structure thereof, but is not limited thereto.

[0100] The electronic device further comprises, for example, a semiconductor substrate including a source and a drain; and a gate electrode disposed on the semiconductor substrate; wherein the thin film dielectric layer may be disposed between the semiconductor substrate and the gate electrode.

[0101] An electronic device may include, for example, a semiconductor substrate including a source and a drain; a gate electrode disposed on the semiconductor substrate; and a thin film dielectric layer disposed between the semiconductor substrate and the gate electrode.

[0102] FIGS. 8 and 9 are schematic diagrams illustrating a field-effect transistor according to one embodiment.

[0103] Referring to FIGS. 8 and 9, the field-effect transistor (D10, D20) comprises a substrate (100) having a source (120, 121) and a drain (130, 131), a gate electrode (300) disposed on the substrate (100), and a first dielectric layer thin film (200) disposed between the substrate (100) and the gate electrode (300) and comprising the ferroelectric material described above. The field-effect transistor may be a logic switching device. A logic switching device is a concept contrasted with a memory device (memory transistor) and may have non-memory characteristics and may be a non-memory ON / OFF switching device.

[0104] The substrate (100) may include a semiconductor material. For example, the substrate (100) may include Si, Ge, SiGe, group III-V semiconductors, etc., and may be modified and used in various forms such as silicon on insulator (SOI).

[0105] A substrate (100) may include a source (120, 121) and a drain (130, 131), and may include a channel (110, 111) electrically connected to the source (120, 121) and the drain (130, 131). The source (120, 121) may be electrically connected to or in contact with one end of the channel (110, 111), and the drain (130, 131) may be electrically connected to or in contact with the other end of the channel (110, 111).

[0106] Referring to FIG. 8, the channel (110) can be defined as a substrate region between the source (120) and the drain (130) within the substrate (100). The source (120) and the drain (130) can be formed by injecting impurities into different regions of the substrate (100), in which case the source (120), the channel (110), and the drain (130) may include a substrate material as a base material.

[0107] The electronic device may further include, for example, an insulating layer disposed between the thin film dielectric layer and the semiconductor substrate.

[0108] Referring to FIG. 9, the channel (111) may be implemented as a thin film of a material layer separate from the substrate region (101). The material constituting the channel (111) may be selected according to the required physical properties of the electronic device. For example, the channel (111) may include a semiconductor material such as Si, Ge, SiGe, group III-V, an oxide semiconductor, a nitride semiconductor, an oxynitride semiconductor, a two-dimensional material (2D material), a quantum dot, an organic semiconductor, or a combination of two or more of these. For example, the oxide semiconductor may include InGaZnO, etc. As a two-dimensional material, it may include TMD (transition metal dichalcogenide) or graphene. The quantum dot may include colloidal quantum dots (2D QD), nanocrystalline structures, etc. The source (121) and drain (131) may be formed of a conductive material and, for example, each may independently comprise a metal, a metal-containing compound, or a conductive polymer.

[0109] Referring to FIGS. 8 and 9, a gate electrode (300) may be disposed on a substrate (100) spaced apart from the substrate (100) and may be disposed opposite to a channel (110, 111). The gate electrode (300) may have a conductivity greater than 0 and less than or equal to 1 Mohm / square. The gate electrode (300) may comprise one or more selected from the group consisting of metals, metal nitrides, metal carbides, polysilicon, and combinations thereof. The metal may include, for example, aluminum (Al), tungsten (W), molybdenum (Mo), titanium (Ti), or tantalum (Ta). The metal nitride may include, for example, titanium nitride (TiN) or tantalum nitride (TaN). The metal carbide may include, for example, a metal carbide doped (or containing) aluminum or silicon. The metal carbide may include, for example, TiAlC, TaAlC, TiSiC, or TaSiC. The gate electrode (300) may have a structure in which multiple materials are stacked. The gate electrode (300) may have a stacked structure of a metal nitride layer / metal layer, such as TiN / Al, for example, or a stacked structure of a metal nitride layer / metal carbide layer / metal layer, such as TiN / TiAlC / W. The gate electrode (300) may include, for example, titanium nitride film (TiN) or molybdenum (Mo), and the above examples may be used in various modified forms. The first dielectric layer thin film (200) containing the ferroelectric material described above may be disposed between the substrate (100) and the gate electrode (300). For example, the first dielectric layer thin film (200) containing the ferroelectric material described above may be formed on the channels (110, 111).

[0110] FIG. 10 is a schematic diagram showing a semiconductor device (D30) according to another embodiment.

[0111] Referring to FIG. 10, a second dielectric layer (400) may be further included between the channel (110) and the first dielectric layer thin film (200) containing a ferroelectric material. The second dielectric layer (400) may suppress or prevent electrical leakage. The thickness of the second dielectric layer (400) may be 0.1 nm to 100 nm, 0.1 nm to 50 nm, 0.1 nm to 30 nm, 0.5 nm to 10 nm, 1 nm to 5 nm, 1 nm to 4 nm, 1 nm to 3 nm, or 1 nm to 2 nm. The second dielectric layer (400) may include a paraelectric material or a high dielectric material. The second dielectric layer (400) may include, for example, silicon oxide, silicon nitride, aluminum oxide, hafnium oxide, zirconium oxide, etc. The second dielectric layer (400) may include a two-dimensional insulator (2D insulator), such as, for example, h-BN (hexagonal boron nitride). For example, the second dielectric layer (400) may be, for example, silicon oxide (SiO2) or silicon nitride (SiN x The second dielectric layer (400) may include, for example, hafnium oxide (HfO2), hafnium silicon oxide (HfSiO4), lanthanum oxide (La2O3), lanthanum aluminum oxide (LaAlO3), zirconium oxide (ZrO2), zirconium silicon oxide (ZrSiO4), tantalum oxide (Ta2O5), titanium oxide (TiO2), strontium titanium oxide (SrTiO3), yttrium oxide (Y2O3), aluminum oxide (Al2O3), red scandium tantalum oxide (PbSc 0.5 Ta 0.5It may include O3), red zinc niobate (PbZnNbO3), etc. The second dielectric layer (400) may include metal nitride oxides such as aluminum oxynitride (AlON), zirconium oxynitride (ZrON), hafnium oxynitride (HfON), lanthanum oxynitride (LaON), yttrium oxynitride (YON), etc. The second dielectric layer (400) may include silicates such as ZrSiON, HfSiON, YSiON, LaSiON, etc. The second dielectric layer (400) may include aluminates such as ZrAlON, HfAlON, etc.

[0112] Referring to FIG. 10, a conductive layer (500) may be further disposed between the channel (110) and the first dielectric layer thin film (200) containing a ferroelectric. The conductive layer (500) may have a conductivity of approximately greater than 0 and less than or equal to 1 Mohm / square. The conductive layer (500) may be, for example, a floating electrode. The conductive layer (5000) may be formed of, for example, a metal or a metal-containing compound.

[0113] Field-effect transistors can be implemented in various forms, such as 2-dimensional and 3-dimensional. For example, field-effect transistors can be in a 1-gate-on-channel form like a planar-FET, a 3-gate-on-channel form like a Fin-FET, or a 4-gate-on-channel form like a Gate-all-around-FET.

[0114] FIG. 11 is a schematic diagram showing the structure of a Fin-FET, a semiconductor device according to another embodiment.

[0115] Referring to FIG. 11, a Fin-FET (D40) comprises a source (120), a drain (130), and a channel (not shown) defined as a region between them, and the channel has a fin shape. A gate electrode (300) is placed on a substrate (100) that has a fin shape so as to intersect with the fin shape. The channel is formed in the region where the fin shape and the gate electrode (300) intersect. A first dielectric layer thin film (200) containing a ferroelectric material surrounds the channel and is placed between the channel and the gate electrode (300) while in contact with the source (120) and the drain (130).

[0116] FIG. 12 is a schematic diagram showing the structure of a Gate-all-around-FET, which is a semiconductor device according to another embodiment.

[0117] Referring to FIG. 12, a gate-all-around-FET (D50) comprises a source (120), a drain (130), and a channel (not shown) defined as a region between them, and the channel has the form of a wire, a sheet, etc. The source (120), the drain (130), and the channel are spaced apart from the substrate region (101). A gate electrode (300) is positioned to surround the source (120), the drain (130), and the channel, intersecting them. The channel is formed in the region surrounded by the gate electrode (300). A first dielectric layer thin film (200) containing a ferroelectric material is positioned between the channel and the gate electrode (300) so as to surround the channel.

[0118] The electronic device may be a capacitor comprising, for example, a thin film dielectric layer including the ferroelectric material described above; and thin film electrode layers disposed on both sides of the thin film dielectric layer.

[0119] FIG. 13 is a schematic diagram illustrating a capacitor according to one embodiment.

[0120] Referring to FIG. 13, the capacitor (D60) comprises a first electrode (600), a second electrode (700) positioned opposite and spaced apart therefrom, and a first dielectric layer material thin film (200) comprising the aforementioned ferroelectric material positioned between the first electrode (600) and the second electrode (700). The first electrode (600) and the second electrode (700) may be referred to as the lower electrode and the upper electrode, respectively.

[0121] The first electrode (600) and the second electrode (700) may have a conductivity greater than 0 and less than or equal to 1 Mohm / square. The first electrode and the second electrode may be made of the same or different materials. The first electrode (600) and the second electrode (700) may each independently include TiN, TaN, Ti, Ta, TiCN, TiSiN, WSiN, TiAlN, TaAlN, TiAlCN, TiW, RuTiN, RuCN, Pt, Au, Mo, or Al. The first electrode (600) and the second electrode (700) may each independently include TiN or Mo. The thickness of the first electrode (600) and the second electrode (700) may be 1 nm to 20 nm.

[0122] An electronic device comprises, for example, a semiconductor substrate including a source and a drain; a gate electrode disposed on the semiconductor substrate; and a thin film dielectric layer disposed between the semiconductor substrate and the gate electrode, and may further include a capacitor. The capacitor further comprises, for example, the thin film dielectric layer described above and a first thin film electrode layer and a second thin film electrode layer disposed respectively on both sides of the thin film dielectric layer, and the capacitor may be disposed on the semiconductor substrate or embedded within the semiconductor substrate.

[0123] The electronic device may be, for example, a semiconductor device. The semiconductor device may be in the form of multiple semiconductor devices connected together. The semiconductor device may be, for example, in the form of a field-effect transistor and a capacitor electrically connected. The semiconductor device may have memory characteristics, for example, and may be, for example, a DRAM.

[0124] FIG. 14 is a schematic diagram showing the structure of a semiconductor device according to another embodiment, namely the connection structure of a capacitor and a field-effect transistor.

[0125] Referring to FIG. 14, the semiconductor device (D70) has a structure in which a capacitor (D60) including a first dielectric layer thin film (200) containing the above-described ferroelectric material and a field-effect transistor (D61) are electrically connected by a contact (62). One of the electrodes (600, 700) of the capacitor (D60) and one of the source (120) and drain (130) of the transistor (D61) are electrically connected by the contact (62). The contact (62) may include a suitable conductive material, for example, tungsten, copper, aluminum, polysilicon, etc.

[0126] The field effect transistor (D61) includes a substrate (100) comprising a source (120), a drain (130), and a channel (110), and includes a gate electrode (300) positioned opposite the channel (110). It further includes a second dielectric layer (410) between the substrate (100) and the gate electrode (300). Although the field effect transistor (D61) of FIG. 12 is illustrated as an example that does not include a second dielectric layer thin film (200) comprising a ferroelectric, the field effect transistor (D61) may include a second dielectric layer thin film (200) comprising a ferroelectric. The source (120), drain (130), channel (110), substrate (100), and gate electrode (300) refer to the above-described transistor portion, and the dielectric layer (410) refers to the above-described dielectric layer (400). Although not shown in the drawing, the positions of the capacitor (D60) and the field-effect transistor (D61) can be varied. For example, the capacitor (D60) may be placed on the substrate (100) or embedded within the substrate (100). Explanation of the symbols

[0127] 62 contacts 100 substrates 101 Substrate area 110, 111 channels 120 Source 130 Drain 200 First dielectric layer thin film 300 Gate electrode 400, 410 Second dielectric layer thin film 500 conductive layer 600 1st electrode 700 2nd electrode D10, D20, D30, D40, D50, D70 semiconductor devices D60, D61 capacitors

Claims

Claim 1 A ferroelectric material comprising a first domain including a first polarization layer polarized in a first direction and a spacer layer disposed adjacent to the first polarization layer, and a second domain including a second polarization layer polarized in a second direction distinct from the first direction and a spacer layer disposed adjacent to the second polarization layer, and a structural layer disposed at the domain wall between the first domain and the second domain and having an orthorhombic crystal structure. Claim 2 A ferroelectric material according to claim 1, wherein the structural layer is arranged in a Pbcn space group. Claim 3 A ferroelectric material according to claim 1, wherein the structural layer comprises a first polarization layer and a second polarization layer. Claim 4 A ferroelectric material according to claim 3, wherein a spacer layer is free between the first polarization layer and the second polarization layer. Claim 5 In claim 1, the ferroelectric material comprises a fluorite compound. Claim 6 A ferroelectric according to claim 1, wherein the first polarization layer comprises four oxygen atoms and two metal atoms, the four oxygen atoms and the two metal atoms are arranged to have non-symmetry in the polar C-axis direction, and the first direction is one of the polar C-axis directions. Claim 7 A ferroelectric according to claim 1, wherein the second polarization layer comprises four oxygen atoms and two metal atoms, and the four oxygen atoms and the two metal atoms are arranged to have non-symmetry in the polar C-axis direction, and the second direction is opposite to the first direction among the polar C-axis directions. Claim 8 A ferroelectric material according to claim 1, wherein the spacer layer is a non-polarized layer, the spacer layer comprises four oxygen atoms and two metal atoms, and the four oxygen atoms and the two metal atoms are arranged to have symmetry in the polar C-axis direction. Claim 9 A ferroelectric material according to claim 1, wherein the first domain comprises a plurality of first polarization layers and a plurality of spacer layers disposed between the plurality of first polarization layers, and the second domain comprises a plurality of second polarization layers and a plurality of spacer layers disposed between the plurality of second polarization layers. Claim 10 A ferroelectric material according to claim 9, wherein a plurality of first polarization layers included in the first domain are polarized in the same first direction, and a plurality of second polarization layers included in the second domain are polarized in the same second direction. Claim 11 A ferroelectric material according to claim 1, wherein the first polarization layer and the second polarization layer have the same chirality. Claim 12 A ferroelectric according to claim 1, wherein the strain applied to the structural layer is -1% to 1%. Claim 13 A ferroelectric material according to claim 1, wherein the first domain and the second domain each independently comprise one or more crystal phases selected from an orthorhombic crystalline phase, a tetragonal crystalline phase, and a cubic crystalline phase. Claim 14 A ferroelectric according to claim 13, wherein the orthorhombic crystal phase belongs to the Pca21 space group, the tetragonal crystal phase belongs to the P42 / nmc space group, and the cubic crystal phase belongs to the Fm-3m space group. Claim 15 A ferroelectric according to claim 1, wherein the content of the structural layer is greater than 0 to 40 vol% with respect to the total volume of the ferroelectric. Claim 16 In claim 1, the ferroelectric comprises a binary metal oxide represented by the following chemical formula 1. <Chemical formula 1. MO2 In the above formula, M is an element belonging to Group 4 of the periodic table. Claim 17 In claim 15, the ferroelectric material in which M is Hf or Zr. Claim 18 In claim 16, the ferroelectric material wherein the binary metal oxide further comprises a dopant. Claim 19 In claim 18, the ferroelectric material wherein the dopant is one or more selected from C, Si, Ge, Sn, Pb, Al, Y, La, Gd, Mg, Ca, Sr, Ba, and Ti. Claim 20 The ferroelectric of claim 1, wherein the ferroelectric comprises a binary metal oxide represented by the following chemical formula 2 or 3. <Chemical Formula 2> Hf 1-x D x O2<Chemical Formula 3>Zr 1-x D x In the above formulas, D is one or more selected from C, Si, Ge, Sn, Pb, Al, Y, La, Gd, Mg, Ca, Sr, Ba, and Ti, and 0≤x≤0.

15. Claim 21 An electronic device comprising a thin film dielectric layer, wherein the thin film dielectric layer comprises a ferroelectric material according to any one of claims 1 to 20. Claim 22 An electronic device according to claim 21, wherein the thickness of the thin film dielectric layer is 0.1 nm to 50 nm. Claim 23 In claim 21, the current profile over time during polarization switching by voltage application to the thin film dielectric layer is greater than 0 to 5 × 10 -7 An electronic device having a peak in sec. Claim 24 An electronic device in claim 21, further comprising a thin film electrode layer, wherein the thin film electrode layer is disposed on one or both sides of the thin film dielectric layer. Claim 25 An electronic device according to claim 24, wherein the thickness of the thin film electrode layer is 10 nm to 1000 nm or less. Claim 26 An electronic device according to claim 24, wherein the thin film electrode layer comprises one or more selected from a metal, an oxide of the metal, a doped oxide of the metal, a nitride of the metal, and a carbide of the metal. Claim 27 An electronic device according to claim 26, wherein the metal comprises one or more selected from Ti, W, Ta, Co, Mo, Ni, V, Hf, Al, Cu, Pt, Pd, Ir, Au, and Ru; the oxide of the metal comprises one or more selected from RuO2, IrO2, PtO2, MnO2, Sb2O3, and In2O3; the doped oxide of the metal comprises one or more selected from Ta-doped SnO2, Ti-doped In2O3, Ni-doped SnO2, Sb-doped SnO2, and Al-doped ZnO; and the nitride of the metal comprises one or more selected from TiN, WN, TaN, TiAlN, TaSiN, TiSiN, WSiN, TiAlN, TiCN, TiAlCN, RuCN, and RuTiN. Claim 28 In claim 21, the electronic device is a capacitor, a transistor, or a memory. Claim 29 An electronic device according to claim 21, further comprising: a semiconductor substrate including a source and a drain; and a gate electrode disposed on the semiconductor substrate, wherein the thin film dielectric layer is disposed between the semiconductor substrate and the gate electrode. Claim 30 An electronic device, wherein, in claim 29, it further comprises an insulating layer disposed between the thin film dielectric layer and the semiconductor substrate. Claim 31 An electronic device according to claim 29, further comprising a capacitor, wherein the capacitor further comprises a first thin film electrode layer and a second thin film electrode layer disposed respectively on both sides of the thin film dielectric layer and the thin film dielectric layer, and wherein the capacitor is disposed on the semiconductor substrate or embedded within the semiconductor substrate.

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