LED display

Abstract

A high-density GaN-based LED display manufactured to include a color conversion region using wafer-to-wafer hybrid bonding is disclosed.

Description

Technology Field

[0001] The present disclosure relates to a high-density GaN-based LED display manufactured to include a color conversion region using wafer-to-wafer hybrid bonding. Background Technology

[0002] Manufacturing high-density LED displays that can be integrated into ocular devices such as contact lenses presents a unique challenge. Brief explanation of the drawing

[0003] The drawings described herein are for illustrative purposes only. The drawings are not intended to limit the scope of the disclosure. FIGS. 1A and FIGS. 1B illustrate cross-sectional views of semiconductor structures used to manufacture backplane wafers. FIGS. 2A and 2B illustrate cross-sectional views of semiconductor structures used to manufacture GaN-based LED frontplane wafers. FIGS. 3A and 3B illustrate cross-sectional views of semiconductor structures used to integrate a backplane wafer and a GaN-based LED backplane wafer and to provide a high-density LED array. FIGS. 4a through 4f illustrate cross-sectional views of semiconductor structures used to manufacture high-density LED displays provided by the present disclosure. FIGS. 5a through 5d illustrate cross-sectional views of semiconductor structures used to manufacture a high-density LED display having an overlying color conversion region provided by the present disclosure. FIGS. 6a through 6h illustrate cross-sectional views of semiconductor structures used to manufacture a high-density LED display having an overlying color conversion region provided by the present disclosure. Figure 7 shows a detailed cross-sectional view of an example of two adjacent GaN-based LEDs. FIG. 8 illustrates a cross-sectional view of an example of a scleral contact lens comprising a high-density GaN-based LED array and a femtoprojector provided by the present disclosure. Specific details for implementing the invention

[0004] According to the present invention, a high-density light-emitting diode (LED) display includes a color conversion region overlying a high-density LED array. The LED arrays are manufactured using hybrid wafer-to-wafer bonding to bond backplane interconnects to an LED frontplane wafer and interconnect them. After bonding the backplane and the frontplane wafer, the LED array can be manufactured. Then, a color conversion region can be manufactured over the integrated LED array to provide a high-density LED display.

[0005] An example of a process for manufacturing a high-density LED display is illustrated in FIGS. 1a to 3b.

[0006] FIG. 1a illustrates a backplane substrate (101), such as a silicon CMOS substrate, comprising conductive features (102), such as traces, interconnects, and vias embedded within a dielectric region (103), and contact pads (104) adjacent to an upper surface (105). The backplane substrate (101) may include LED driver circuits (not shown) and contact pads (104) for creating electrical interconnections between the LED driver circuits and each GaN-based LED p-contact. Certain contact pads may provide electrical interconnections between a common cathode and each LED n-contact.

[0007] SiO2 or SiN x A dielectric region (106), such as a region, can be deposited on a backplane substrate (101) and on contact pads (104) as shown in FIG. 1b.

[0008] FIG. 1b illustrates a cross-sectional view of an example of a backplane wafer (110) including a backplane substrate (101) and an overlying backplane interconnection region (109).

[0009] Overlying refers to a configuration in which one region is adjacent to another layer. An overlying region may be adjacent to an underlying region without any intervening regions or layers. Alternatively, there may be one or more regions or layers between the overlying region and the underlying region. A region may comprise a single layer of material or one or more layers of material. A region or a layer within a region may comprise a substantially homogeneous elemental composition, or the elemental composition within a layer may vary, for example, continuously or discontinuously, within the thickness of the region or layer and / or within the plane of the region or layer.

[0010] Referring to FIG. 1b, the thickness of the dielectric region (106) may be, for example, less than 6 μm, or less than 3 μm, for example, between 1 μm and 3 μm. A via (107) may be etched through the dielectric region (106) to expose a contact pad (104) using any suitable process. The via (107) may then be filled with a conductive material such as copper, a copper alloy, gold, silver, or a silver alloy to form a vertical interconnect or via for each contact pad (104). Then, the top surface (108) may be flattened using any suitable process, such as chemical mechanical polishing (CMP), to provide a flat surface (108). The deposition, etching, filling, and polishing steps of the dielectric region (106) may be repeated to provide a desired aspect ratio for the vertical interconnect (107). For example, the vertical interconnection part (107) may have an aspect ratio (height:width) of 1:1 to 10:1, e.g. 1:1 to 5:1, or 1:1 to 3:1.

[0011] FIG. 2b illustrates a cross-sectional view of an example of a GaN-based LED frontplane wafer (210) including a GaN-based LED region (202) and a GaN-based LED interconnection region (209).

[0012] FIGS. 2a and 2b illustrate examples of process steps for manufacturing a GaN-based LED frontplane wafer. A GaN-based LED region (202) may be epitaxially grown on a suitable substrate (203), such as a silicon, sapphire, or silicon carbide substrate, to provide a GaN-based LED backplane wafer (201). The GaN-based LED region (202) may include a buffer region (not shown), an n-doped GaN region (202a), an active GaN region (202b), and a p-doped GaN region (202c). The GaN-based LED region (202) may have a thickness of, for example, 3 µm to 6 µm, for example, 4 µm to 6 µm, or 5 µm to 6 µm. A p-contact metal region (202d) may be placed over a p-doped GaN region (202c) and may provide electrical contact to the p-doped GaN region (202c). The p-contact metal region (202d) may include a conductive oxide, for example, indium tin oxide (ITO), silver, palladium, nickel, and / or gold. A reflective metal region (202e), such as an aluminum, iridium, or ruthenium layer, may be placed over the p-contact metal region (202d). A barrier metal (202f), such as titanium nitride, chromium, tantalum, tantalum nitride, tungsten nitride, titanium tungsten alloy, and / or ruthenium, may be placed over the reflective metal region (202e).

[0013] As shown in FIG. 2b, for example, SiO2 or SiN xA dielectric region (206) including the above can be deposited on an epitaxial GaN-based LED region (202) with a thickness of, for example, less than 4 μm or less than 3 μm, such as 1 μm to 3 μm. Then, vias (207) can be etched through the dielectric region (206) to expose portions of the epitaxial GaN-based LED region (202). Then, vias (207) can be filled with an electrically conductive material such as copper, copper alloy, silver, silver alloy, or gold to provide vertical interconnects or vias (207). Then, the surface (208) can be flattened using any suitable method, such as chemical mechanical polishing. The steps of depositing the dielectric region, etching, filling, and flattening can be repeated to provide a desired aspect ratio for the vertical interconnects (207) versus the GaN-based LED region (202). For example, the vertical interconnection part (207) may have an aspect ratio (height:width) of 1:1 to 10:1, e.g. 1:1 to 5:1, or 1:1 to 3:1.

[0014] The backplane wafer (110) and the GaN-based LED frontplane wafer (210) can then be bonded using wafer-to-wafer hybrid bonding so that the backplane wafer vertical interconnects (107) are aligned with each frontplane wafer interconnect (207) as shown in FIG. 3a.

[0015] Forming the bonding surface may include finishing the backplane surface (108) and the frontplane surface (208) to meet dielectric roughness specifications and metal layer recess specifications suitable for hybrid bonding. For example, the surfaces (108 / 208) may be plasma-activated to prepare for wafer-to-wafer hybrid bonding.

[0016] The backplane interconnection area (104) and the frontplane interconnection area (204) can be bonded and interconnected using hybrid bonding technology.

[0017] Hybrid bonding can generally include wafer cleaning and activation, high-precision alignment of contacts on one wafer and contacts on another wafer, dielectric bonding of dielectric materials on the surfaces of wafers at room temperature, and metal bonding of opposing interconnects by annealing at elevated temperature. The bonding layer may include dielectric regions and metal-filled vias. The dielectric materials of the dielectric regions may include, for example, SiCN, SiO2, SiN, Al2O3, HfD2, ZrO2, Ta2O5. The bonding surfaces may be flattened and polished, for example, using chemical mechanical polishing, and flattening or polishing may cause dishing or concave profiles across the metal-filled vias. The bonding surfaces may be cleaned and activated by exposure to ions or high-speed atomic beams, such as plasma ions or high-speed Ar atomic flux, for example. The activated surface can be atomically cleaned and may be reactive to the formation of direct bonding between surfaces when in contact, for example, at room temperature.

[0018] In a process for bonding hybrid bonding surfaces, after the bonding surfaces are planarized and activated, the frontplane and backplane wafers can be aligned and physically contacted. Compressive pressure can be applied to the frontplane and backplane wafers so that the hybrid bonding surfaces are pressed against each other. Due to surface activation and dishing in the metal-filled vias, opposing dielectric regions can come into direct contact as a result of surface attractive forces, and, for example, can react between the opposing surfaces and form chemical bonds resulting from the reaction of reactive dangling bonds caused by surface activation. Dielectric materials within the opposing interconnect regions can be bonded with or without heat treatment or pressure.

[0019] Bonded interconnect regions may undergo an annealing process to bond metal-filled vias within the opposing interconnect regions after bonding the dielectric materials within the opposing interconnect regions. For example, the opposing metal-filled vias may be bonded together by annealing at temperatures, for example, within the range of 200 °C to 400 °C, or at temperatures above 400 °C. During the annealing process, due to the difference in coefficients of thermal expansion, the metal within the metal-filled vias may expand more than the dielectric material, thereby expanding the dish-shaped profile of the metal to come into contact with the metal within the opposing metal-filled vias, thereby forming a direct metal interconnect.

[0020] FIG. 3a illustrates a semiconductor structure in which a backplane wafer (110) is directly bonded to a GaN-based LED frontplane wafer (210) at a wafer-to-wafer hybrid bonding interface (301). Vertical interconnects (107 and 207) are aligned within an interconnect region (302) and a hybrid bonding interface (301). The interconnect region (302) includes a backplane interconnect region (104) and a GaN-based LED frontplane interconnect region (204) separated by the bonding interface (301). The backplane wafer (110) includes an interconnect region (104) comprising metal-filled vias (107) and a dielectric (106) on a backplane substrate (103). The frontplane wafer (210) includes a substrate (203), an epitaxial GaN-based LED epitaxial region (202), and a frontplane interconnect region (204) including metal-filled vias (207) and a dielectric (206).

[0021] After bonding, the GaN-based LED frontplane substrate (203) may be removed, for example, using chemical mechanical polishing and / or blanket dry etching or laser lift-off, to expose the underlying GaN-based LED region (202). A portion of the GaN-based LED region (202) may be removed so that the GaN-based LED region (202) has a thickness of, for example, less than 6 μm, for example, less than 3 μm, for example, between 1 μm and 3 μm. The microstructure may be etched into the upper surface of the GaN-based LED region (202) to improve the coupling of radiation from the GaN-based LEDs to the overlying color conversion region.

[0022] Then, the thin GaN-based LED region (202) can be patterned into individual LEDs to provide the semiconductor structure illustrated in FIG. 3b. Deep etching can be performed through the GaN-based LED region (202) to provide a plurality of isolated GaN-based LEDs (214). The etching is performed on the SiN of the interconnection region (302). x Common cathode vias (211) interconnected to the backplane substrate (101) can be exposed on the surface (208) of the / SiO2 dielectric region (306).

[0023] The trenches (213) between the individual GaN-based LEDs (214) may have a width of, for example, less than 0.4 µm, less than 0.3 µm, less than 0.2 µm, or between 0.2 µm and 0.3 µm. The GaN-based LEDs may have a height of less than 4 µm, for example, between 2 µm and 4 µm, or between 2.5 µm and 3.5 µm.

[0024] FIGS. 4a through 4f illustrate examples of additional processing steps that can be used to manufacture a high-density LED display provided by the present disclosure.

[0025] FIG. 4a illustrates a semiconductor structure comprising a backplane substrate (401), an interconnection region (402), a common cathode interconnection (403) electrically connected to a cathode contact (404), and a GaN-based LED interconnection (405) connecting GaN-based LEDs (407) to respective anode contact pads (406). The GaN-based LED (407) comprises an n-doped GaN region (407a), an active GaN region (407b), a p-doped GaN region (407c), a p-contact metal region (407d), a reflective metal layer (407e), and a barrier metal (407f).

[0026] As illustrated in FIG. 4b, the dielectric region (410) can be deposited, for example, using atomic vapor deposition, so as to be placed on the surfaces of the GaN-based LEDs (407) and the interconnection region (402). The dielectric region (410) is made of Al2O3, TiO2, SiO2, or SiN x , HfO x , or NbO x It may include a dielectric material such as. The dielectric region (410) may have a thickness of, for example, less than 1 μm. A portion of the dielectric region (410) may be deposited on the upper horizontal surface (410a) of each GaN-based LED and on the vertical sidewalls (410b) of each GaN-based LED. A reflective metal region (411) may be deposited so as to be placed over both the horizontal portion (411a) and the vertical portion (411b) of the dielectric region (410).

[0027] Then, portions of the dielectric region (410) and reflective metal region (411) on the horizontal surfaces of the semiconductor structure can be removed to provide the semiconductor structure illustrated in FIG. 4c. Directional etching can be used to remove the dielectric region (410a) and reflective metal region (411a) from the horizontal surfaces, leaving the dielectric region (410b) and reflective region (411b) on the sidewalls of the GaN-based LEDs. The dielectric layer (410b) on the vertical sidewalls of the GaN-based LEDs can prevent short circuits between adjacent GaN-based LEDs. The reflective metal region (411b) can serve to direct incident and emitted radiation toward the apertures of the GaN-based LEDs.

[0028] Then, an electrically conductive metal (412), such as copper, a copper alloy, silver, a silver alloy, or gold, may be deposited on the semiconductor structure shown in FIG. 4c to fill the trenches between the GaN-based LEDs and to fill the trenches over the common cathode metal-filled vias to provide the structure shown in FIG. 4d. The semiconductor structure may be flattened using any suitable method, such as chemical mechanical polishing, to expose the GaN surface of each LED to provide the semiconductor structure shown in FIG. 4e.

[0029] For example, a transparent electrically conductive region (414) comprising a transparent electrically conductive oxide may be deposited on a flattened surface to provide an electrical contact between a common cathode contact pad (404) and each GaN-based LED (407). The transparent electrically conductive region may function as a current diffusion layer. The resulting semiconductor structure is illustrated in FIG. 4f. Examples of suitable transparent electrically conductive materials include transparent conductive oxides. Examples of suitable transparent conductive oxides include In2O3:H (IO:H), InSnO (ITO), InZnO (a-IZO), In2O3:Zr (ZrIO); ZnO:Al (AZO), ZnSnO (a-ZTO), ZnO:B (BZO), ZnO:B (BZO), ZnO:Ga (GZO), SnO2, ZnO, CdSnO2, and CdO:In. For example, the transparent conductive oxide may be indium tin oxide (ITO). The transparent conductive oxide may have a thickness of, for example, 1 nm to 250 nm, 10 nm to 250 nm, 20 nm to 200 nm, or 20 nm to 80 nm, and a refractive index of about 2.0.

[0030] The p-contact metal of each GaN-based LED can be independently addressable to a driver circuit through an interconnect (405) via each anode metal-filled via, and the n-doped region of the GaN-based LEDs can be interconnected to a common cathode (404) via a transparent conductive oxide region (414). The semiconductor structure illustrated in FIG. 4f can be referred to as an integrated LED array.

[0031] FIGS. 5a through 5d illustrate examples of steps that can be used to manufacture a color conversion region placed on an integrated GaN-based LED array as shown in FIG. 4f.

[0032] A color conversion region refers to a structure configured to convert the wavelength of incident radiation, such as light from an array of blue light-emitting diodes (LEDs), to emit light within one or more different wavelength ranges, such as light within the green and red wavelength ranges, for example. The color conversion region may include a plurality of color conversion pixels and may include multiple layers comprising a color conversion region including a plurality of pixels and one or more other layers such as passivation layers, reflection layers, crosstalk minimization layers, and / or focusing layers.

[0033] Referring to FIG. 5a, to manufacture a color-converting region, a dielectric region (515) may be deposited so as to be placed over a transparent electrically conductive region (514). The dielectric region (515) may have a thickness of, for example, less than 10 μm or less than 5 μm. The dielectric region (515) may be, for example, SiO2 or SiN x It may include.

[0034] Then, a metal region (516) may be deposited on the dielectric region (515) of the semiconductor structure to provide the semiconductor structure illustrated in FIG. 5a. The metal region (516) may have a thickness of, for example, less than 20 μm, less than 15 μm, less than 10 μm, or less than 5 μm. The metal region (516) may have a thickness of, for example, 0.5 μm to 20 μm, 0.5 μm to 10 μm, 0.5 μm to 5 μm, 1 μm to 4 μm, or 1 μm to 3 μm. The metal region (516) may include, for example, aluminum. The metal region (516) may include a metal that is reflective of radiation in the visible wavelength range.

[0035] Parts of the metal region (516) between the GaN-based LEDs (507) can be etched to expose the dielectric region (515) placed over the GaN-based LEDs and create cavities (517) as shown in FIG. 5b.

[0036] Then, as illustrated in FIG. 5c, in order to provide color conversion pixels (518) and color conversion regions (520) placed on GaN-based LEDs (507), cavities (517) can be filled with a suitable color conversion material using a suitable method.

[0037] An optically transparent region (521) may be deposited on a flattened surface to provide a semiconductor structure as illustrated in FIG. 5d, which includes a color conversion region (520). The optically transparent region (521) may include silicon dioxide or other optically transparent dielectrics and may provide a hermetic seal.

[0038] FIG. 5d illustrates a cross-sectional view of an example of a high-density LED display provided by the present disclosure.

[0039] A wavelength selection area, such as a Bragg reflector (not shown), may be deposited on the color conversion pixels (518). The wavelength selection area may be configured to transmit visible radiation, for example, within an intended range of visible wavelengths. The wavelength selection area may be configured to transmit radiation having wavelengths within blue, red, or green wavelength ranges, for example. The wavelength selection area may be configured to reflect wavelengths emitted by a GaN-based LED, such as wavelengths within the blue wavelength range.

[0040] Examples of suitable color-changing materials include, for instance, quantum dots. Quantum dots are semiconductor materials with size, composition, and structure in which electrical and optical properties differ from bulk properties due to the quantum confinement effect. The fluorescence of quantum dots is attributed to the excitation of valence electrons by light absorption, followed by emission at lower energy wavelengths as the excited electrons return to the ground state. Quantum confinement causes the energy difference between the valence band and the conduction band to change depending on the size, composition, and structure of the quantum dots. For example, the larger the quantum dot, the lower the energy of the fluorescence spectrum. The photoluminescence emission wavelengths of quantum dots exhibit a sharp emission spectrum and can demonstrate high quantum efficiency.

[0041] Color-changing materials can be applied to cavities using, for example, inkjet printing, slot die coating, slit coating, screen printing, or spin coating.

[0042] The surface of a semiconductor structure can be flattened, for example, using chemical mechanical polishing.

[0043] The color conversion region may include a plurality of color conversion pixels, and at least some of the pixels include a plurality of quantum dots.

[0044] The volume fraction of quantum dots within a pixel may be 10% to 70%, 10% to 50%, for example 10% to 40%, 10% to 30%, or 10% to 20%.

[0045] The color conversion area may have a thickness of, for example, less than 5 μm, less than 2 μm, less than 1 μm, or less than 0.5 μm.

[0046] The color conversion area containing color conversion pixels is, for example, 0.2 mm 2 to 10 mm 2 It can have a cross-sectional area.

[0047] A color conversion region may be configured to convert incident light within an incident wavelength range into emitted light within one or more emitted wavelength ranges. In the case of an optical display, the incident light may be in the blue wavelength range, and multiple pixels may be selected to provide an acceptable color gamut for a visual display. A four-color display designed to produce 100% of REC2020 may include, for example, red, green, blue, and cyan pixels. A four-color display designed to preserve night vision may add deep red (DR) pixels having a peak emission wavelength greater than about 720 nm.

[0048] For specific applications, the color converter provided by the present disclosure may exhibit a quantum conversion efficiency of more than 80% from 455 nm blue light to green or red light, the green and red pixels have less than 2% blue leakage through the green and red pixels, the layer thickness is less than 2 μm, the pixels are located on a pitch of 3.3 μm or less, the crosstalk or extinction ratio between adjacent pixels may be less than 1000:1, and it may be desirable that the color conversion layer is compatible with SiO2 sealant technology and other dielectric films configured to provide hermetic sealing over a useful time frame.

[0049] In certain color conversion pixels, blue light from a GaN-based LED array can be transmitted through a blue transmission pixel. In certain color conversion pixels, GaN-based LEDs can emit in a wavelength range such as 400 nm to 430 nm, and blue pixels may include a plurality of quantum dots that absorb in a wavelength range of 400 nm to 430 nm and emit in a blue wavelength range, for example, 450 nm to 490 nm.

[0050] In certain GaN-based LED displays, the GaN-based LED array can emit in a near-ultraviolet wavelength range, for example, from 300 nm to 400 nm or other suitable wavelength ranges.

[0051] In certain GaN-based LED displays, the GaN-based LED array can emit in a near-infrared wavelength range, for example, from 780 nm to 1700 nm or other suitable wavelength range, and the quantum dots can absorb a number of low-energy photons and upconvert them to a desired visible wavelength.

[0052] In certain color conversion pixels, all or part of the multiple pixels may include quantum dots capable of emitting in a red to near-infrared wavelength range such as 650 nm to 750 nm. Near-infrared displays may be useful for night vision applications.

[0053] The color conversion area may include a plurality of pixels. For example, the color conversion area may include 1,000 to 1,000,000 pixels, 5,000 to 500,000 pixels, or 10,000 to 100,000 pixels. The color conversion layer may include, for example, more than 1,000 pixels, more than 5,000 pixels, more than 10,000 pixels, more than 100,000 pixels, or more than 1,000,000 pixels.

[0054] An alternative method for manufacturing a color conversion region placed on an integrated GaN-based LED array is illustrated in FIGS. 6a to 6h.

[0055] Starting with the integrated LED array shown in FIG. 4f, as shown in FIG. 6a, a thick dielectric region (616) can be deposited so as to be placed over a transparent electrically conductive region (620). The thick dielectric region (616) may include a photoresist. FIG. 6a illustrates an interconnection substrate (601) comprising an anode contact pad (608) and a cathode contact pad (609), an interconnection region (602) comprising a metal-filled anode via (605) and a metal-filled cathode via (606) within a dielectric (604), a conductive metal (612) between a GaN-based LED (607) and the GaN-based LED (607), a dielectric region (610b) placed over the sidewall of the GaN-based LED and a reflective region (611b) placed over the dielectric region (610b), a transparent conductive region (620) placed over the GaN-based LED (607) and the conductive metal (612), and a thick dielectric region (616) placed over the transparent electrically conductive region (620). Metal-filled vias (605 and 606) are formed using hybrid bonding and interconnect the p-contacts of the GaN-based LEDs to the anode contact pad or interconnect the n-contacts of the GaN-based LEDs to the cathode contact pad.

[0056] As illustrated in FIG. 6b, a thick dielectric region (616) may be etched in portions over the metal (612) to expose a transparent electrically conductive region (620). As illustrated in FIG. 6c, a reflective metal region (617) may be deposited over the unetched dielectric regions (616) and over the transparent electrically conductive region (620). The reflective metal region (617) may be deposited, for example, using atomic layer deposition or sputtering, and may include, for example, aluminum, iridium, or ruthenium. A metal (618) may be deposited to fill trenches between and adjacent to GaN-based LEDs, as illustrated in FIG. 6d. The metal may include, for example, copper. After planarization, as shown in FIG. 6e, the semiconductor structure comprises thick dielectric regions (616) placed over GaN-based LEDs (607) and a metal (618) placed over portions between the thick dielectric regions (616). A reflective metal region (617) is placed below the metal region (618) and separates the sidewalls of the metal region (618) from the dielectric regions (616). The thick dielectric region (616) can then be etched to leave cavities (621) having sidewalls lined with the reflective metal region (617), as shown in FIG. 6f.

[0057] As described in the specification, the cavities (621) may be filled with a color-changing material (622) as shown in FIG. 6g and may be coated with an optically transparent area (623), such as silicon dioxide, to provide a hermetic seal as shown in FIG. 6h.

[0058] FIG. 6h illustrates a cross-sectional view of an example of a high-density GaN-based LED display provided by the present disclosure.

[0059] FIG. 7 illustrates a cross-sectional view of two adjacent GaN-based LEDs (701). FIG. 7 is drawn to scale using specific dimensions, but other suitable dimensions for the structure may be used. As shown in FIG. 7, the GaN-based LEDs (701) comprise 2.75 μm of n-doped GaN (702), 0.05 μm of InGaN multiple quantum well (MQW) active region (703), and 0.2 μm of p-doped GaN (704). Light can be generated by the InGaN-MQW active region (703), so the light path from the n-doped region (702) to the GaN-based LED aperture from the InGaN-MQW active region (703) is 2.75 μm. For embodiments where the GaN-based LED is 1 μm wide, the light path has a height-to-width aspect ratio of 2.75:1. The light may be reflected multiple times from the sidewalls before reaching the LED aperture.

[0060] The sidewalls of the GaN-based LEDs (701) can be coated, for example, with a dielectric (705) with a thickness of 0.02 μm, a reflective metal layer (706) with a thickness of 0.05 μm, and a metal filler (707) with a thickness of 0.16 μm, which can provide structural support and also provide electrical connections to common cathode pads.

[0061] Referring to FIG. 7, various structures may have any other suitable dimensions. For example, the gap between adjacent GaN-based LEDs may be 0.2 μm to 1 μm, the dielectric layer (704) may have a thickness of 0.01 μm to 0.05 μm, and the reflective metal layer may have a thickness of 0.03 μm to 0.10 μm. For example, the n-GaN region (702) may have a thickness of 1 μm to 5 μm, the InGaN-MQW region may have a thickness of 0.025 μm to 0.075 μm, and the p-GaN region (706) may have a thickness of 0.1 μm to 0.3 μm. A p-contact metal such as indium tin oxide, Ag, or NiAu may be placed under the GaN region and may have a thickness of, for example, less than 50 nm.

[0062] The femtoprojector provided by the present disclosure can be integrated into a contact lens, such as a scleral contact lens, that can be worn over a user's eye.

[0063] An example of a femtoprojector display integrated into a scleral contact lens is illustrated in FIG. 8. FIG. 8 illustrates a scleral contact lens (801) worn over the cornea (802) of an eye (803). When worn over the eye, the femtoprojector (804) may be configured to project an image onto the retina (807) through the cornea (802) and lens (806) from a high-density GaN-based LED display (705) to provide a retinal image (808).

[0064] A femtoprojector (804) comprising a GaN-based LED display (805), an electronic interface such as an application-specific integrated circuit (ASIC) (809), and an optical system (810) has a total volume, e.g., 3 mm 3 Less than, for example, 2 mm 3 Less than or 1 mm 3 Can have less than

[0065] The femtoprojector display may have, for example, a 330x300 pixel array, a 250x250 pixel array, a 200x200 pixel array, a 150x150 pixel array, or any other suitable pixel array dimensions.

[0066] A femtoprojector display can have, for example, 100,000 pixels to 1,000,000 pixels.

[0067] The femtoprojector display can be, for example, monochrome, or a three-color display having, for example, red, blue, and green pixels.

[0068] Finally, it should be noted that alternative ways of implementing the embodiments disclosed herein exist. Accordingly, these embodiments should be regarded as exemplary rather than restrictive. Furthermore, the claims are not limited to the details given herein and are qualified for their full scope and equivalents.

Claims

Claim 1 A high-density light-emitting diode (LED) display comprising: a backplane substrate including anode contact pads and cathode contact pads; an interconnection region disposed on the backplane substrate, wherein the interconnection region comprises a frontplane interconnection region including frontplane vertical interconnections; a backplane interconnection region including backplane vertical interconnections; and a hybrid bonding interface between the frontplane interconnection region and the backplane interconnection region, wherein the frontplane vertical interconnections are aligned with each backplane vertical interconnection, and each of the backplane vertical interconnections is electrically connected to an anode contact pad or a cathode contact pad, and the frontplane vertical interconnections and the backplane vertical interconnections each comprise copper-filled vias; an LED region disposed on the interconnection region, wherein the LED region comprises LEDs, and each of the LEDs is independently interconnected to an individual anode contact pad. A high-density light-emitting diode (LED) display comprising: a transparent electrically conductive region placed over the LED region - the transparent electrically conductive region is connected to each of the LEDs and to a cathode contact pad -; a dielectric region placed over the transparent electrically conductive region; and a color conversion region placed over the dielectric region, wherein the color conversion region comprises: a metal layer placed over the transparent electrically conductive region; and a color conversion pixel formed within the metal layer and placed over each LED. Claim 2 A high-density light-emitting diode (LED) display according to claim 1, wherein each of the LEDs is electrically connected to an anode contact pad through a metal-filled anode via. Claim 3 A high-density light-emitting diode (LED) display according to claim 1, wherein the electrically conductive metal between each of the LEDs is electrically connected to the cathode contact pads through a metal-filled cathode via. Claim 4 A high-density light-emitting diode (LED) display according to claim 1, wherein each of the LEDs comprises sidewalls, and the sidewalls further comprise: a sidewall dielectric region placed over the LED sidewalls; and a sidewall reflection region placed over the sidewall dielectric region. Claim 5 A high-density light-emitting diode (LED) display according to claim 1, wherein the backplane substrate comprises a silicon CMOS substrate. Claim 6 In claim 1, the interconnection area comprises silicon dioxide, a high-density light-emitting diode (LED) display. Claim 7 In claim 1, the LED region is a high-density light-emitting diode (LED) display having a thickness of less than 4 μm. Claim 8 In claim 1, the LEDs are high-density light-emitting diode (LED) displays having a maximum width of less than 0.4 μm. Claim 9 In claim 1, the color conversion region is a high-density light-emitting diode (LED) display having a thickness of less than 5 μm. Claim 10 In claim 1, the color conversion pixels have a maximum width of less than 0.4 μm, in a high-density light-emitting diode (LED) display. Claim 11 A method for manufacturing a high-density light-emitting diode (LED) display, comprising: a step of depositing a dielectric region that lies over a transparent electrically conductive region of an integrated LED array, wherein a first portion of the dielectric region lies over the LEDs and a second portion of the dielectric region lies over a metal; a step of depositing a metal region that lies over the dielectric region, wherein a first portion of the metal region lies over the first portion of the dielectric region and a second portion of the metal region lies over the metal; and a step of etching the first portion of the metal region to expose the first portion of the dielectric region in order to provide a cavity that lies over each of the LEDs. A method comprising the step of filling each of the cavities with a color conversion material to provide a color conversion pixel placed on each of the LEDs, wherein the integrated LED array comprises: a backplane substrate including anode contact pads and cathode contact pads; an interconnection region including metal-filled vias placed on the backplane substrate, wherein the interconnection region includes a hybrid bonding interface and each of the metal-filled vias is electrically connected to an anode contact pad or a cathode contact pad; an LED region placed on the interconnection region, wherein the LED region includes LEDs and each of the LEDs is independently interconnected to an individual anode contact pad; and a transparent electrically conductive region placed on the LED region, wherein the transparent electrically conductive region is connected to each of the LEDs and to a cathode contact pad. Claim 12 delete Claim 13 A high-density light-emitting diode (LED) display comprising: a backplane substrate including anode contact pads and cathode contact pads; a frontplane interconnection region including frontplane vertical interconnections; a backplane interconnection region including backplane vertical interconnections; and a hybrid bonding interface between the frontplane interconnection region and the backplane interconnection region, wherein the frontplane vertical interconnections are aligned with each backplane vertical interconnection, each of the backplane vertical interconnections is electrically connected to an anode contact pad or a cathode contact pad, and the frontplane vertical interconnections and the backplane vertical interconnections each include copper-filled vias; an LED region placed over the interconnection region, wherein the LED region includes LEDs, and each of the LEDs is independently interconnected to an individual anode contact pad; A high-density light-emitting diode (LED) display comprising: a transparent electrically conductive region placed over the LED region - the transparent electrically conductive region is connected to each of the LEDs and to a cathode contact pad -; and a color conversion region placed over the transparent electrically conductive region, wherein the color conversion region comprises: a color conversion pixel placed over a first portion of the transparent electrically conductive region and placed over each of the LEDs; a reflective metal region placed over a second portion of the transparent electrically conductive region; and a metal between each of the color conversion pixels. Claim 14 A method for manufacturing a light-emitting diode (LED) display, comprising the steps of: depositing a dielectric region that is placed over a transparent electrically conductive region of an integrated LED array, wherein a first portion of the transparent electrically conductive region is placed over each of the LEDs, and a second portion of the transparent electrically conductive region is placed over a metal region; wherein the first portion of the dielectric region is placed over the first portion of the transparent electrically conductive region and the second portion of the transparent electrically conductive region; etching the second portion of the dielectric region to expose the transparent electrically conductive region; depositing a reflective metal region that is placed over the first portion of the dielectric region and over the exposed transparent electrically conductive region; depositing a metal region that is placed over the reflective metal region; planarizing the metal region to expose the first portion of the dielectric region; and etching the first portion of the dielectric region to expose the first portion of the transparent electrically conductive region to provide a cavity placed over each LED. A method comprising the step of filling each of the cavities with a color conversion material to provide a color conversion pixel placed on each of the LEDs, wherein the integrated LED array comprises: a backplane substrate including anode contact pads and cathode contact pads; an interconnection region including metal-filled vias - said interconnection region includes a hybrid bonding interface, and said metal-filled vias are electrically connected to an anode contact pad or a cathode contact pad -; an LED region placed on the interconnection region - said LED region includes LEDs, said LEDs are independently interconnected to individual anode contact pads -; and a transparent electrically conductive region placed on the LED region, said transparent electrically conductive region is connected to each of the LEDs and to a cathode contact pad. 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