Oxide semiconductor transistor and its manufacturing method

Abstract

A method for manufacturing an oxide semiconductor transistor according to one embodiment of the present invention may include the steps of forming a gate on a substrate, forming an insulating layer on the gate, forming a source and a drain spaced apart from each other on the insulating layer, forming a channel layer located on the insulating layer and located between the source and the drain, forming a screen oxide film on the source, drain and channel layer, and injecting BF2 into the channel layer.

Description

Technology Field

[0001] The present invention relates to an oxide semiconductor transistor and is a technology that improves the electrical characteristics and stability of the transistor by injecting BF2 into the channel layer. Background Technology

[0002] Semiconductor transistors are key components for controlling the flow of current and are widely used in various electronic devices, including digital and analog circuits. A typical transistor controls the movement of electrons within a channel through a gate electrode, and the current flow between the source and drain is regulated according to the voltage applied to the gate. Since these switching operation characteristics are directly related to driving stability in display panel driving circuits or sensor circuits, the implementation of high-performance transistors is closely linked to the improvement of overall system performance.

[0003] Oxide semiconductor transistors offer advantages over conventional silicon-based transistors, such as the ability to perform low-temperature processing, low leakage current characteristics due to a wide bandgap, and high transparency. In particular, when IGZO (In-Ga-Zn-O) is used as a channel material, excellent mobility and low-power driving characteristics can be simultaneously achieved, making them a focus of attention in the fields of next-generation flexible displays and high-resolution panels.

[0004] However, conventional oxide semiconductor transistors have oxygen defects (oxygen vacancies, V) within the channel. oSince electrical characteristics are significantly affected by the presence of oxygen defects, there are limitations in maintaining the balance between on-current and off-current and ensuring long-term stability. In particular, for multi-element oxides such as IGZO, it is difficult to precisely control the concentration distribution of oxygen defects, which can affect the uniformity and reliability of the device. Therefore, there is a need for a technology that can control the spatial distribution of oxygen defects by selectively implanting ions into the channel region, thereby simultaneously improving the electrical characteristics and stability of the transistor. Prior art literature

[0005] Korean Registered Patent Publication No. 10-0691002 ("Ion implantation method in semiconductor process and method for manufacturing semiconductor device using the same", Publication date: June 29, 2005) The problem to be solved

[0006] To solve the aforementioned problem, the present invention aims to provide an oxide semiconductor transistor capable of simultaneously improving on-current and off-current characteristics by precisely controlling the spatial distribution of oxygen defects through the injection of BF₂ ions into the channel layer of the oxide semiconductor transistor, thereby selectively doping B ions and F ions into the lower (front channel) and upper (back channel) regions, respectively. means of solving the problem

[0007] An oxide semiconductor transistor according to one embodiment of the present invention comprises a substrate, a gate located on the substrate, an insulating layer located on the gate, a source and a drain located spaced apart from each other on the insulating layer, a channel layer located on the insulating layer and located between the source and the drain, and a screen oxide film located on the source, the drain and the channel layer, wherein BF2 is injected into the channel layer.

[0008] According to one embodiment, the channel layer may be divided into a lower region adjacent to the insulating layer and an upper region adjacent to the screen oxide film, wherein B ions are implanted in the lower region and F ions are implanted in the upper region.

[0009] According to one embodiment, the channel layer may be characterized by comprising one or more materials selected from IGZO, IGO, and IZO.

[0010] According to one embodiment, in the lower region, B ions form a bond with oxygen, and in the upper region, F ions form a bond with metal.

[0011] According to one embodiment, the channel layer may be characterized in that the concentration of oxygen vacancies increases from the upper region to the lower region.

[0012] According to one embodiment, the screen oxide film may be characterized by being formed with a thickness corresponding to a preset depth so that BF2 is injected into a preset depth of the channel layer.

[0013] According to one embodiment, BF2 may be characterized by being doped according to an ion implantation energy and an ion implantation amount corresponding to a preset depth so as to be injected into a preset depth of the channel layer.

[0014] According to one embodiment, BF2 may be characterized by being injected with an energy of 40 keV or more and 80 keV or less.

[0015] According to one embodiment, the screen oxide film may be characterized by being formed through an ALD or RF sputtering process.

[0016] According to one embodiment, the source and drain may be characterized by being formed by including one or more materials among tungsten (W), molybdenum (Mo), aluminum (Al), and silver (Ag).

[0017] A method for manufacturing an oxide semiconductor transistor according to one embodiment of the present invention may include the steps of forming a gate on a substrate, forming an insulating layer on the gate, forming a source and a drain spaced apart from each other on the insulating layer, forming a channel layer located on the insulating layer and located between the source and the drain, forming a screen oxide film on the source, drain and channel layer, and injecting BF2 into the channel layer.

[0018] According to one embodiment, the channel layer may be divided into a lower region adjacent to an insulating layer and an upper region adjacent to a screen oxide film, wherein B ions are implanted in the lower region and F ions are implanted in the upper region.

[0019] According to one embodiment, the channel layer may be characterized by comprising one or more materials selected from IGZO, IGO, and IZO.

[0020] According to one embodiment, in the lower region, B ions form a bond with oxygen, and in the upper region, F ions form a bond with metal.

[0021] According to one embodiment, the channel layer may be characterized in that the concentration of oxygen vacancies increases from the upper region to the lower region.

[0022] According to one embodiment, the step of forming a screen oxide film may be characterized by forming it with a thickness corresponding to a preset depth so that BF2 is injected into a preset depth of the channel layer.

[0023] According to one embodiment, the step of injecting BF2 may be characterized by doping according to the ion injection energy and ion injection amount corresponding to the preset depth so that it is injected into the preset depth of the channel layer.

[0024] According to one embodiment, the step of injecting BF2 may be characterized by injecting with an energy of 40 keV or more and 80 keV or less.

[0025] According to one embodiment, the step of forming a screen oxide film may be characterized by forming it through an ALD or RF sputtering process.

[0026] According to one embodiment, the source and drain may be characterized by being formed by including one or more materials among tungsten (W), molybdenum (Mo), aluminum (Al), and silver (Ag). Effects of the invention

[0027] An oxide semiconductor transistor and a method for manufacturing the same according to one embodiment of the present invention can precisely control the spatial distribution of oxygen defects by selectively doping B ions and F ions in the lower (front channel) and upper (back channel) regions, respectively, by implanting BF₂ ions into the channel layer, thereby simultaneously improving on-current and off-current characteristics. Brief explanation of the drawing

[0028] FIG. 1 is a cross-sectional view of an oxide semiconductor transistor of the present invention according to one embodiment. FIG. 2 is a schematic diagram showing regions in which BF2 can be injected into a channel layer according to one embodiment, and FIG. 3 is a graph analyzing electrical characteristics according to each channel layer ion injection location. FIG. 4 is a schematic diagram showing the bonding when F and B ions are implanted in an IGZO channel layer according to one embodiment. FIG. 5 is a flowchart of a method for manufacturing an oxide semiconductor transistor according to one embodiment. Figure 6 is a dynamic SIMS analysis graph according to BF2 ion implantation energy according to one embodiment. Figure 7 is an XPS depth analysis graph according to BF2 ion implantation energy according to one embodiment. Specific details for implementing the invention

[0029] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0030] The terms used in this specification will be briefly explained, and the invention will be described in detail.

[0031] The terms used in this invention have been selected based on currently widely used general terms, taking into account their functions within the invention; however, these terms may vary depending on the intent of those skilled in the art, case law, the emergence of new technologies, etc. Additionally, in specific cases, terms have been arbitrarily selected by the applicant, and in such cases, their meanings will be described in detail in the relevant description of the invention. Therefore, the terms used in this invention should be defined not merely by their names, but based on their meanings and the overall content of the invention.

[0032] When a part of a specification is described as "including" a certain component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components.

[0033] Below, embodiments of the present invention are described in detail with reference to the attached drawings so that those skilled in the art can easily implement the invention. Additionally, parts of the drawings that are irrelevant to the description are omitted to clearly explain the invention.

[0034] Terms including ordinal numbers, such as "first," "second," etc., may be used to describe various components, but the components are not limited by the terms. The terms are used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be named the second component, and similarly, the second component may be named the first component. The term "and / or" includes a combination of multiple related items or any one of the multiple related items.

[0036] Hereinafter, the oxide semiconductor transistor (1) of the present invention will be described.

[0037] The present invention relates to an oxide semiconductor transistor (1), and is a technology capable of improving the electrical characteristics and device stability of the oxide semiconductor transistor (1) through ion implantation-based doping.

[0038] Oxide semiconductors are metal oxide-based semiconductor materials in which metal oxides can be used in single or composite forms. These oxide semiconductors possess a relatively wide bandgap and are attracting attention as suitable materials for next-generation electronic devices and display devices due to their advantages, such as high transparency, excellent electron mobility, and the ability to perform low-temperature deposition. In particular, multi-element oxide semiconductors such as IGZO (In-Ga-Zn-O) are known to achieve a balance between electrical and process characteristics by combining the advantages of each metal oxide.

[0039] Oxide semiconductors generally operate as n-type semiconductors, and current flows due to free electrons located near the conduction band. These free electrons can be generated by inherent oxygen vacancies within the metal oxide, and as a result, they often naturally possess conductive properties without the need for separate impurity doping. Furthermore, oxide semiconductors can be deposited on various substrates, such as glass and plastic substrates, using low-temperature processes, making them advantageous for applications such as flexible electronic devices and transparent electronic devices.

[0040] Structurally, oxide semiconductor transistors are composed of a gate electrode, a gate insulating layer, an oxide semiconductor channel layer, and source and drain electrodes, similar to general thin-film transistors (TFTs). They operate by controlling the current flow between the source and drain by adjusting the electron density within the oxide semiconductor channel according to the voltage applied to the gate.

[0041] The oxide semiconductor transistor (1) of the present invention can improve the electrical characteristics and stability of the conventional oxide semiconductor transistor by injecting BF2 (difluoroborane) into it. The oxide semiconductor transistor (1) of the present invention is designed to simultaneously improve electrical characteristics and device stability by injecting BF2 into the channel layer (50) while maintaining the basic structure of the conventional oxide semiconductor transistor. Specifically, by utilizing the physical properties of BF2 to selectively dope a specific region within the channel layer (50), it is possible to control current characteristics and regulate the spatial distribution of oxygen defects. Through this, performance elements such as the on / off characteristics of the transistor, leakage current suppression, and long-term reliability can be improved, and process flexibility and operational stability in various application environments can also be secured.

[0042] FIG. 1 is a cross-sectional view of an oxide semiconductor transistor (1) of the present invention according to one embodiment.

[0043] Referring to FIG. 1, the oxide semiconductor transistor (1) of the present invention may include a substrate (10), a gate (20), an insulating layer (30), a source (41), a drain (42), a channel layer (50), and a screen oxide film (60).

[0044] The substrate (10) serves to support the overall structure of the oxide semiconductor transistor (1) of the present invention, and generally, a polymer film such as glass, silicon, or polyimide, which can be used as a flexible substrate (10), may be mainly used. Each of these substrates (10) may be selected according to characteristics such as thermal stability, transparency, and flexibility, and an appropriate material may be adopted depending on process conditions or purpose. The substrate (10) that can be utilized in the oxide semiconductor of the present invention is not limited to the examples described above, and any material that has electrical insulation and provides structural stability capable of forming the oxide semiconductor transistor (1) may be used without limitation.

[0045] In the oxide semiconductor transistor (1) of the present invention, the gate (20) may be located on the substrate (10). The gate (20) is an electrode for controlling the conduction state of the transistor channel layer (50), and generally, metals such as molybdenum (Mo), aluminum (Al), chromium (Cr), and tungsten (W) may be mainly used. The gate (20) of the present invention is also not limited to the examples described above, and any material can be used without limitation as long as it is a conductive material that can stably control the operation of the transistor while satisfying certain electrical characteristics.

[0046] In the oxide semiconductor transistor (1) of the present invention, an insulating layer (30) may be located on the gate (20). The insulating layer (30) may be interposed between the gate (20) electrode and the channel layer (50) to prevent quantum tunneling or leakage current and to allow the gate (20) voltage to be effectively transmitted to the channel layer (50). In the oxide semiconductor transistor (1), the insulating layer (30) is generally a silicon oxide film (SiO2) or a silicon nitride film (SiN x It can be formed from dielectric materials such as aluminum oxide (Al2O3), hafnium oxide (HfO2), etc. The insulating layer (30) of the present invention is also not limited to the specific materials mentioned above, and any dielectric material capable of stably securing electrical insulation between the channel layer (50) and the gate (20) can be used without limitation.

[0047] In the oxide semiconductor transistor (1) of the present invention, the source (41) and drain (42) may be located on an insulating layer (30). The source (41) and drain (42) electrodes may be formed at both ends of the channel layer (50), respectively, to provide a path through which current can flow. In the oxide semiconductor transistor (1), the source (41) and drain (42) electrodes may generally be formed from a conductive metal or alloy such as tungsten (W), molybdenum (Mo), aluminum (Al), or silver (Ag).

[0048] In the present invention, the source (41) and drain (42) electrodes are located on the insulating layer (30) and the channel layer (50) and are formed spaced apart from each other, so that the flow of current in the channel region between them is controlled according to the gate (20) voltage. In addition, the material or formation method of the source (41) and drain (42) electrodes is not particularly limited, and any conductive material capable of forming stable ohmic contact with the channel layer (50) can be applied.

[0049] In the oxide semiconductor transistor (1) of the present invention, the channel layer (50) is located on the insulating layer (30) and may be located between the source (41) and the drain (42). The channel layer (50) is located between the source (41) and the drain (42) electrodes and can form a path in which the flow of current is controlled according to the gate (20) voltage as an active layer. In the oxide semiconductor transistor (1), a multi-element oxide semiconductor such as IGZO (In-Ga-Zn-O), IGO (In-Ga-O), or IZO (In-Zn-O) can generally be used as the channel layer (50), and these materials may have characteristics such as excellent electron mobility, low leakage current, and high transparency. The channel layer (50) is generally formed on the insulating layer (30), and the source (41) and drain (42) electrodes are respectively in contact with the upper surface to form a current path. The material and structure of the channel layer (50) can be changed according to process conditions or required device characteristics and are not limited to the aforementioned materials.

[0050] In the oxide semiconductor transistor (1) of the present invention, a screen oxide film (60) may be located on the source (41), drain (42), and channel layer (50). The screen oxide film (60) is formed on the upper part of the channel layer (50) and can play a role in controlling the implantation depth and distribution of ions in a subsequent ion implantation process. The screen oxide film (60) in the present invention can control the implantation of different ions into the front channel region and the back channel region by inducing BF2 to be selectively doped at specific locations within the channel layer (50). The screen oxide film (60) can generally be formed from an aluminum oxide film (Al₂O₃) or other insulating oxides and can be deposited through an ALD (atomic layer deposition) or sputtering process. The material and thickness of the screen oxide film (60) can be designed according to the ion implantation energy and doping profile, thereby playing an important role in controlling the spatial distribution of oxygen defects within the channel and improving the electrical characteristics and stability of the transistor.

[0051] The oxide semiconductor transistor (1) of the present invention may be characterized by the injection of BF2 into the channel layer (50). By injecting BF2 (Boron Difluoride) into the channel layer (50) of the oxide semiconductor transistor (1) of the present invention, selective doping can be achieved in a specific region within the channel. When injected, BF2 decomposes according to energy and separates into B (Boron) ions and F (Fluorine) ions, which are distributed at different depths within the channel layer (50), thereby allowing control of the electrical characteristics and defect distribution of the channel layer (50). This doping can control the concentration and location of oxygen defects within the channel layer (50) and affect current transfer characteristics and device stability.

[0052] FIG. 2 is a schematic diagram showing regions in which BF2 can be injected into a channel layer (50) according to one embodiment, and FIG. 3 is a graph analyzing electrical characteristics according to the ion injection location of each channel layer (50).

[0053] FIGS. 2 and 3 show a structural schematic diagram representing three regions within the channel layer (50) where BF2 can be injected according to each embodiment, and a graph comparing changes in electrical characteristics according to each location. In the cross-sectional view of FIG. 2, the ion implantation regions within the channel layer (50) located below the screen oxide film (60) are set at different depths and locations, which are classified as the front channel, middle channel, and back channel, respectively. Here, when Boron ions are injected into the front channel region, a high IDS current flows when VGS is applied, as shown in the graph of FIG. 3, which can be understood as being related to the improvement of conductivity in the front portion of the channel. On the other hand, when Fluorine ions are injected into the back channel region, a relatively low IDS value is observed, which can contribute to suppressing leakage current in the off state. It can be confirmed that injection into the middle channel region exhibits electrical characteristics that are intermediate between these. Through these, it can be confirmed that the electrical characteristics of the transistor vary depending on the ion implantation location overall, and the oxide semiconductor transistor (1) of the present invention demonstrates that the operating characteristics of the device can be precisely controlled at the design level by controlling the implantation location within the channel layer (50).

[0054] In the oxide semiconductor transistor of the present invention, the channel layer (50) can be divided into a lower region adjacent to the insulating layer (30) and an upper region adjacent to the screen oxide film (60), and B ions can be implanted in the lower region and F ions can be implanted in the upper region according to BF2 ion implantation. When BF2 ions are implanted into the channel layer (50), the decomposed B ions and F ions are distributed at different depths within the channel layer (50) according to the control of the implantation energy and the screen oxide film (60). Generally, since B ions penetrate to a relatively deep region, they can be implanted in the lower region close to the insulating layer (30), while F ions remain in a shallow region and can be doped into the upper region of the channel layer (50). Ion implantation according to this depth distribution enables vertical control of electrical characteristics within the channel layer (50) and can contribute to improving the conduction characteristics and stability of the device.

[0055] In this process, B ions may form bonds with oxygen in the lower region of the channel layer (50), and F ions may form bonds with metal in the upper region of the channel layer (50). FIG. 4 is a schematic diagram showing the bonding when F and B ions are implanted in an IGZO channel layer (50) according to one embodiment. Referring to FIG. 4, during the ion implantation process, B ions that reach the lower region of the channel layer (50) form bonds with oxygen atoms to form a BO bond structure, which can contribute to increasing the concentration of oxygen vacancies (V0) in the oxide semiconductor and improving charge density. On the other hand, F ions remaining in the upper region of the channel layer (50) form MF bonds by bonding with metal atoms (M), which can have the effect of passivating defects on the channel surface and improving stability.

[0056] Additionally, the channel layer (50) may have an increased concentration of oxygen vacancies from the upper region to the lower region due to the bonding described above. The bonding structure formed within the channel layer (50) may affect the concentration distribution of oxygen vacancies along the depth direction. In the upper region, F ions bond with the metal to form MF bonds, which can suppress the generation of oxygen vacancies (V0). On the other hand, in the lower region, B ions bond with oxygen to form BO bonds, increasing interaction with surrounding oxygen, and consequently, some oxygen atoms may be substituted or the density may decrease.

[0057] According to these different coupling mechanisms, the channel layer (50) may exhibit a distribution in which the concentration of oxygen vacancies increases relatively from the top to the bottom, which may result from differences in coupling characteristics due to doping depth and ion type. Consequently, the depth-direction ion distribution and coupling structure of the present invention have a positive effect on the electrical characteristics and device reliability of the channel layer (50) and can contribute to improving transistor performance.

[0059] Hereinafter, a method for manufacturing an oxide semiconductor transistor (1) of the present invention will be described.

[0060] FIG. 5 is a flowchart of a method for manufacturing an oxide semiconductor transistor (1) according to one embodiment.

[0061] Referring to FIG. 5, the method for manufacturing an oxide semiconductor transistor (1) of the present invention may include the steps of: providing a substrate (10) (S110); forming a gate (20) on the substrate (10) (S120); forming an insulating layer (30) on the gate (20) (S130); forming a source (41) and a drain (42) spaced apart from each other on the insulating layer (30) (S140); forming a channel layer (50) located on the insulating layer (30) and located between the source (41) and the drain (42) (S150); forming a screen oxide film (60) on the source (41), the drain (42), and the channel layer (50) (S160); and injecting BF2 into the channel layer (50) (S170).

[0062] Atomic Layer Deposition (ALD) or RF Sputtering can be utilized in the step of forming each layer.

[0063] The method for manufacturing an oxide semiconductor transistor (1) of the present invention can control the region where BF2 is injected as described above. The present invention can realize a multilayer and spatially controlled channel doping structure by utilizing the following physical process control elements.

[0064] In the method for manufacturing an oxide semiconductor transistor (1) of the present invention, the thickness of the screen oxide film (60) can be adjusted to precisely control the injection location of BF2 within the channel layer (50). Since the screen oxide film (60) is formed on the upper part of the channel layer (50) and serves to dissipate energy as ions pass through it, the depth to which the injected ions reach varies depending on its thickness. For example, if the thickness of the oxide film is increased, the transmission energy of the ions is reduced, so doping is concentrated on the upper part of the channel layer (50) which is relatively shallow, and conversely, if the oxide film is formed thinly, ions can reach a deeper region. Through this, it is possible to control which region, the upper or lower region of the channel layer (50), the doping takes place in the process design stage. Accordingly, the method for manufacturing an oxide semiconductor transistor (1) of the present invention can form a screen oxide film (60) with a thickness corresponding to a preset depth so that BF2 is injected into the preset depth of the channel layer (50).

[0065] In addition, the injection depth and concentration of BF2 can be precisely controlled by adjusting the energy and injection amount during ion implantation. The higher the injection energy, the deeper the ions penetrate into the channel layer (50), and the ion concentration within a specific region can be controlled by adjusting the injection amount. By controlling these process variables, B ions and F ions can be induced to be distributed at appropriate depths within the channel layer (50), thereby enabling the implementation of a doping profile necessary for electrical characteristics and device reliability. Accordingly, the method for manufacturing an oxide semiconductor transistor (1) of the present invention can dope BF2 according to the ion implantation energy and ion implantation amount corresponding to the preset depth so that BF2 is injected into the preset depth of the channel layer (50).

[0066] According to one embodiment, the BF2 ion implantation energy can be set in the range of 40 keV to 80 keV. This is a range for controlling B ions and F ions to reach a desired depth within the channel layer (50). If the implantation energy is excessively low, the ions remain on the surface of the channel layer (50), making it difficult to obtain a sufficient doping effect, and instead, they may be absorbed by the screen oxide film (60) or the upper thin film. Conversely, if the implantation energy is excessively high, the ions may pass through the channel layer (50) and penetrate to the layer below it (e.g., the insulating layer (30)), which may lead to undesirable effects such as increased leakage current of the device or device damage. Therefore, the ion implantation energy can be set in the range of 40 keV to 80 keV so that B ions and F ions are stably implanted into the lower and upper regions of the channel layer (50), respectively, thereby ensuring a difference in the depth of ion distribution without damaging the structural and electrical characteristics of the device.

[0067] Figure 6 is a dynamic SIMS analysis graph according to BF2 ion implantation energy according to one embodiment.

[0068] Referring to Figure 6, it can be seen that B ions were mainly implanted into the lower region of the IGZO channel when the ion implantation energy was 60 keV and 80 keV. Accordingly, the oxygen vacancy and charge carrier concentrations in the lower region increased, which can improve electrical properties.

[0069] Furthermore, it can be observed that as the ion implantation energy increases, the amount of F ions implanted in the upper region increases, while the amount of B ions decreases. Accordingly, as the ion implantation energy increases, damage and defects within the upper region are reduced, thereby improving reliability.

[0070] Figure 7 is an XPS depth analysis graph according to BF2 ion implantation energy according to one embodiment.

[0071] Referring to Figure 7, the lower region, where B ions are mainly implanted, has a high proportion of oxygen vacancies due to increased BO bonding. This may be because the proportion of oxygen vacancies increases as the amount of B ions implanted in the lower region increases as the ion implantation energy increases.

[0072] Furthermore, the upper region, where F ions are primarily implanted, is characterized by a low ratio of oxygen vacancies due to the oxygen vacancy passivation of F ions. This may be because the ratio of oxygen vacancies decreases as the amount of F ions implanted in the upper region increases with increasing ion implantation energy.

[0074] Those skilled in the art related to the embodiments of the present invention will understand that they may be implemented in modified forms without departing from the essential nature of the description. Therefore, the disclosed methods should be considered in an illustrative rather than a restrictive sense. The scope of the present invention is defined by the claims, not by the detailed description of the invention, and all variations within the scope of the claims should be interpreted as being included within the scope of the present invention. Explanation of the symbols

[0075] 1: Oxide semiconductor transistor 10: Substrate 20: Gate 30: Insulating layer 41: Source 42: Drain 50: Channel layer 60: Screen oxide

Claims

Claim 1 delete Claim 2 delete Claim 3 delete Claim 4 delete Claim 5 delete Claim 6 delete Claim 7 delete Claim 8 delete Claim 9 delete Claim 10 delete Claim 11 A method for manufacturing an oxide semiconductor transistor comprising: a step of providing a substrate; a step of forming a gate on the substrate; a step of forming an insulating layer on the gate; a step of forming a source and a drain spaced apart from each other on the insulating layer; a step of forming a channel layer located on the insulating layer and located between the source and the drain; a step of forming a screen oxide film on the source, drain and channel layer; and a step of injecting BF2 into the channel layer. Claim 12 A method for manufacturing an oxide semiconductor transistor according to claim 11, wherein the channel layer is divided into a lower region adjacent to the insulating layer and an upper region adjacent to the screen oxide film, wherein B ions are implanted in the lower region and F ions are implanted in the upper region. Claim 13 A method for manufacturing an oxide semiconductor transistor according to claim 12, wherein the channel layer comprises one or more materials selected from IGZO, IGO, and IZO. Claim 14 A method for manufacturing an oxide semiconductor transistor according to claim 13, characterized in that in the lower region, B ions form a bond with oxygen, and in the upper region, F ions form a bond with metal. Claim 15 A method for manufacturing an oxide semiconductor transistor according to claim 14, wherein the channel layer is characterized in that the concentration of oxygen vacancies increases from the upper region to the lower region. Claim 16 delete Claim 17 delete Claim 18 A method for manufacturing an oxide semiconductor transistor according to claim 11, wherein the step of injecting BF2 is characterized by injecting with an energy of 40 keV or more and 80 keV or less. Claim 19 A method for manufacturing an oxide semiconductor transistor according to claim 11, wherein the step of forming the screen oxide film is formed through an ALD or RF sputtering process. Claim 20 A method for manufacturing an oxide semiconductor transistor according to claim 11, wherein the source and drain are formed by including one or more materials selected from tungsten (W), molybdenum (Mo), aluminum (Al), and silver (Ag).

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