Methods and systems for forming a layer comprising aluminum, titanium, and carbon

Abstract

A method and system for depositing a layer comprising titanium, aluminum, and carbon are disclosed. The layer is formed on the surface of a substrate. The deposition process includes a periodic deposition process. Exemplary structures in which the layer may be included include field-effect transistors, VNAND cells, metal-insulator-metal (MIM) structures, and DRAM capacitors.

Description

Technology Field

[0001] The present disclosure generally relates to the field of semiconductor processing methods and systems and the field of integrated circuit manufacturing. In particular, a method and system for forming a layer including aluminum, titanium, and carbon are disclosed. Background Technology

[0002] For example, the scaling of semiconductor devices, such as complementary metal-oxide-semiconductor (CMOS) devices, has led to significant improvements in the speed and density of integrated circuits. However, conventional device scaling technologies face major challenges at the future technological crossroads.

[0003] For example, one challenge was finding a conductive material suitable for use as a gate electrode in aggressively scaled CMOS devices. Various gate materials, such as metals like titanium nitride layers, can be used. However, in some cases where a higher work function value is required than that obtained with a titanium nitride layer, for example in the PMOS region of a CMOS device, an improved material for the gate electrode is required. In particular, such a material may include a p-dipole shifting layer and can be used, for example, for threshold voltage tuning.

[0004] In addition, new materials are still needed for other semiconductor devices such as MIM (metal-insulator-metal) structures, DRAM capacitors, and VNAND cells.

[0005] Any discussion, including problems and solutions stated in this section, is incorporated into this disclosure solely for the purpose of providing context for the present disclosure. Any or all information in such discussion should not be construed as having been known at the time the present invention was made or otherwise constitutes the prior art.

[0006] The content of the present invention may introduce a selection of concepts in a simplified form, which may be explained in more detail below. The content of the present invention is not intended to necessarily distinguish the main or essential features of the claimed essence, nor is it intended to be used to limit the scope of the claimed essence.

[0007] Various embodiments of the present disclosure relate to a method for depositing materials including titanium, aluminum, and carbon, structures and devices formed using said method, and an apparatus for performing said method and / or forming said structures and / or devices. The layers may be used in various applications, including work function control layers and threshold voltage control layers. For example, they may be used as gate electrodes in n- or p-channel metal oxide semiconductor field-effect transistors (MOSFETS).

[0008] A method for forming a layer on a substrate is described herein. The method comprises the step of providing the substrate to a reaction chamber. The method further comprises the step of performing a plurality of deposition cycles. The deposition cycles include an aluminum precursor pulse and a transition metal precursor pulse. The aluminum precursor pulse comprises the step of exposing the substrate to the aluminum precursor. The aluminum precursor comprises aluminum, a first alkyl ligand, and a second alkyl ligand. The first alkyl ligand and the second alkyl ligand are different. The transition metal precursor pulse comprises the step of exposing the substrate to the transition metal precursor. The transition metal precursor comprises a transition metal. Thus, a layer is formed on the substrate. The layer comprises a transition metal, aluminum, and carbon.

[0009] In some embodiments, the step of performing a plurality of deposition cycles precedes one or more priming steps. The priming step includes the step of exposing a substrate to a transition metal precursor.

[0010] In some embodiments, the aluminum precursor is of the formula (L 1 ) n (L 2 ) n-1 It includes chemical compounds that can be represented as Al, where L 1 is a primary alkyl ligand, and L 2 is a second alkyl ligand, and n is an integer of 1 or 2.

[0011] In some embodiments, the first alkyl ligand type is a C1 to C5 alkyl.

[0012] In some embodiments, the second alkyl ligand type is a C1 to C5 alkyl.

[0013] In some embodiments, L 1 It is 1,1-dimethyl ethyl.

[0014] In some embodiments, L 2 is methyl.

[0015] In some embodiments, the aluminum precursor includes bis(1,1-dimethylethyl)methylaluminum.

[0016] In some embodiments, the transition metal precursor includes a halogen.

[0017] In some embodiments, the halogen contains chlorine.

[0018] In some embodiments, the transition metal is selected from the group consisting of tantalum, hafnium, vanadium, zirconium, niobium, molybdenum, tungsten, and titanium.

[0019] In some embodiments, subsequent cycles are separated by purging between deposition cycles.

[0020] In some embodiments, the aluminum precursor pulse and the transition metal pulse are separated by purging within the deposition cycle.

[0021] In some embodiments, the deposition cycle is performed in the absence of plasma.

[0022] In some embodiments, the method is performed until a layer having a thickness of at least 0.2 nm to a maximum of 5 nm is formed on a substrate.

[0023] In some embodiments, the substrate includes a single-crystal silicon wafer.

[0024] In some embodiments, the method further includes the step of exposing a substrate to an oxygen-containing gas to at least partially oxidize a layer containing a transition metal, aluminum, and carbon.

[0025] A semiconductor device including a layer formed according to the method described herein is further provided.

[0026] A VNAND contact including a layer deposited by a method as described herein is further provided.

[0027] A system comprising the following is further provided, wherein the system comprises: a reaction chamber; an aluminum precursor gas source comprising an aluminum precursor, wherein the aluminum precursor comprises aluminum, a first alkyl ligand, and a second alkyl ligand, wherein the first alkyl ligand and the second alkyl ligand are different; a transition metal precursor gas source comprising a transition metal precursor; and a control unit, wherein the control unit is configured to control the gas flow into the reaction chamber to form a layer on a substrate included in the reaction chamber by the method described herein.

[0028] These and other embodiments will be readily apparent to those skilled in the art from the following detailed description of specific embodiments with reference to the accompanying drawings. The present invention is not limited to any specific embodiments disclosed. Brief explanation of the drawing

[0029] A more complete understanding of the embodiments of the present disclosure can be obtained by referring to the detailed description of the invention and the claims in conjunction with the following exemplary drawings. FIG. 1 shows one embodiment of the method described herein. FIG. 2 shows an example of a structure (200) according to an example of the present disclosure. FIG. 3 shows a structure / part of an element (300) according to an additional example of the present disclosure. FIG. 4 shows another structure (400) according to an example of the present disclosure. FIG. 5 shows a system (500) according to an exemplary additional embodiment of the present disclosure. FIG. 6 shows an exemplary DRAM capacitor (600). Figure 7 shows a part of a VNAND cell, namely a contact and charge trap assembly (700). FIG. 8 shows the experimental characteristics of an exemplary layer deposited according to one embodiment of the method described herein. FIG. 9 shows an example of a flowchart of one embodiment of a precursor pulse as described herein. Figure 10 shows scanning electron microscope images and energy dispersive X-ray spectroscopy maps. It will be understood that the components of the drawings are illustrated briefly and clearly, and are not necessarily drawn to scale to aid in understanding the illustrated embodiments of the disclosure. For example, to aid in understanding the embodiments illustrated in the disclosure, the dimensions of some components in the drawings may be exaggerated compared to other components. Specific details for implementing the invention

[0030] The description of exemplary embodiments of methods, structures, elements, and systems provided below is merely illustrative and intended only for illustrative purposes, and is not intended to limit the scope or claims of this disclosure. Furthermore, citing multiple embodiments describing features is not intended to exclude other embodiments having additional features or other embodiments including other combinations of specified features. For example, various embodiments are presented as exemplary embodiments and may be referenced in the dependent claims. Unless otherwise noted, exemplary embodiments or their components may be combined or applied separately.

[0031] As described in more detail below, various embodiments of the present disclosure provide a method for forming a structure such as a gate electrode structure. An exemplary method may be used, for example, to form a CMOS device or a part thereof. Notwithstanding this, unless otherwise stated, the present invention is not necessarily limited to these examples.

[0032] In the present disclosure, “gas” may include materials that are gases, vaporized solids, and / or vaporized liquids at normal temperature and pressure (NTP), and may consist of a single gas or a mixture of gases depending on the context. Gases other than process gases, i.e., gases introduced without passing through a gas distribution assembly, other gas distribution device, etc., may be used, for example, to seal the reaction space and may include sealing gases such as rare gases. In some cases, the term “precursor” may refer to a compound that participates in a chemical reaction to produce another compound, and in particular, a compound that constitutes the membrane matrix or the main framework of the membrane; the term “reactant” may be used interchangeably with the term precursor.

[0033] As used herein, the term “substrate” may refer to any underlying material or materials that may be used to form, or upon which an element, circuit, or film may be formed. The substrate may comprise a bulk material such as silicon (e.g., single-crystal silicon), other Group IV materials such as germanium, or other semiconductor materials such as Group II-VI or Group III-V semiconductor materials, and may comprise one or more layers placed on or beneath the bulk material. Additionally, the substrate may comprise various features formed within or on at least a portion of the layers of the substrate, such as indentations, protrusions, etc. As an example, the substrate may comprise a bulk semiconductor material and an insulating or dielectric material layer placed on at least a portion of said bulk semiconductor material. Additionally or alternatively, an exemplary substrate may comprise a bulk semiconductor material and a conductive layer placed on at least a portion of the bulk semiconductor material.

[0034] As used herein, the terms “film” and / or “layer” may refer to any continuous or discontinuous structure and material, such as a material deposited by the method disclosed herein. For example, the film and / or layer may comprise two-dimensional materials, three-dimensional materials, nanoparticles, partial or whole molecular layers or partial or whole atomic layers or atomic and / or molecular clusters. The film or layer may be partially or wholly composed of a plurality of dispersed atoms embedded on the surface of a substrate and / or within the substrate, or embedded in a device fabricated on the substrate. The film or layer may comprise a material or layer having pinholes and / or isolated islands. The film or layer may be at least partially continuous. The film or layer may be patterned, for example, subdivided, and included in a plurality of semiconductor devices.

[0035] As used herein, the “structure” may be a substrate as described herein or may include such a substrate. The structure may include one or more layers placed on the substrate, such as one or more layers formed according to the method described herein. The device portion may be a structure or may include a structure.

[0036] As used herein, the term “deposition process” may refer to introducing a precursor (and / or reactant) into a reaction chamber to deposit a layer on a substrate. “Periodic deposition process” is an example of “deposition process”.

[0037] The term “periodic deposition process” or “cyclic deposition process” may refer to the deposition of layers on a substrate by sequentially introducing precursors (and / or reactants) into a reaction chamber and includes processing techniques such as atomic layer deposition (ALD) and cyclic chemical vapor deposition (cyclic CVD), and hybrid cyclic deposition processes including ALD components and cyclic CVD components.

[0038] The term “atomic layer deposition” may refer to a vapor deposition process, wherein deposition cycles, typically multiple consecutive deposition cycles, are performed in a process chamber. As used herein, the term atomic layer deposition also includes processes designated by related terms such as chemical vapor atomic layer deposition, atomic layer epitaxy (ALE), molecular beam epitaxy (MBE), gas source MBE, or organometallic MBE, and chemical beam epitaxy, when performed with alternating pulses of precursor(s) / reaction gas(s) and purge (e.g., inert carrier) gas(s).

[0039] Generally, in the case of an ALD process, during each cycle, a precursor is introduced into a reaction chamber and chemisorbed onto a deposition surface (e.g., a substrate surface that may contain a material previously deposited from a previous ALD cycle or other materials), forming a monolayer or sub-monolayer that does not readily react with additional precursors (i.e., a self-limiting reaction). Subsequently, a reactant (e.g., another precursor or reaction gas) may be subsequently introduced into a process chamber to convert the chemisorbed precursor on the deposition surface into a desired material. The reactant may further react with the precursor. During one or more cycles, for example, by using a purge step during each step of each cycle, excess precursor may be removed from the process chamber, and / or excess reactant and / or reaction byproducts may be removed from the process chamber.

[0040] As used herein, the term "purge" may refer to a procedure in which an inert or substantially inert gas is supplied to a reaction chamber between two pulses of gases that react with each other. For example, a purge, or a purge using an inert gas such as a return gas, may be supplied between a precursor pulse and a reactant pulse so as to avoid or at least minimize gas-phase interactions between the precursor and the reactant. It should be understood that the purge may affect time or space, or both. For example, in the case of a temporal purge, the purge step may be used in the temporal sequence of, for example, a step of supplying a first precursor to the reaction chamber, a step of supplying a purge gas to the reaction chamber, and a step of supplying a second precursor to the reaction chamber, wherein the substrate on which the layer is deposited does not move. For example, in the case of a spatial purge, the purge step may take the following form: a step of moving the substrate from a first position where the first precursor is continuously supplied to a second position where the second precursor is continuously supplied through a purge gas curtain.

[0041] As used herein, "precursor" includes a gas or material that can be represented by a chemical formula containing an element that can be incorporated into the deposition process described herein, which may be a gas.

[0042] The term "nitrogen reactant" may refer to a gas or material that can be a gas and can be represented by a chemical formula containing nitrogen. In some cases, the chemical formula contains nitrogen and hydrogen. In some cases, the nitrogen reactant does not contain diatomic nitrogen.

[0043] Additionally, in the present disclosure, any two values ​​of a variable may constitute an executable range of said variable, and any indicated range may include or exclude endpoints. Additionally, any value of the indicated variable may refer to an exact value or an approximate value (whether indicated as "approximately"), may include an equivalent, and may refer to an average, median, representative, majority, etc. Also, in the present disclosure, the terms "comprising," "consisting of," and "having" independently refer to "ordinarily or approximately comprising," "comprising," "essentially made of," or "made of" in some embodiments.

[0044] In the present disclosure, any arbitrarily defined meaning does not necessarily exclude the ordinary and conventional meaning in some embodiments.

[0045] A method for forming a layer on a substrate is described herein. The method comprises the steps of providing the substrate to a reaction chamber and performing a plurality of deposition cycles. The deposition cycles include an aluminum precursor pulse and a transition metal precursor pulse. The aluminum precursor pulse includes the step of exposing the substrate to the aluminum precursor. The aluminum precursor comprises aluminum, a first alkyl ligand, and a second alkyl ligand. It should be understood that the first alkyl ligand and the second alkyl ligand are different. The transition metal precursor pulse includes the step of exposing the substrate to the transition metal precursor. The transition metal precursor comprises a transition metal. Thus, a layer is formed on the substrate. The layer thus formed comprises a transition metal, aluminum, and carbon.

[0046] Unless the present invention is limited by any particular theory or mode of operation, the carbon contained in the layer is believed to originate from the alkyl ligand contained in the aluminum precursor.

[0047] Layers formed using the method described above can be useful as gate stack work function adjusting metals, for example, in P- or N-MOSFETS. Additionally or alternatively, they can be used in MIM (metal-insulator-metal) metal electrodes and / or VNAND contacts. They can provide low resistivity, for example, low resistivity, compared to titanium nitride layers even at very low thicknesses, for example, less than 4 nm. Advantageously, such low resistivity can be obtained over a wide range of deposition temperatures and has been found to remain stable over surprisingly extended periods, for example, over 3 days.

[0048] It will be understood that depositing a layer as described herein involves a periodic deposition process. A periodic deposition process may include a periodic CVD, ALD, or hybrid periodic CVD / ALD process. For example, in some embodiments, the growth rate of a specific ALD process may be lower than that of a CVD process. One approach to increasing the growth rate is to operate at a higher deposition temperature than is typically used in an ALD process, which may induce a chemical vapor deposition process in some parts, i.e., a non-self-limiting vapor reaction process, while still retaining the advantages of sequential introduction of reactants. This process may be referred to as periodic CVD. In some embodiments, a periodic CVD process may include the step of introducing two or more precursors or reactants into a reaction chamber, and the overlap time between two or more reactants within the reaction chamber may result in both an ALD component and a CVD component of the deposition. This is referred to as a hybrid process. According to additional examples, the periodic deposition process may include a continuous flow of one reactant or precursor and periodic pulses of a second reactant or precursor into a reaction chamber.

[0049] In some embodiments, a layer formed according to one embodiment of the present disclosure has a step coverage of at least about 50%, or at least about 80%, or at least about 90%, or at least about 95%, or at least about 98%, or at least about 99%, in / on a structure having an aspect ratio (height / width) of greater than about 2, greater than about 5, greater than about 10, greater than about 25, greater than about 50, greater than about 10, greater than about 25, or at least about 10 to 100, or at least about 50 to 25. The term “step coverage” means the growth rate of a layer on the distal surface of a recess divided by the growth rate of the corresponding layer on the proximal surface of the recess, expressed as a percentage. The distal part of the gap feature refers to the portion of the gap feature that is removed relatively far from the surface of the substrate, and the proximal part of the gap feature is understood to refer to the portion of the gap feature that is closer to the surface of the substrate compared to the distal / lower / deeper part of the gap feature.

[0050] In some embodiments, the layer deposited by the method described herein comprises metallic aluminum. In some embodiments, the layer comprises at least 0.01 atomic% to a maximum of 20.0 atomic% metallic aluminum, e.g., at least 0.01 atomic% to a maximum of 0.02 atomic% metallic aluminum, or at least 0.02 atomic% to a maximum of 0.05 atomic% metallic aluminum, or at least 0.05 atomic% to a maximum of 0.1 atomic% metallic aluminum, or at least 0.1 atomic% to a maximum of 0.2 atomic% metallic aluminum, or at least 0.2 atomic% to a maximum of 0.5 atomic% metallic aluminum, or at least 0.5 atomic% to a maximum of 1.0 atomic% metallic aluminum, or at least 1.0 atomic% to a maximum of 2.0 atomic% metallic aluminum, or at least 2.0 atomic% to a maximum of 5.0 atomic% metallic aluminum, or at least 5.0 atomic% to a maximum of 10.0 atomic% metallic aluminum, or at least 10.0 atomic% to a maximum of 20.0 atomic% metallic aluminum.

[0051] In some embodiments, the step of performing a plurality of deposition cycles precedes one or more priming steps. It will be understood that the priming step includes the step of exposing a substrate to a precursor. In some embodiments, the priming step includes the step of exposing a substrate to an aluminum precursor. In some embodiments, the priming step includes the step of exposing a substrate to a transition metal precursor.

[0052] Appropriately, and in some embodiments, the aluminum precursor is of the formula (L 1 ) n (L 2 ) n-1 It includes chemical compounds represented by Al. L 1 is a primary alkyl ligand, and L 2 is a second alkyl ligand, and n will be understood to be an integer equal to 1 or 2. L 1 and L 2 must be understood as different. That is, L 1 and L 2 Both are alkyl, but they are different alkyls. That is, L 1 and L 2 It should be understood that the first alkyl ligand is bonded to the aluminum contained in the aluminum precursor. It should also be understood that the second alkyl ligand is also bonded to the aluminum contained in the aluminum precursor. Such precursors, and a method for synthesizing such precursors, are disclosed in U.S. Provisional Patent Application No. 63 / 064,275.

[0053] It will be understood that these precursors do not necessarily exist in monomeric form or exist alone. Therefore, these precursors can form dimers partially or completely. For example, the chemical formula (L 1 ) n (L 2 ) n-1 The precursor denoted by Al is a dimer, specifically (L 1 )2Al(L 2 )2Al(L1 It can exist in the form of )2, where L 1 is a terminal t-butyl group, and L 2 is a methyl group that cross-links between two aluminum atoms. It will be understood that the precursor may exist as a specific, e.g., dimer, as a solid, and as a gaseous phase, e.g., in the form of a monomer. The precursor may exist as a mixture of monomers and dimers in at least one of the solid, liquid, and gaseous phases. Additionally or alternatively, the precursor may exist alone as a monomer or dimer in at least one of the solid, liquid, and gaseous phases.

[0054] In some embodiments, the first alkyl ligand, i.e., L 1 is a C1 to C5 alkyl. In some embodiments, the first alkyl ligand is composed of or essentially consists of a C1 to C5 alkyl.

[0055] Additionally or alternatively, in some embodiments, the first alkyl ligand, i.e., L 2 is a C1 to C5 alkyl. In some embodiments, the second alkyl ligand is composed of or essentially consists of a C1 to C5 alkyl.

[0056] L 1 It may include alkyl groups selected from, for example, methyl, ethyl, propyl, butyl, and pentyl. In some embodiments, L 1 It contains butyl.

[0057] L 2 It may include, for example, an alkyl selected from methyl, ethyl, propyl, butyl, and pentyl, provided, L 2 is L 1 It is not the same as. In some embodiments, L 2 It contains methyl.

[0058] In some embodiments, L 1 and L 2At least one of is selected from butyl, 1-methylpropyl, 2-methylpropyl, and 1,1-dimethylethyl. In some embodiments, L 1 It contains 1,1-dimethyl ethyl, that is, 1,1-dimethyl ethyl.

[0059] In some embodiments, L 1 and L 2 At least one of them is selected from pentyl, 1,1-dimethylpropyl, 2,2-dimethylpropyl, 3-methylbutyl, 1-methylbutyl, 1-ethylpropyl, 1,2-dimethylpropyl, and 2-methylbutyl.

[0060] In some embodiments, L 1 and L 2 At least one of them is selected from propyl, 1-methyl ethyl, and cyclopropyl.

[0061] In some embodiments, L 1 and L 2 At least one of them is ethyl.

[0062] In some embodiments, L 1 and L 2 At least one of them is methyl.

[0063] In some embodiments, the aluminum precursor comprises bis(1,1-dimethylethyl)methylaluminum. Bis(1,1-dimethylethyl)methylaluminum may be particularly advantageous. Such precursors were found not to exhibit decomposition over 8 weeks at 62°C. At this temperature, the precursor has a vapor pressure of about 1 tor so that it can be easily supplied to a reaction chamber.

[0064] In some embodiments, L 1It is a branched C4 to C8 alkyl bonded to aluminum through carbon atoms bonded to three carbon atoms. That is, the aluminum atom contained in the aluminum precursor is bonded to one carbon atom, which is then attached again to three carbon atoms (three "branched carbon atoms"). Such alkyl ligands occupy a large space around the metal atom, can generate steric effects on the reaction, and the spatial orientation of the atoms can also affect the bond strength. 1 It is an alkyl group containing four to eight carbon atoms, i.e., a C4 to C8 alkyl. Thus, it may contain four, five, six, seven, or eight carbon atoms. In these embodiments, since the carbon atom bonded to the metal atom is connected to three other carbon atoms, in these embodiments, at least L 1 The ligand is a tertbutyl group. In some embodiments, L 1 It is 1,1-dimethyl ethyl.

[0065] In some embodiments, any one of the three branched carbon atoms may have one or more additional carbon atoms attached thereto. Often, there are one or two additional carbon atoms attached to the branched carbon atom. In some embodiments, one or two of the three branched carbon atoms have one or more additional carbon atoms attached thereto. In some embodiments, all three of the branched carbon atoms have additional carbon atoms attached thereto. In some embodiments, L 1 is a C4 or C5 alkyl. In these embodiments, one of the branched carbon atoms has one additional carbon atom attached thereto. In some embodiments, L 1 is a C4 to C6 alkyl. In this embodiment, one branched carbon atom may have two additional carbon atoms attached thereto. Alternatively, two of the branched carbon atoms may have one additional carbon atom attached to each branched carbon atom.

[0066] In some embodiments, the aluminum atom has two L 1 It binds to a ligand. In some embodiments, two L 1 The ligands are identical. Two identical L 1 Having a ligand means having two different L within the metal alkyl precursor 1 Compared to using ligands, the precursor synthesis process can be simplified.

[0067] In some embodiments, L 2 is a C1 to C4 alkyl. Therefore, L 2 is L 1 It is smaller than. In some embodiments, L 2 is methyl or ethyl. In some embodiments, L 2 is a profile. In some implementations, L 2 is butyl. In some embodiments, L 1 is 1,1-dimethylethyl, and L 2 is methyl. In some embodiments, L 1 is 1,1-dimethylethyl, and L 2 is ethyl. In some embodiments, L 1 is 1,1-dimethylethyl, and L 2 is a profile.

[0068] In some embodiments, L 1 is 1,1-dimethylpropyl, and L 2 is methyl. In some embodiments, L 1 is 1,1-dimethylpropyl, and L 2 is ethyl. In some embodiments, L 1 is 1,1-dimethylpropyl, and L 2 is a profile. In some implementations, L 1 is 1,1-dimethylpropyl, and L 2 is butyl.

[0069] In some embodiments, L 1 is 1-ethyl-1-methylpropyl, and L 2 is methyl. In some embodiments, L 1is 1-ethyl-1-methylpropyl, and L 2 is ethyl. In some embodiments, L 1 is 1-ethyl-1-methylpropyl, and L 2 is a profile. In some implementations, L 1 is 1-ethyl-1-methylpropyl, and L 2 is butyl.

[0070] In some embodiments, L 1 is 1,1-diethylpropyl, and L 2 is methyl. In some embodiments, L 1 is 1,1-diethylpropyl, and L 2 is ethyl. In some embodiments, L 1 is 1,1-diethylpropyl, and L 2 is a profile. In some implementations, L 1 is 1,1-diethylpropyl, and L 2 is butyl.

[0071] In some embodiments, the transition metal precursor comprises at least one of tantalum, hafnium, vanadium, zirconium, niobium, molybdenum, tungsten, and titanium.

[0072] In some embodiments, the transition metal precursor includes at least one of titanium and vanadium.

[0073] In some embodiments, the transition metal precursor comprises a halogen. For example, the halogen may be selected from fluorine, chlorine, bromine, and iodine. In some embodiments, the halogen comprises chlorine.

[0074] The transition metal precursor may contain a transition metal in any suitable oxidation state. For example, the transition metal precursor may contain a transition metal in an oxidation state of +2, +3, +4, or +5. In some embodiments, the transition metal precursor contains a transition metal in an oxidation state of +4. In some embodiments, the transition metal precursor contains Ti in an oxidation state of +4.

[0075] In some embodiments, the transition metal precursor comprises a titanium precursor. Suitable titanium precursors comprise halides. Thus, in some embodiments, the titanium precursor comprises a titanium halide, such as titanium chloride, titanium fluoride, titanium bromide, or titanium iodide. In some embodiments, the titanium precursor comprises one or more compounds selected from titanium (II) chloride, titanium (III) chloride, and titanium (IV) chloride; and mixtures thereof. In some embodiments, the transition metal precursor comprises TiCl4.

[0076] In some embodiments, the transition metal precursor comprises a vanadium precursor. Suitable vanadium precursors comprise halides. Thus, in some embodiments, the vanadium precursor comprises a vanadium halide, such as vanadium chloride, vanadium fluoride, vanadium bromide, or vanadium iodide. In some embodiments, the vanadium precursor comprises one or more compounds selected from vanadium (II) chloride, vanadium (III) chloride, and vanadium (IV) chloride; and mixtures thereof.

[0077] In some embodiments, the transition metal precursor comprises a hafnium precursor. Suitable hafnium precursors comprise halides. Thus, in some embodiments, the hafnium precursor comprises a hafnium halide, such as hafnium chloride, hafnium fluoride, hafnium bromide, or hafnium iodide. In some embodiments, the hafnium precursor comprises one or more compounds selected from hafnium (II) chloride, hafnium (III) chloride, and hafnium (IV) chloride; and mixtures thereof. In some embodiments, the transition metal precursor comprises HfCl4.

[0078] A layer having a desired thickness can be formed on a substrate by performing an appropriate number of deposition cycles. The total number of deposition cycles included in the method described herein depends particularly on the desired total layer thickness. In some embodiments, the method comprises at least 2 to 5 deposition cycles, or at least 5 to 10 deposition cycles, or at least 10 to 20 deposition cycles, or at least 20 to 50 deposition cycles, or at least 50 to 100 deposition cycles, or at least 100 to 200 deposition cycles, or at least 200 to 500 deposition cycles, or at least 500 to 1000 deposition cycles, or at least 1000 to 2000 deposition cycles, or at least 200 to 500 deposition cycles, or at least 500 to 1000 deposition cycles, or at least 1000 to 2000 deposition cycles, or at least 2000 to 5000 deposition cycles, or at least 5000 to 10000 deposition cycles.

[0079] In some embodiments, the layer thus formed may have a thickness of at least 0.2 nm to a maximum of 5 nm, or at least 0.3 nm to a maximum of 4 nm, or at least 0.4 nm to a maximum of 3 nm, or at least 0.5 nm to a maximum of 2 nm, or at least 0.7 nm to a maximum of 1.5 nm, or at least 0.9 nm to a maximum of 1.0 nm.

[0080] In some embodiments, the layer thus formed may have a thickness of up to 5.0 nm, or up to 4.0 nm, or up to 3.0 nm, or up to 2.0 nm, or up to 1.5 nm, or up to 1.0 nm, or up to 0.8 nm, or up to 0.6 nm, or up to 0.5 nm, or up to 0.4 nm, or up to 0.3 nm, or up to 0.2 nm, or up to 0.1 nm.

[0081] In some embodiments, the transition metal precursor pulse lasts for at least 0.01 seconds to a maximum of 240 seconds, or at least 0.02 seconds to a maximum of 120 seconds, or at least 0.05 seconds to a maximum of 60 seconds, or at least 0.1 seconds to a maximum of 30 seconds, or at least 0.2 seconds to a maximum of 15 seconds, or at least 0.25 seconds to a maximum of 6.0 seconds, or at least 0.5 seconds to a maximum of 4.0 seconds, or at least 1.0 seconds to a maximum of 3.0 seconds.

[0082] In some embodiments, the aluminum precursor pulse lasts for at least 0.5 seconds to a maximum of 20.0 seconds, or at least 1.0 seconds to a maximum of 12.0 seconds, or at least 4.0 seconds to a maximum of 8.0 seconds.

[0083] In some embodiments, the transition metal precursor pulse may include a plurality of transition metal precursor sub-pulses. The transition metal precursor sub-pulses may be suitably separated by a transition metal precursor sub-purge. For example, the transition metal precursor sub-pulse may last for at least 0.01 seconds to a maximum of 10.0 seconds, or at least 0.02 seconds to a maximum of 5.0 seconds, or at least 0.5 seconds to a maximum of 2.0 seconds, or at least 0.7 seconds to a maximum of 1.0 seconds. In some embodiments, the transition metal precursor sub-purge may last for at least 0.01 seconds to a maximum of 30.0 seconds, or at least 0.02 seconds to a maximum of 20.0 seconds, or at least 0.05 seconds to a maximum of 10.0 seconds, or at least 0.1 seconds to a maximum of 5.0 seconds, or at least 0.2 seconds to a maximum of 2.0 seconds, or at least 0.5 seconds to a maximum of 1.0 seconds. In some embodiments, the transition metal precursor pulse comprises at least 2 to a maximum of 1,000 transition metal precursor sub-pulses, or at least 5 to a maximum of 500 transition metal precursor sub-pulses, or at least 10 to a maximum of 200 transition metal precursor sub-pulses, or at least 20 to a maximum of 100 transition metal precursor sub-pulses.

[0084] In some embodiments, the aluminum precursor pulse may include a plurality of aluminum precursor sub-pulses. The aluminum precursor sub-pulses may be appropriately separated by an aluminum precursor sub-purge. For example, the aluminum precursor sub-pulse may last for at least 0.01 seconds to a maximum of 10.0 seconds, or at least 0.02 seconds to a maximum of 5.0 seconds, or at least 0.5 seconds to a maximum of 2.0 seconds, or at least 0.7 seconds to a maximum of 1.0 seconds. In some embodiments, the aluminum precursor sub-purge may last for at least 0.01 seconds to a maximum of 30.0 seconds, or at least 0.02 seconds to a maximum of 20.0 seconds, or at least 0.05 seconds to a maximum of 10.0 seconds, or at least 0.1 seconds to a maximum of 5.0 seconds, or at least 0.2 seconds to a maximum of 2.0 seconds, or at least 0.5 seconds to a maximum of 1.0 seconds. In some embodiments, the aluminum precursor pulse comprises at least 2 to a maximum of 1,000 aluminum precursor sub-pulses, or at least 5 to a maximum of 500 aluminum precursor sub-pulses, or at least 10 to a maximum of 200 aluminum precursor sub-pulses, or at least 20 to a maximum of 100 aluminum precursor sub-pulses.

[0085] In some embodiments, subsequent cycles are separated by purging between deposition cycles. In some embodiments, the duration of purging between deposition cycles is at least 0.01 seconds to a maximum of 30.0 seconds, or at least 0.015 seconds to a maximum of 25.0 seconds, or at least 0.02 seconds to a maximum of 20.0 seconds, or at least 0.025 seconds to a maximum of 10.0 seconds, or at least 0.1 seconds to a maximum of 5.0 seconds, or at least 1.0 seconds to a maximum of 3.0 seconds, or at least 30 seconds to a maximum of 120 seconds, or at least 40 seconds to a maximum of 100 seconds, or at least 50 seconds to a maximum of 80 seconds.

[0086] In some embodiments, the aluminum precursor pulse and the transition metal pulse are separated by purging within the deposition cycle. In some embodiments, the duration within the deposition cycle is at least 0.01 seconds to a maximum of 120 seconds, or at least 0.015 seconds to a maximum of 60 seconds, or at least 0.02 seconds to a maximum of 30 seconds, or at least 0.025 seconds to a maximum of 10.0 seconds, or at least 0.5 seconds to a maximum of 8.0 seconds, or at least 2.0 seconds to a maximum of 6.0 seconds, or 3.0 seconds to a maximum of 5.0 seconds.

[0087] It will be understood that providing a purge step between subsequent pulses or deposition cycles can adequately minimize parasitic reactions between transition metal precursors and aluminum precursors.

[0088] In some embodiments, the deposition cycle is performed in the absence of plasma. That is, the deposition cycle is thermal in some embodiments. That is, in some embodiments, the method described herein does not involve the use of plasma to form an activated species for use in a deposition process.

[0089] In some embodiments, the aluminum content of the layer formed by the method described herein is at least 1.0 atomic percent to a maximum of 70.0 atomic percent, or at least 2.0 atomic percent to a maximum of 10.0 atomic percent, or at least 3.0 atomic percent to a maximum of 8.0 atomic percent, or at least 4.0 atomic percent to a maximum of 6.0 atomic percent, or at least 10.0 atomic percent to a maximum of 60.0 atomic percent, or at least 13.0 atomic percent to a maximum of 50.0 atomic percent, or at least 15.0 atomic percent to a maximum of 40.0 atomic percent, or at least 20.0 atomic percent to a maximum of 30.0 atomic percent. In some embodiments, the aluminum content of the layer is higher than 11.0 atomic percent.

[0090] In some embodiments, the transition metal content of the layer formed by the method described herein is at least 1.0 atomic percent to at most 90.0 atomic percent, or at least 3.0 atomic percent to at most 80.0 atomic percent, or at least 5.0 atomic percent to at most 70.0 atomic percent, or at least 10.0 atomic percent to at most 60.0 atomic percent, or at least 20.0 atomic percent to at most 50.0 atomic percent, or at least 30.0 atomic percent to at most 40.0 atomic percent.

[0091] In some embodiments, the carbon content of the layer formed by the method described herein is at least 1.0 atomic percent to at most 60.0 atomic percent, or at least 3.0 atomic percent to at most 50.0 atomic percent, or at least 5.0 atomic percent to at most 40.0 atomic percent, or at least 10.0 atomic percent to at most 30.0 atomic percent, or at least 15.0 atomic percent to at most 25.0 atomic percent.

[0092] In some embodiments, the elemental concentration of the layer formed by the method described herein is constant over its entire thickness, for example, within an error range of up to 20 atomic%, or up to 10 atomic%, or up to 5 atomic%, or up to 1 atomic%. Alternatively, the concentration of one or more elements may be gradually varied over the entire thickness of the layer deposited by the method described herein, for example, and may increase or decrease.

[0093] In some embodiments, the layer is deposited at a substrate temperature of less than 800°C, or at least 200°C to a maximum of 600°C, or at least 300°C to a maximum of 500°C, or at least 350°C to a maximum of 450°C.

[0094] In some embodiments, the method comprises the step of bringing an aluminum precursor from an aluminum precursor source into a reaction chamber. The aluminum precursor source may be appropriately maintained at a temperature of at least 20°C to a maximum of 100°C, or at least 30°C to a maximum of 80°C, or at least 40°C to a maximum of 60°C, for example, at 50°C.

[0095] In some embodiments, the method comprises the step of bringing a transition metal precursor from a transition metal precursor source into a reaction chamber. The transition metal precursor source may be appropriately maintained at a temperature of at least 20°C to a maximum of 100°C, or at least 30°C to a maximum of 80°C, or at least 40°C to a maximum of 60°C, for example, at 50°C.

[0096] In some embodiments, the aluminum precursor source and the transition metal precursor source are maintained at the same temperature.

[0097] In some embodiments, an aluminum precursor and a transition metal precursor are provided to a reaction chamber through a showerhead injector. In some embodiments, the showerhead injector is maintained at a showerhead injector temperature of at least 50°C to a maximum of 200°C, or at least 60°C to a maximum of 180°C, or at least 70°C to a maximum of 160°C, or at least 80°C to a maximum of 140°C, or at least 100°C to a maximum of 120°C.

[0098] In some embodiments, the method described herein is performed at a pressure of less than 760 Torr or at least 0.2 Torr to a maximum of 760 Torr, at least 1 Torr to a maximum of 100 Torr, or at least 1 Torr to a maximum of 10 Torr. In some embodiments, the layer is performed at a pressure of up to 10.0 Torr, or up to 5.0 Torr, or up to 3.0 Torr, or up to 2.0 Torr, or up to 1.0 Torr, or up to 0.1 Torr, or up to 10 -2 Tor's pressure, or up to 10 -3 Tor's pressure, or up to 10 -4 Tor's pressure, or up to 10 -5 It is deposited at a pressure of at least 0.1 Torr to a maximum of 10 Torr, at least 0.5 Torr to a maximum of 8 Torr, or at least 1.0 Torr to a maximum of 5.0 Torr.

[0099] In some embodiments, the layer deposited by the method described herein has a work function of at least 4.0 eV to a maximum of 5.0 eV, or at least 4.0 eV to a maximum of 4.2 eV, or at least 4.2 eV to a maximum of 4.4 eV, or at least 4.4 eV to a maximum of 4.6 eV, or at least 4.6 eV to a maximum of 4.8 eV, or at least 4.8 eV to a maximum of 5.0 eV. Advantageously, such work function can be obtained at a thickness of at least 0.3 nm to a maximum of 0.5 nm, or at least 0.5 nm to a maximum of 1.0 nm, or at least 1.0 nm to 2.0 nm, or at least 2.0 nm to a maximum of 5.0 nm, or at least 5.0 nm to a maximum of 10.0 nm, or at least 10.0 nm to a maximum of 20.0 nm, or at least 20.0 nm to a maximum of 50.0 nm, or at least 50.0 nm to a maximum of 50.0 nm to a maximum of 100.0 nm.

[0100] In some embodiments, the layer is grown by the method described herein at a growth rate of at least 0.01 nm to a maximum of 1.0 nm per cycle, or at least 0.01 nm to a maximum of 0.02 nm, or at least 0.02 nm to a maximum of 0.05 nm, or at least 0.05 nm to a maximum of 0.1 nm, or at least 0.1 nm to a maximum of 0.2 nm, or at least 0.2 nm to a maximum of 0.5 nm, or at least 0.5 nm to a maximum of 1.0 nm.

[0101] In some embodiments, the method further comprises the step of exposing the substrate to an oxygen-containing gas. Thus, the layer deposited by the method described herein may be at least partially oxidized. Suitable oxygen-containing gases include atmosphere, O2, ozone, water, hydrogen peroxide, and mixtures thereof.

[0102] In some embodiments, the method is performed until a layer having a thickness of at least 0.2 nm to a maximum of 5 nm is formed on a substrate.

[0103] A single-crystal silicon wafer may be a suitable substrate. Other substrates, for example, a single-crystal germanium wafer, a gallium arsenide wafer, quartz, sapphire, glass, steel, aluminum, a silicon-on-insulator substrate, plastic, etc., may be suitable. The substrate may comprise a surface layer on which a layer deposited by the method described herein is formed. A suitable surface layer comprises a conductive layer such as a metal or a specific nitride. Suitable nitrides include titanium nitride. Other suitable surface layers comprise a high-dielectric constant dielectric layer, for example, hafnium oxide.

[0104] According to additional embodiments of the present disclosure, a device or part thereof may be formed using the method and / or structure described herein. The device may comprise a substrate, an insulating layer or a dielectric layer, a layer disposed over the insulating layer or dielectric layer and deposited by the method described herein, and optionally an additional metal layer disposed over the layer deposited by the method described herein. Optionally, an additional metal layer may be provided between the layer deposited by the method as described herein and the insulating layer or dielectric layer. The device may be part of, for example, a MOSFET, for example, a pMOSFET or nMOSFET device, or may form such a device.

[0105] In some embodiments, the MOSFET device may be a gate-all-around pmos field-effect transistor. Accordingly, a pmos field-effect transistor comprising a threshold voltage tuning layer deposited by the method described herein is further provided. Optionally, the threshold voltage shifting layer is included in the gate electrode included in the field-effect transistor.

[0106] In some embodiments, the MOSFET device may be an nmos field-effect transistor. Accordingly, an nmos field-effect transistor comprising a threshold voltage tuning layer deposited by the method described herein is further provided. Optionally, the threshold voltage shifting layer is included in the gate electrode included in the field-effect transistor.

[0107] A gate-all-around field-effect transistor is further described. It includes a gate contact comprising a layer formed according to the method described herein.

[0108] A MIM metal electrode comprising a layer deposited by a method as described herein is further provided.

[0109] A VNAND contact including a layer deposited by a method as described herein is further provided.

[0110] A dynamic random access memory (DRAM) cell electrode comprising a layer formed according to the method described herein is further provided herein.

[0111] Wires partially or wholly lined with a layer deposited by a method as described herein are further provided herein. In some embodiments, the wire comprises copper. In some embodiments, the wire comprises tungsten. In some embodiments, the wire comprises a core composed of or substantially composed of copper and / or tungsten. It will be understood that the term “wire” may refer to a common interconnection or a plurality of interconnections in an integrated circuit. The term “wire” includes bitlines, wordlines, electrical connections through vias, electrical connections embedded in a low-dielectric constant dielectric, etc.

[0112] A system is further described herein. The system comprises a reaction chamber, an aluminum precursor gas source, a transition metal precursor gas source, and a controller. The reaction chamber comprises a substrate. The aluminum precursor gas source comprises an aluminum precursor. The aluminum precursor comprises aluminum, a first alkyl ligand, and a second alkyl ligand. It should be understood that the first alkyl ligand and the second alkyl ligand are different. The transition metal precursor gas source comprises a transition metal precursor. The transition metal precursor comprises a transition metal. The controller is configured to control the gas flow into the reaction chamber to form a layer on the substrate by a method as described herein.

[0113] FIG. 1 shows a schematic diagram of one embodiment of the method as described herein. The method (100) may be used to form a gate electrode structure suitable for NMOS, PMOS, and / or CMOS devices, such as for use as a work function metal in the gate, source, or drain electrodes of a metal oxide semiconductor, for example. However, unless otherwise stated, the method described herein is not limited to such applications. The method according to FIG. 1 includes the step (111) of positioning a substrate on a substrate support. The substrate support is located within a reaction chamber. Suitable substrate supports include a pedestal, a susceptor, etc. Then, an aluminum precursor pulse (112) is performed. During the precursor pulse period, an aluminum precursor is provided to the reaction chamber.

[0114] Optionally, the reaction chamber is then purged by the subsequent aluminum precursor purging (115). Purging may be performed, for example, by a return gas. Exemplary return gases include He, Ne, Ar, Xe, and Kr. Alternatively, purging may include the step of transporting the substrate through a purging gas curtain. During purging, if excess chemicals and reaction byproducts are present, they may be removed from the substrate surface or the reaction chamber before the substrate comes into contact with the next reaction chemicals, for example by purging the reaction space or moving the substrate. Then, a transition metal precursor pulse (116) is performed. Optionally, the reaction chamber is then purged by the subsequent transition metal precursor purging (117). Alternatively, the transition metal precursor purging may include the step of transporting the substrate through a purging gas curtain. The deposition cycle including the aluminum precursor pulse (112) and the transition metal precursor pulse (116) is repeated one or more times (119). This method continues until a layer having a predetermined thickness is formed on the substrate. When a suitable thickness is obtained, the method may be terminated (118), and a subsequent layer, for example, another conductive material, may be deposited on top of this layer. Alternatively, the substrate may be exposed to an oxygen-containing gas such as O2, and then another layer is deposited on top of the layer deposited by the method described herein. This post-deposition oxidation step (114) may be appropriately used to further adjust the effective work function of the electrode comprising the layer deposited according to one embodiment of the method described herein. Optionally, the deposition cycle is preceded by a priming step (113). The priming step may include a step of exposing the substrate to a transition metal precursor. Alternatively, the priming step may include a step of exposing the substrate to an aluminum precursor. The priming step may improve layer quality. Additionally, or alternatively, the priming step may improve layer uniformity.Additionally or alternatively, the priming step can improve the growth rate during the first deposition cycle.

[0115] The method according to FIG. 1 may include the step of heating a substrate to a desired deposition temperature within a reaction chamber. A suitable substrate temperature is described elsewhere in the present invention. Additionally, the method according to FIG. 1 may include the step of heating one or more precursor containers to a desired precursor container temperature. A suitable precursor container temperature is described elsewhere in the present invention. Additionally, the method according to FIG. 1 may include the step of heating a gas injector, for example, a showerhead injector, contained within the reaction chamber to a desired injector temperature. A suitable injector temperature is described elsewhere in the present invention.

[0116] The method according to FIG. 1 may include the step of controlling the pressure within the reaction chamber to a desired reaction chamber pressure. An appropriate reaction chamber pressure is described elsewhere in the present invention.

[0117] In an exemplary embodiment, the aluminum precursor comprises bis(1,1-dimethylethyl)methylaluminum, and the transition metal precursor comprises TiCl4. A TiAlC film deposited using a layer comprising titanium, aluminum, and carbon—namely, bis(1,1-dimethylethyl)methylaluminum and titanium tetrachloride according to one embodiment of the method described herein—exhibits low sheet resistance. In particular, a TiAlC film deposited by the method described herein can have a lower resistivity than a similar TiN film at a thickness of less than 4 nm. Furthermore, the resistivity of the film was found to be surprisingly stable over a wide range of thicknesses and deposition temperatures. A layer deposited by the method described herein can have a high Al content, for example, an aluminum content exceeding 11 atomic percent, and can be characterized by excellent elemental compositional uniformity across the film. A layer deposited by the method as described herein can have an effective work function at a film thickness of only 2 nm. An exemplary method as described herein may have an appropriate growth rate, for example, a growth rate of 0.1 nm per cycle to 2.0 nm per cycle, for example, a growth rate of 0.25 nm per cycle. It will be understood that a specific growth rate and a specific effective work function value can be fine-tuned by applying routine experiments to a desired value, for example by changing process parameters and / or by substituting at least a portion of the titanium precursor with other transition metal halides such as VCl4.

[0118] In another exemplary embodiment of the method described herein, bis(1,1-dimethylethyl)methylaluminum was used as an aluminum precursor and TiCl4 was used as a titanium precursor. The method begins with a priming step provided by 10 subsequent transition metal precursor pulses, which are separated by a purge. During the priming step, the transition metal precursor pulse lasts for 2 seconds, and the purge between two subsequent transition metal precursor pulses lasts for 1.5 seconds. After the priming step, a deposition step takes place. During the deposition step, TiCl4 is used as a transition metal precursor and bis(1,1-dimethylethyl)methylaluminum is used as an aluminum precursor. The deposition process comprises a plurality of subsequent aluminum precursor pulses and transition metal precursor pulses. The aluminum precursor pulses comprise three aluminum precursor sub-pulses, which are separated by an aluminum precursor sub-purge. The aluminum precursor sub-pulse lasts for 6 seconds, the aluminum precursor sub-purge lasts for 6 seconds, and the transition metal precursor pulse lasts for 2 seconds. The aluminum precursor pulse and the transition metal precursor pulse are separated by a purge within the deposition cycle lasting for 4 seconds. Subsequent deposition cycles are separated by a purge between deposition cycles lasting for 1.5 seconds. A total of 60 deposition cycles are performed to produce a TiAlC layer with a thickness of 14.3 nm. This process is carried out at a pressure of 3 Torr and a substrate temperature of 400°C within a reaction chamber containing a showerhead injector maintained at a temperature of 110°C. The aluminum precursor and the transition metal precursor are supplied to the reaction chamber from the aluminum precursor source and the transition metal precursor source, respectively. The aluminum precursor source is maintained at a temperature of 50°C. The transition metal precursor source is maintained at room temperature. The layer is deposited on a thermal oxide layer grown on a single-crystalline silicon p-wafer to provide an insulating substrate that facilitates sheet resistance measurement. This is only 0.A 14.3 nm thick TiAlC layer with a sheet resistance of 647 ohms / □ and 9% non-uniformity (2 sigma) is produced. X-ray photoelectron spectroscopy (XPS) measurements revealed an elemental composition of 11.2 atomic percent aluminum, 34.5 atomic percent carbon, 14.6 atomic percent oxygen, and 36.4 atomic percent titanium. The oxygen concentration measured during XPS measurements was likely not present in the film at the time of deposition but was likely formed under the influence of the atmosphere while transporting the sample in question from the deposition tool to the X-ray photoelectron spectrometer for characterization.

[0119] As shown in FIG. 8, the resistance of the layer deposited by this exemplary embodiment of the method described herein is advantageously compared with a titanium nitride reference layer having a similar thickness. In particular, a 3 nm thick layer deposited by the method described herein has a resistivity of about 2000 Ohm·cm compared to 3500 Ohm·cm for a titanium nitride layer having the same thickness.

[0120] According to the present exemplary embodiment, a layer deposited in accordance with the present exemplary embodiment was incorporated into a contact of a metal-oxide-semiconductor capacitor to measure its work function. The contact included the following material stack: a TiN liner (~1.5 nm) / a TiAlC layer deposited by the method described herein / a TiN cap. When a TiN cap was deposited on a TiAlC layer deposited by the method according to the present exemplary embodiment without intervening air supply, an effective work function of 4.34 eV was obtained for a TiAlC layer with a thickness of 2 nm. When a TiN cap was deposited on a TiAlC layer after intervening air supply, i.e., after the TiAlC layer was exposed to atmospheric air, an effective work function of 4.42 eV was obtained for a TiAlC layer with a thickness of 2 nm. Thus, the effective work function of an electrode containing a layer deposited according to the present disclosure can be adjusted by exposing the layer to an oxygen-containing gas, e.g., the atmosphere. Other suitable oxygen-containing gases include water, ozone, oxygen, hydrogen peroxide, etc.

[0121] In a specific embodiment of the method according to FIG. 1, the method as described herein may include the step of transferring a substrate to different locations within a reaction chamber. That is, the pulse and the purge may be performed spatially instead of temporally. For example, an aluminum precursor pulse may include the step of positioning the substrate within an aluminum precursor exposure chamber, and a transition metal precursor pulse may include the step of positioning the substrate within a transition metal precursor exposure chamber. In some embodiments, the purge may be appropriately performed by transferring the substrate through a purge gas curtain, that is, through an area of ​​the reaction chamber where the purge gas is provided.

[0122] FIG. 2 illustrates an example of a structure (200) according to an example of the present disclosure. The element or structure (200) comprises a substrate (202), a dielectric or insulating material (204), and a layer (206) deposited according to the method described herein. In the illustrated example, the structure (200) also comprises an additional conductive layer (212).

[0123] In the illustrated example, the substrate (202) includes a source region (214), a drain region (216), and a channel region (218). Although illustrated as a horizontal structure, the structure and device according to the example of the present disclosure may include a vertical and / or three-dimensional structure and device, such as a FinFET device and a gate-all-around MOSFET.

[0124] FIG. 3 illustrates a structure / part of a device (300) according to an additional example of the present disclosure. The device or structure (300) comprises a substrate (302), a dielectric or insulating material (305), and a layer (308) formed according to the method described herein. In the illustrated example, the structure (300) also comprises an additional conductive layer (310).

[0125] The substrate (302) may be any substrate material described herein or may include the same.

[0126] The dielectric or insulating material (305) may comprise one or more dielectric or insulating material layers. For example, the dielectric or insulating material (305) may comprise an interface layer (304) and a high-dielectric constant material (306) deposited on the interface layer (304). In some cases, the interface layer (304) may not exist or may not exist to a notable extent. The interface layer (304) may comprise an oxide, such as silicon oxide, which can be formed on the surface of the substrate (302) using, for example, a chemical oxidation process or an oxide deposition process. The high-dielectric constant material (306) may be or may comprise a metallic oxide having a dielectric constant greater than about 7. In some embodiments, the high-dielectric constant material has a dielectric constant higher than that of silicon oxide. Exemplary high-dielectric materials comprise one or more of hafnium oxide (HfO2), tantalum oxide (Ta2O5), vanadium oxide (VO2), zirconium oxide (ZrO2), niobium oxide (Nb2O5), titanium oxide (TiO2), aluminum oxide (Al2O3) or lanthanum oxide (La2O3), or mixtures thereof, and laminates thereof. Other exemplary high-dielectric materials include, in particular, hafnium silicate (HfSiO2). x ), Lanthanum silicate (LaSiO2) x ), titanium silicate (TiSiO2) x ), and thallium silicate (TmSiO2) x It contains silicates such as ).

[0127] When a layer (308) is formed using the method described herein, the concentration of its constituent components may vary from the bottom of the layer (308) to the top of the layer (308), for example, by controlling the amount of precursor and / or reactant and / or each pulse time during one or more deposition cycles. In some cases, the layer (308) deposited according to the method described herein may have a stoichiometric composition. The work function and other properties of this layer (308) may be changed by changing its composition.

[0128] The layer (308) deposited according to the method described herein may contain impurities such as halides, hydrogen, etc. In some embodiments, the impurity content may be less than 1 atomic percent, less than 0.2 atomic percent, or less than 0.1 atomic percent, or less than 0.05 atomic percent when alone or in combination.

[0129] The thickness of the layer (308) deposited by the method described herein may vary depending on the application. For example, such a layer (308) may have a thickness of less than about 5 nm, or about 0.2 nm to about 5 nm, or about 0.3 nm to about 3 nm, or about 0.3 nm to about 1 nm. For example, when used to control the threshold voltage in pMOSFETS, the layer (308) deposited by the method described herein may be relatively thin, which may be desirable for many applications involving a work function and / or threshold voltage control layer. Exemplary thicknesses are 0.1 to 5.0 nm, 0.2 to 4.0 nm, 0.3 to 3.0 nm, 0.4 to 2.0 nm, 0.5 to 1.5 nm, 0.7 nm to 1.3 nm, or 0.9 nm to 1.1 nm. In a general embodiment, the layer (308) may have a thickness of less than 0.1 nm. It should be understood that such a layer is not necessarily continuous and may even consist of multiple isolated clusters of atoms and / or multiple isolated atoms.

[0130] Additionally or alternatively, the layer (308) deposited by the method described herein may form a continuous film with a thickness of < 5 nm, < 4 nm, < 3 nm, < 2 nm, < 1.5 nm, < 1.2 nm, < 1.0 nm, or less than 0.9 nm. The layer (308) deposited by the method described herein may be relatively smooth and may have relatively low grain boundary formation. In some cases, the layer (308) deposited according to the method described herein may be amorphous or may include amorphous regions. Additionally or alternatively, such a layer (308) may include a relatively low columnar crystal structure (compared to TiN). The RMS roughness of the exemplary layer (308) containing the metal nitride may be < 1.0 nm, < 0.7 nm, < 0.5 nm, < 0.4 nm, < 0.35 nm, or < 0.3 nm at a thickness of less than 10 nm.

[0131] The work function of the layer (308) deposited according to the method described herein may be > 4.0 eV, > 4.1 eV, > 4.2 eV, > 4.3 eV, > 4.4 eV, > 4.5 eV, > 4.6 eV, > 4.7 eV, > 4.8 eV, > 4.9 eV, > 4.95 eV, or > 5.0 eV. Alternatively, the work function of the layer (308) deposited according to the method described herein may be < 4.0 eV, < 4.1 eV, < 4.2 eV, < 4.3 eV, < 4.4 eV, < 4.5 eV, < 4.6 eV, < 4.7 eV, < 4.8 eV, < 4.9 eV, < 4.95 eV, or < 5.0 eV. The work function value of the gate contact can be shifted by about 30 meV to about 400 meV, or about 30 meV to about 200 meV, or about 50 meV to about 100 meV using the layer deposited by the method described herein, compared to a gate contact that does not include such a layer (308).

[0132] The additional conductive layer (312) may include a metal such as, for example, a refractory metal and / or a transition metal.

[0133] FIG. 4 shows another structure (400) according to an example of the present disclosure. This structure (400) is suitable for gate all-around field effect transistor (GAA FET) (also referred to as lateral nanowire FET) devices, etc.

[0134] In the illustrated example, the structure (400) comprises a semiconductor material (402), a dielectric material (404), a layer (406) containing a transition metal, aluminum, and carbon, and a conductive layer (408). The structure (400) may be formed on a substrate including any substrate material described herein. The layer (406) containing the transition metal, aluminum, and carbon may be located between the conductive layer (408) and the dielectric material (406) as illustrated. Alternatively, the layer (406) containing the transition metal, aluminum, and carbon may be located inside the conductive layer (408) (an embodiment not shown).

[0135] The semiconductor material (402) may include any suitable semiconductor material. For example, the semiconductor material (402) may include a group IV, group III-V, or group II-VI semiconductor material. As an example, the semiconductor material (402) may include silicon.

[0136] The dielectric material (404) may be the same or similar to the dielectric or insulating material described elsewhere in this invention.

[0137] FIG. 5 illustrates a system (500) according to an exemplary additional embodiment of the present disclosure. The system (500) may be used to perform and / or perform a method as described herein, or to form a structure or component as described herein.

[0138] In the example shown, the system (500) includes one or more reaction chambers (502), an aluminum precursor gas source (504), a transition metal precursor gas source (506), a purge gas source (508), an exhaust source (510), and a controller (512).

[0139] The reaction chamber (502) may include any suitable reaction chamber, such as an ALD or CVD reaction chamber.

[0140] The aluminum precursor gas source (504) may include a container and one or more precursors as described herein, either alone or mixed with one or more carrier gases (e.g., ear). The transition metal precursor gas source (506) may include a container and one or more reactants as described herein, either alone or mixed with one or more carrier gases. The purge gas source (508) may include one or more ear gases as described herein. Although shown as four gas sources (504)–(508), the system (500) may include any suitable number of gas sources. The gas sources (504)–(508) may be connected to the reaction chamber (502) via lines (514)–(518), each of which may include a flow controller, a valve, a heater, etc.

[0141] The exhaust (510) may include one or more vacuum pumps.

[0142] The controller (512) includes electronic circuits and software for selectively operating valves, manifolds, heaters, pumps, and other components included in the system (500). These circuits and components operate to introduce precursors from their respective sources (504)-(508). The controller (512) may control the timing of the gas pulse sequence, the temperature of the substrate and / or reaction chamber, the pressure of the reaction chamber, and various other operations to provide proper operation of the system (500). The controller (512) may include control software that electrically or pneumatically controls valves to control the flow of precursors, reactants, and purge gas into and from the reaction chamber (502). The controller (512) may include software or hardware components, such as modules like FPGAs or ASICs, that perform specific tasks. The modules are configured to be mounted on an addressable storage medium of the control system and may be advantageously configured to execute one or more processes.

[0143] Other configurations of the system (500) are possible, including different numbers and types of precursor and reactant sources and purge gas sources. Additionally, it will be understood that there are multiple arrangements of valves, conduits, precursor sources, and purge gas sources that can be used to achieve the purpose of selectively supplying gas into the reaction chamber (502). Furthermore, while the system is schematically depicted, many components have been omitted for the sake of simplification of the example, and these components may include, for example, various valves, manifolds, purifiers, heaters, vessels, vents, and / or bypasses.

[0144] During the operation of the reactor system (500), a substrate, such as a semiconductor wafer (not shown), is transferred, for example, from a substrate handling system to a reaction chamber (502). Once the substrate(s) are transferred to the reaction chamber (502), one or more gases from a gas source (504)-(508), such as a precursor, a reactant, a carrier gas, and / or a purge gas, are introduced into the reaction chamber (502).

[0145] FIG. 6 illustrates an exemplary DRAM capacitor (600). In the illustrated embodiment, it includes an upper electrode (610, 670) comprising two parts, namely an inner shell and an outer shell. Nevertheless, the upper electrode may include only one part or more than two parts, for example, three or more parts. It should be understood that in the embodiment of FIG. 6, the two parts of the upper electrode (610, 670) are electrically connected to each other (connection not shown), that is, during normal operation, they are maintained at the same or approximately the same potential. The upper electrode (610, 670) includes a layer deposited by a method as described herein. The upper electrode (610, 670) may have a thickness of, for example, at least 0.5 nm to 5.0 nm, or at least 1.0 nm to a maximum of 4.0 nm, or at least 2.0 nm to a maximum of 3.0 nm, or at least 0.5 nm to a maximum of 2.5 nm, or at least 0.6 nm to a maximum of 2.0 nm, or at least 0.7 nm to a maximum of 1.5 nm. The DRAM capacitor (600) further comprises a lower electrode (640). The lower electrode (640) comprises a layer deposited by a method as described herein. In some embodiments, the composition of the lower electrode (640) is the same as the composition of the upper electrode (610, 670). Alternatively, the composition of the lower electrode (640) may be different from the composition of the upper electrode (610, 670). The lower electrode (640) may have a thickness of, for example, at least 1.0 nm to a maximum of 10.0 nm, or at least 3.0 nm to a maximum of 7.0 nm, at least 0.5 nm to 5.0 nm, or at least 1.0 nm to a maximum of 4.0 nm, or at least 2.0 nm to a maximum of 3.0 nm, or at least 0.5 nm to a maximum of 2.5 nm, or at least 0.6 nm to a maximum of 2.0 nm, or at least 0.7 nm to a maximum of 1.5 nm.The lower electrode (640) is separated from the outer shell (610) of the upper electrode by one or more dielectric layers (620, 630). The illustrated embodiment features two dielectric layers (620, 630). One or more dielectric layers (620, 630) may include a high-dielectric dielectric. For example, the high-dielectric dielectric may be selected from a list including hafnium oxide (HfO2), tantalum oxide (Ta2O5), vanadium oxide (VO2), niobium oxide (Nb2O5), zirconium oxide (ZrO2), titanium oxide (TiO2), aluminum oxide (Al2O3), lanthanum oxide (La2O3), mixtures thereof, and laminates thereof. Other exemplary high-dielectric materials include, in particular, hafnium silicate (HfSiO). x ), Lanthanum silicate (LaSiO2) x ), titanium silicate (TiSiO2) x ), and thallium silicate (TmSiO2) xIt includes silicates such as ). In some embodiments, the dielectric layer (620) has the same composition as the dielectric layer (630). In some embodiments, the dielectric layer (620) has a different composition from the dielectric layer (630). The combined thickness of the two dielectric layers (620, 630) may be, for example, at least 0.5 nm to a maximum of 10.0 nm, or at least 1.0 nm to a maximum of 8.0 nm, or at least 2.0 nm to a maximum of 6.0 nm, or at least 3.0 nm to a maximum of 4.0 nm. The inner shell (670) of the upper electrode is separated from the outer shell of the lower electrode (640) by one or more dielectric layers (650, 660). The illustrated embodiment features two such dielectric layers. One or more dielectric layers (650, 660) may include a high-dielectric constant dielectric. For example, high-dielectric constant dielectrics may be selected from a list including hafnium oxide (HfO2), tantalum oxide (Ta2O5), vanadium oxide (VO2), niobium oxide (Nb2O5), zirconium oxide (ZrO2), titanium oxide (TiO2), aluminum oxide (Al2O3), or lanthanum oxide (La2O3), or mixtures / laminates thereof. Other exemplary high-dielectric constant materials are, in particular, hafnium silicate (HfSiO2). x ), Lanthanum silicate (LaSiO2) x ), titanium silicate (TiSiO2) x ), and thallium silicate (TmSiO2) xIt includes a silicate such as ). In some embodiments, the dielectric layer (650) has the same composition as the dielectric layer (660). In some embodiments, the dielectric layer (650) has a different composition from the dielectric layer (660). The combined thickness of the dielectric layers (650, 660) may be, for example, at least 0.5 nm to a maximum of 10.0 nm, or at least 1.0 nm to a maximum of 8.0 nm, or at least 2.0 nm to a maximum of 6.0 nm, or at least 3.0 nm to a maximum of 4.0 nm. In some embodiments, the thickness of one or more dielectric layers (620, 630) between the outer shell (610) of the upper electrode and the lower electrode (640) is equal to the thickness of one or more dielectric layers (650, 660) between the inner shell (670) of the upper electrode and the lower electrode (640), for example, within an error limit of less than 2.0 nm, less than 1.5 nm, or less than 1.0 nm, or less than 0.5 nm, or less than 0.4 nm, or less than 0.3 nm, or less than 0.2 nm, or less than 0.1 nm. The gap-filling dielectric (680) may be centrally positioned within the DRAM capacitor (680). Exemplary gap-filling dielectrics include low-dielectric constant dielectrics, for example, SiOC, SiOCN, etc.

[0146] FIG. 7 illustrates a part of a VNAND cell, namely a contact and charge trap assembly (700). The contact and charge trap assembly (700) comprises a metal layer (710). The metal layer (710) may be made of a metal such as copper, tungsten, etc. Alternatively, the metal layer (710) may comprise a layer deposited according to the method described herein. As shown in FIG. 7, the metal layer (710) may be lined with a liner (720). The liner may improve adhesion and / or prevent or at least minimize the diffusion of the metal, e.g., copper or tungsten, from the metal layer (710). Advantageously, the liner (720) comprises a layer deposited by the method described herein. The contact and charge trap assembly (700) comprises a charge trap layer (740). The charge trap layer (740) is located between two dielectric layers (730, 750). The charge trap layer may comprise a conductive layer, for example, silicon nitride. Additionally or alternatively, the charge trap layer may comprise a layer deposited by a method as described herein. One of the dielectric layers (730) is adjacent to the liner (720). This dielectric layer (730) may comprise, for example, a high-dielectric material. For example, the high-dielectric dielectric may be selected from a list including hafnium oxide (HfO2), tantalum oxide (Ta2O5), vanadium oxide (VO2), niobium oxide (Nb2O5), zirconium oxide (ZrO2), titanium oxide (TiO2), aluminum oxide (Al2O3), or lanthanum oxide (La2O3), or mixtures / laminates thereof. Other exemplary high-dielectric dielectrics are, in particular, hafnium silicate (HfSiO2). x ), Lanthanum silicate (LaSiO2) x ), titanium silicate (TiSiO2) x ), and thallium silicate (TmSiO2) xIt includes silicates such as ). In a proper configuration of the VNAND memory architecture, another dielectric layer (750) can act as a tunnel layer and may be adjacent to a channel layer (not shown), for example, doped polysilicon.

[0147] FIG. 9 illustrates an embodiment of a precursor pulse, e.g., an aluminum precursor pulse or a transition metal precursor pulse, according to the exemplary method disclosed herein. A precursor pulse is started (911) and a precursor sub-pulse (912) is performed. Then, a precursor sub-purge (913) follows the precursor sub-pulse. Then, the precursor sub-pulse (912) and the precursor sub-purge (913) are repeated, e.g., at least 1 to a maximum of 10 times, for a predetermined period of time until the precursor pulse is terminated (914) (915).

[0148] Additionally, an embodiment of the method disclosed herein, including precursor pulses according to FIG. 9, is discussed. This specific embodiment of the method described herein may be performed at any suitable temperature. The method is performed at a pressure of 3 Torr and begins with a priming step in which a total of 10 priming pulses are performed. During the priming pulses, the substrate is exposed to TiCl4. The priming pulses are separated by a priming purge. The priming pulses last for 2 seconds, and the priming purge lasts for 1.5 seconds. After the priming step, 30 deposition cycles are performed. The deposition cycles include aluminum precursor pulses and transition metal precursor pulses. The aluminum precursor pulses include 2 to 7 aluminum precursor sub-pulses. An aluminum precursor sub-purge follows each aluminum precursor sub-pulse. During the aluminum precursor sub-pulses, the substrate is exposed to bis(1,1-dimethylethyl)methylaluminum. During the purge, a purge gas is supplied to the reaction chamber. The aluminum precursor sub-pulse lasts for 3 seconds, and the aluminum precursor sub-pulse lasts for 6 seconds. During the transition metal precursor pulse, the substrate is continuously exposed to TiCl4 for 3 seconds. The transition metal precursor pulse is followed by a transition metal precursor purge. The transition metal precursor purge lasts for 1.5 seconds.

[0149] In an exemplary embodiment, the method disclosed herein is used to form a layer comprising titanium (Ti), aluminum (Al), and carbon. Bis(tert-butyl)methylaluminum is used as an aluminum precursor and TiCl4 is used as a titanium precursor. Advantageously, bis(tert-butyl)methylaluminum is stable for 8 weeks at 62°C, at which temperature the vapor pressure is 1 Torr, which is a value suitable for cyclic deposition processes such as atomic layer deposition (ALD). During the method, the reaction chamber was maintained at a pressure of 3 Torr, and the susceptor was maintained at a temperature of 335°C.

[0150] First, a priming step was performed in which the substrate was exposed to 10 separate priming pulses. Each priming pulse included a step of exposing the substrate to a titanium precursor for 2 seconds. The priming pulses were separated by a priming purge while the substrate was exposed to Ar. The priming purge lasted for 1.5 seconds.

[0151] After the priming step, 30 deposition cycles were performed. The deposition cycles included aluminum precursor pulses and titanium precursor pulses. The aluminum precursor pulses and titanium precursor pulses were separated by a purge lasting 6 seconds.

[0152] An aluminum precursor was supplied to the reaction chamber in succession as an aluminum precursor pulse containing five separate sub-pulses. During the sub-pulse, the substrate was exposed to the aluminum precursor. During the sub-purge, the substrate was exposed to Ar. The sub-pulse lasted for 3 seconds, and the sub-purge lasted for 6 seconds.

[0153] A titanium precursor was supplied to the reaction chamber with a titanium precursor pulse lasting for 3 seconds. Following the titanium precursor pulse, a titanium precursor purge lasting for 1.5 seconds was performed. During the titanium precursor pulse, the substrate was continuously exposed to the titanium precursor.

[0154] The generated titanium aluminum carbide (TiAlC) film advantageously has a low resistivity of about 1500 μΩcm at a thickness of less than 3 nm and a work function of about 4.5 eV at a thickness of 2 nm. Meanwhile, the resistivity exhibits excellent stability over a wide range of thicknesses and deposition temperatures. The layer has a high Al content (>11%) with good elemental compositional uniformity throughout the film. The low resistivity and sheet resistance remain stable for 3 days, confirming the stability of the deposited layer.

[0155] The layer formed according to this exemplary embodiment exhibits good step coverage on the horizontal cavity structure, as shown in the transmission electron microscope image in FIG. 10, panel a). From the energy dispersive X-ray spectroscopy (EDS) profile shown in FIG. 10, panel b), excellent Al distribution on the horizontal cavity structure having upper and lower sides can be observed.

[0156] The effective work function (eWF) of the formed TiAlC layer provides ~4.5 eV at a thickness of 2 nm, which is in the sweet spot of the silicon intermediate gap. It will be understood that TiAlC can be formed directly on a high-dielectric constant dielectric, for example, HfO2. Alternatively, the layer formed according to this exemplary embodiment can be placed on a liner, such as a TiN liner. The liner can have a thickness of, for example, about 0.5 nm. It should be noted that the TiN liner is not necessarily closed at a thickness of 0.5 nm, that is, the liner may contain one or more pinholes, isolated islands, and holes.

[0157] The exemplary embodiments of the foregoing disclosure do not limit the scope of the invention, because these embodiments are merely examples of embodiments of the invention, which are defined by the appended claims and their legal equivalents. Any equivalent embodiments are intended to be within the scope of the invention. Certainly, in addition to what is shown and described herein, various modifications of the invention, such as alternative useful combinations of the described elements, may be apparent from the description to those skilled in the art. Such modifications and embodiments are also intended to be within the scope of the appended claims.

Claims

Claim 1 A method for forming a layer on a substrate, wherein the method comprises: - providing the substrate to a reaction chamber; - performing a plurality of deposition cycles, wherein the deposition cycles comprise: - an aluminum precursor pulse; and - a transition metal precursor pulse; wherein the aluminum precursor pulse comprises the step of exposing the substrate to the aluminum precursor, wherein the aluminum precursor comprises aluminum, a first alkyl ligand, and a second alkyl ligand, and wherein the first alkyl ligand and the second alkyl ligand are different, and the transition metal precursor pulse comprises the step of exposing the substrate to the transition metal precursor, wherein the transition metal precursor comprises a transition metal, thereby forming a layer comprising the transition metal, the aluminum, and carbon on the substrate. Claim 2 A method according to claim 1, wherein the step of performing a plurality of deposition cycles is preceded by a step of performing one or more priming steps, and the priming step includes a step of exposing the substrate to the transition metal precursor. Claim 3 In claim 1 or 2, the aluminum precursor is formula (L1) n (L2) n-1 A method comprising a chemical compound represented by Al, wherein L1 is a first alkyl ligand, L2 is a second alkyl ligand, and n is an integer of 1 or 2. Claim 4 A method according to claim 1 or 2, wherein the first alkyl ligand is a C1 to C5 alkyl. Claim 5 A method according to claim 1 or 2, wherein the second alkyl ligand is a C1 to C5 alkyl. Claim 6 In paragraph 3, the method in which L1 is 1,1-dimethylethyl. Claim 7 In paragraph 3, L2 is methyl, method. Claim 8 A method according to claim 1 or 2, wherein the aluminum precursor comprises bis(1,1-dimethylethyl)methylaluminum. Claim 9 A method according to claim 1 or 2, wherein the transition metal precursor comprises a halogen. Claim 10 In claim 9, the method wherein the halogen comprises chlorine. Claim 11 A method according to claim 1 or 2, wherein the transition metal is selected from tantalum, hafnium, vanadium, zirconium, niobium, molybdenum, tungsten, and titanium. Claim 12 A method according to claim 1, wherein subsequent deposition cycles are separated by purging between deposition cycles. Claim 13 A method according to paragraph 2, wherein the aluminum precursor pulse and the transition metal precursor pulse are separated by purging within a deposition cycle. Claim 14 A method according to claim 1 or 2, wherein the deposition cycle is executed without plasma. Claim 15 A method according to claim 1 or 2, wherein the method is performed until a layer having a thickness of at least 0.2 nm to a maximum of 5 nm is formed on the substrate. Claim 16 A method according to claim 1 or 2, wherein the substrate comprises a single-crystal silicon wafer. Claim 17 A method according to claim 1 or 2, further comprising the step of exposing the substrate to an oxygen-containing gas to at least partially oxidize the layer including the transition metal, the aluminum, and carbon. Claim 18 A semiconductor device comprising a layer formed according to the method according to paragraph 1 or 2. Claim 19 A VNAND contact comprising a layer deposited by the method according to claim 1 or 2. Claim 20 A system comprising: a reaction chamber; an aluminum precursor gas source including an aluminum precursor, wherein the aluminum precursor comprises aluminum, a first alkyl ligand, and a second alkyl ligand, and wherein the first alkyl ligand and the second alkyl ligand are different; a transition metal precursor gas source including a transition metal precursor; and a controller; wherein the controller is configured to control the flow of gas into the reaction chamber to form a layer on a substrate included in the reaction chamber by a method according to claim 1 or 2.

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