Semiconductor package

Abstract

A semiconductor package according to an embodiment includes an insulating layer; a first electrode portion disposed on the upper surface of the insulating layer; a second electrode portion disposed on the lower surface of the insulating layer; a first protective layer disposed on the upper surface of the insulating layer; and a circuit board comprising a second protective layer disposed on the lower surface of the insulating layer, wherein the ratio of the thickness of the circuit board to the thickness of the first electrode portion or the second electrode portion satisfies a range of 1:3 to 1:10.5.

Description

Technology Field

[0001] The embodiments relate to semiconductor packages. In particular, the embodiments relate to an ultra-slim circuit board and a semiconductor package including the same. Background Technology

[0002] A circuit board is formed by printing circuit line patterns using a conductive material, such as copper, onto an electrically insulating substrate. Such a circuit board refers to the substrate immediately prior to mounting semiconductor devices. In other words, a circuit board refers to a substrate on which electrode sections (or circuit patterns) that are electrically connected to various semiconductor devices are formed.

[0003] Such circuit boards are becoming increasingly slimmer. For example, a semiconductor package with semiconductor devices mounted on the circuit board can be applied to an electronic device.

[0004] At this time, the electronic device is becoming increasingly smaller and lighter. Accordingly, there is a need for miniaturization of the circuit board applied to the electronic device and the semiconductor package including it.

[0005] However, circuit boards based on conventional technology have limitations in reducing the overall thickness.

[0006] For example, circuit boards according to the prior art must have a thickness capable of withstanding various stresses generated during the manufacturing process. Consequently, there are limitations to reducing the thickness of circuit boards according to the prior art.

[0007] Furthermore, the circuit board must have a thickness of at least a certain level to stably mount the semiconductor device. For example, as the thickness of the circuit board decreases, a problem may arise where the bending characteristics deteriorate during the process of mounting the semiconductor device. And, if the bending characteristics deteriorate, there is a problem where the semiconductor device is mounted on the circuit board in a tilted state. The problem to be solved

[0008] An embodiment provides an ultra-slim circuit board.

[0009] In addition, the embodiment provides a circuit board capable of improving bending characteristics.

[0010] In addition, the embodiment provides a circuit board capable of improving bonding strength with a semiconductor package or electronic device.

[0011] The technical problems to be solved in the proposed embodiment are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by a person skilled in the art to which the proposed embodiment belongs from the description below. means of solving the problem

[0012] A semiconductor package according to an embodiment includes a circuit board comprising: a first insulating layer; an electrode portion disposed on the first insulating layer; a second insulating layer disposed on the upper surface of the first insulating layer; and a third insulating layer disposed on the lower surface of the first insulating layer, wherein the ratio of the thickness of the circuit board to the thickness of the electrode portion satisfies the range of 1:3 to 1:10.5.

[0013] In addition, the thickness of the electrode portion satisfies the range of 8㎛ to 12㎛.

[0014] Additionally, the electrode portion comprises a first electrode portion disposed on the upper surface of the first insulating layer; and a second electrode portion disposed on the lower surface of the first insulating layer, and the ratio of the thickness of the circuit board to the thickness of the first electrode portion or the second electrode portion satisfies a range of 1:3 to 1:10.5.

[0015] In addition, the thickness of the first electrode part satisfies the range of 8㎛ to 12㎛, and the thickness of the second electrode part satisfies the range of 8㎛ to 12㎛.

[0016] In addition, the second insulating layer is an insulating layer disposed on the uppermost side of the circuit board, and the third insulating layer is an insulating layer disposed on the lowermost side of the circuit board.

[0017] In addition, the first insulating layer of the circuit board is composed of one layer, and the thickness of the circuit board satisfies the range of 40㎛ to 60㎛.

[0018] In addition, the ratio of the thickness of the circuit board to the thickness of the first electrode portion or the second electrode portion satisfies the range of 1:4 to 1:6.

[0019] In addition, the ratio of the thickness of the circuit board to the thickness of the first insulating layer of the first layer satisfies the range of 1:3 to 1:10.5.

[0020] In addition, the thickness of the first insulating layer satisfies the range of 8㎛ to 12㎛.

[0021] In addition, the circuit board includes a through electrode penetrating the first insulating layer, and the ratio of the thickness of the circuit board to the thickness of the through electrode satisfies a range of 1:3 to 1:10.5.

[0022] In addition, the thickness of the penetrating electrode satisfies the range of 8㎛ to 12㎛.

[0023] In addition, the ratio of the thickness of the circuit board to the thickness of the second insulating layer or the third insulating layer satisfies the range of 1:3 to 1:10.5.

[0024] Additionally, the first insulating layer is composed of two layers including a first insulating layer and a second insulating layer disposed below the first insulating layer, the first electrode portion is disposed on the upper surface of the first insulating layer and the second electrode portion is disposed on the lower surface of the first insulating layer, and the circuit board includes a third electrode portion disposed between the lower surface of the first insulating layer and the upper surface of the first insulating layer, and the thickness of the circuit board satisfies the range of 51㎛ to 79㎛.

[0025] In addition, the ratio of the thickness of the circuit board to the thickness of the third electrode part satisfies the range of 1:6 to 1:21, and the thickness of the third electrode part satisfies the range of 3㎛ to 7㎛.

[0026] In addition, the ratio of the thickness of the circuit board to the thickness of the first electrode portion or the second electrode portion satisfies the range of 1:5 to 1:8.

[0027] In addition, the ratio of the thickness of the circuit board to the thickness of the first-1 insulating layer or the first-2 insulating layer satisfies the range of 1:3 to 1:10.5.

[0028] In addition, the thickness of the first-1 insulating layer satisfies the range of 8㎛ to 12㎛, and the thickness of the first-2 insulating layer satisfies the range of 8㎛ to 12㎛.

[0029] In addition, the circuit board includes a first penetrating electrode penetrating the first-1 insulating layer and a second penetrating electrode penetrating the first-2 insulating layer, and the ratio of the thickness of the circuit board to the thickness of the first penetrating electrode or the second penetrating electrode satisfies the range of 1:3 to 1:10.5.

[0030] In addition, the ratio of the thickness of the circuit board to the thickness of the second insulating layer or the third insulating layer satisfies the range of 1:3 to 1:10.5.

[0031] Additionally, the semiconductor package includes a first connection portion disposed on a first electrode pattern of the first electrode portion; and a semiconductor device mounted on the first connection portion, and the second insulating layer includes an opening that overlaps with the first electrode pattern of the first electrode portion in the thickness direction.

[0032] In addition, at least a portion of the lower surface of the third insulating layer includes an adhesive material. Effects of the invention

[0033] The embodiment can slim down the thickness of the circuit board.

[0034] Specifically, the circuit board of the embodiment may have a one-layer structure based on the number of insulating layers. In addition, the circuit board may include a first electrode portion disposed on the upper surface of the insulating layer, a second electrode portion disposed on the lower surface of the insulating layer, a penetrating electrode penetrating the insulating layer, a first protective layer disposed on the upper surface of the insulating layer, and a second protective layer disposed on the lower surface of the insulating layer.

[0035] And the ratio of the thickness of the circuit board to the insulating layer of the circuit board may range from 1:3 to 1:10.5, preferably from 1:3.3 to 1:7.5, and more preferably from 1:4 to 1:6. In addition, the ratio of the thickness of the circuit board to the first electrode portion or the second electrode portion of the circuit board may range from 1:3 to 1:10.5, preferably from 1:3.3 to 1:7.5, and more preferably from 1:4 to 1:6. In addition, the ratio of the thickness of the circuit board to the through electrode of the circuit board may range from 1:3 to 1:10.5, preferably from 1:3.3 to 1:7.5, and more preferably from 1:4 to 1:6. In addition, the ratio of the thickness of the circuit board to the first protective layer or the second protective layer of the circuit board may range from 1:3 to 1:10.5, preferably from 1:3.3 to 1:7.5, and more preferably from 1:4 to 1:6.

[0036] At this time, the thickness of the circuit board may be 40㎛ to 60㎛.

[0037] That is, the first embodiment can provide a circuit board with a thickness of 60 μm or less, wherein the ratio of the thickness of the circuit board to at least one of the insulating layer, the first electrode portion, the second electrode portion, the through electrode, the first protective layer, and the second protective layer is 1:3 to 1:10.5.

[0038] Accordingly, the embodiment enables the circuit board to be slimmed down, and further enables the semiconductor package and electronic device to be slimmed down.

[0039] Furthermore, the embodiment can reduce the weight of the circuit board due to the slimming of the circuit board. Through this, the embodiment can resolve reliability issues that occur when the circuit board is dropped. For example, when the circuit board is dropped, physical reliability issues of the circuit board increase in proportion to the weight of the circuit board. Accordingly, the embodiment enables the improvement of physical and electrical reliability in the drop test of the circuit board by achieving slimming and weight reduction of the circuit board.

[0040] In addition, the circuit board of the embodiment may have a two-layer structure based on the number of insulating layers. The circuit board may include a first electrode portion disposed on the upper surface of the first insulating layer, a second electrode portion disposed between the first insulating layer and the second insulating layer, a third electrode portion disposed on the lower surface of the second insulating layer, a first penetrating electrode penetrating the first insulating layer, a second penetrating electrode penetrating the second insulating layer, a first protective layer disposed on the upper surface of the first insulating layer, and a second protective layer disposed on the lower surface of the second insulating layer.

[0041] And the ratio of the thickness of the circuit board to the first insulating layer or the second insulating layer of the circuit board may have a range of 1:3 to 1:10.5, preferably 1:4 to 1:10, and more preferably 1:5 to 1:7. In addition, the ratio of the thickness of the circuit board to the first electrode portion or the third electrode portion of the circuit board may have a range of 1:3 to 1:10.5, preferably 1:4 to 1:10, and more preferably 1:5 to 1:7. In addition, the ratio of the thickness of the circuit board to the second electrode portion of the circuit board may have a range of 1:6 to 1:21, preferably 1:8 to 1:20, and more preferably 1:10 to 1:14. In addition, the ratio of the thickness of the circuit board to the first through-electrode or the second through-electrode of the circuit board may range from 1:3 to 1:10.5, preferably from 1:4 to 1:10, and more preferably from 1:5 to 1:8. In addition, the ratio of the thickness of the circuit board to the first protective layer or the second protective layer of the circuit board may range from 1:3 to 1:10.5, preferably from 1:4 to 1:10, and more preferably from 1:5 to 1:5.

[0042] At this time, the thickness of the circuit board may be 51㎛ to 79㎛.

[0043] That is, the second embodiment can provide a circuit board with a thickness of 79 μm or less, while the ratio of the thickness of the circuit board to at least one of the first insulating layer, the second insulating layer, the first electrode portion, the second electrode portion, the first through electrode, the second through electrode, the first protective layer, and the second protective layer is 1:3 to 1:10.5.

[0044] Accordingly, the embodiment enables the circuit board to be slimmed down, and further enables the semiconductor package and electronic device to be slimmed down.

[0045] Meanwhile, the circuit board of the embodiment can improve electrical reliability and physical characteristics. Specifically, the circuit board of the embodiment includes an insulating member disposed on the lower surface of the second protective layer until a semiconductor device is mounted. The insulating member includes a support member and an adhesive member disposed on the support member and in contact with the second protective layer of the circuit board. At this time, the adhesive member is removed as the manufacturing of the semiconductor package is completed while it is bonded to the second protective layer. Accordingly, at least a portion of the adhesive material constituting the adhesive member may remain on the lower surface of the second protective layer of the circuit board. The remaining adhesive material may come into contact with a second connection portion disposed on the circuit board or with the main board of an electronic device. Through this, the embodiment can improve the bonding strength between the circuit board and the second connection portion, and furthermore, the bonding strength with the main board, by utilizing the remaining adhesive material. Brief explanation of the drawing

[0046] FIG. 1 is a cross-sectional view showing a circuit board according to a first embodiment. Figure 2 is a cross-sectional view showing an example of a modified circuit board of Figure 1. Figure 3 is a plan view of the circuit board of Figure 1 viewed from the bottom. Figure 4 is a drawing for explaining the layer structure of the insulating member of Figure 2. Figure 5 is a diagram for comparing the bending characteristics of a circuit board of a comparative example and a circuit board of an embodiment. FIG. 6 is a cross-sectional view showing a circuit board according to a second embodiment. FIG. 7 is a cross-sectional view showing a semiconductor package according to an embodiment. FIGS. 8 to 18 are cross-sectional views for explaining a method for manufacturing a circuit board according to an embodiment in process order. Specific details for implementing the invention

[0047] Hereinafter, embodiments disclosed in this specification will be described in detail with reference to the attached drawings. Identical or similar components regardless of drawing symbols are assigned the same reference number, and redundant descriptions thereof will be omitted. The suffixes "module" and "part" for components used in the following description are assigned or used interchangeably solely for the ease of drafting the specification and do not inherently possess distinct meanings or roles. Furthermore, in describing the embodiments disclosed in this specification, if it is determined that a detailed description of related prior art could obscure the essence of the embodiments disclosed in this specification, such detailed description will be omitted. Additionally, the attached drawings are intended only to facilitate easy understanding of the embodiments disclosed in this specification; the technical concept disclosed in this specification is not limited by the attached drawings and should be understood to include all modifications, equivalents, and substitutions that fall within the spirit and technical scope of the present invention.

[0048] Terms including ordinal numbers, such as first, second, etc., may be used to describe various components, but said components are not limited by said terms. These terms are used solely for the purpose of distinguishing one component from another.

[0049] When it is stated that one component is "connected" or "connected" to another component, it should be understood that while it may be directly connected or connected to that other component, there may also be other components in between. On the other hand, when it is stated that one component is "directly connected" or "directly connected" to another component, it should be understood that there are no other components in between.

[0050] Singular expressions include plural expressions unless the context clearly indicates otherwise.

[0051] In this application, terms such as “comprising” or “having” are intended to specify the existence of the features, numbers, steps, actions, components, parts, or combinations thereof described in the specification, and should be understood as not precluding the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.

[0052] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings.

[0054] -former device -

[0055] Before describing the embodiment, a semiconductor package having a structure in which a semiconductor element is mounted on a circuit board of the embodiment can be applied to an electronic device.

[0056] At this time, the electronic device includes a main board (not shown). The main board may be physically and / or electrically connected to various components. For example, the main board may be connected to a semiconductor package of the embodiment.

[0057] Various semiconductor devices can be mounted on the above semiconductor package.

[0058] For example, the semiconductor package may be equipped with memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory, application processor chips such as a central processor (e.g., CPU), a graphics processor (e.g., GPU), a digital signal processor, an encryption processor, a microprocessor, and a microcontroller, and logic chips such as an analog-to-digital converter and an ASIC (application-specific IC).

[0059] In addition, in the embodiment, at least one semiconductor device can be mounted on a single substrate while reducing the thickness of the circuit board connected to the main board of the electronic device and the semiconductor package including the same.

[0060] Meanwhile, the above electronic device may be a smartphone, personal digital assistant, digital video camera, digital still camera, network system, computer, monitor, tablet, laptop, netbook, television, video game, smart watch, automotive, etc. However, it is not limited to these, and it is obvious that it may be any other electronic device that processes data in addition to these.

[0062] Hereinafter, a circuit board according to an embodiment and a semiconductor package including the same will be described.

[0064] - Circuit board -

[0065] FIG. 1 is a cross-sectional view showing a circuit board according to a first embodiment, FIG. 2 is a cross-sectional view showing a modified example of the circuit board of FIG. 1, FIG. 3 is a plan view of the circuit board of FIG. 1 viewed from below, FIG. 4 is a drawing for explaining the layer structure of an insulating member of FIG. 2, and FIG. 5 is a drawing for comparing the bending characteristics of a circuit board of a comparative example and a circuit board of an embodiment.

[0066] Hereinafter, a circuit board according to the first embodiment will be described in detail with reference to FIGS. 1 to 5.

[0067] The circuit board of the embodiment may provide a mounting space for mounting at least one semiconductor device. For example, the circuit board of the embodiment may provide one mounting space for mounting one semiconductor device. Alternatively, the circuit board of the embodiment may provide two or more mounting spaces for mounting two or more semiconductor devices.

[0068] At this time, the semiconductor device may be a processor chip. At this time, if the circuit board provides mounting spaces for mounting two or more semiconductor devices, the two mounting spaces may refer to spaces for mounting two processor chips that perform different functions. However, the embodiments are not limited thereto. For example, if the circuit board of the embodiment provides mounting spaces for mounting two or more semiconductor devices, one of the mounting spaces may be a space for mounting a processor chip, and the other mounting space may be a space for mounting a memory chip.

[0069] The circuit board of the first embodiment may include an insulating layer (110).

[0070] At this time, the circuit board of the first embodiment may include one insulating layer (110).

[0071] The insulating layer (110) may include prepreg (PPG). The prepreg may be formed by impregnating a fiber layer in the form of a fabric sheet, such as a glass fabric woven with glass fiber yarn, with epoxy resin or the like, and then performing heat pressing. However, the embodiments are not limited thereto, and the prepreg constituting the insulating layer (110) may include a fiber layer in the form of a fabric sheet woven with carbon fiber yarn.

[0072] The insulating layer (110) may include a resin and reinforcing fibers disposed within the resin. The resin may be an epoxy resin, but is not limited thereto. The resin is not specifically limited to an epoxy resin; for example, it may contain one or more epoxy groups within the molecule, or two or more epoxy groups, or four or more epoxy groups. Additionally, the resin of the insulating layer (110) may contain naphthalene groups, and for example, may be of the aromatic amine type, but is not limited thereto. For example, the resin may include bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol S type epoxy resin, phenol novolak type epoxy resin, alkylphenol novolak type epoxy resin, biphenyl type epoxy resin, aralkyl type epoxy resin, dicyclopentadiene type epoxy resin, naphthalene type epoxy resin, naphthol type epoxy resin, epoxy resin of a condensation product of phenols and an aromatic aldehyde having a phenolic hydroxyl group, biphenylaralkyl type epoxy resin, fluorene type epoxy resin, xanthene type epoxy resin, triglycidyl isocyanurate, rubber-modified epoxy resin, and phosphorus-based epoxy resin, and may include naphthalene-based epoxy resin, bisphenol A type epoxy resin, phenol novolak epoxy resin, cresol novolak epoxy resin, rubber-modified epoxy resin, and phosphorus-based epoxy resin. In addition, the reinforcing fibers may be glass fibers, carbon fibers, aramid fibers (e.g., aramid-based organic materials), nylon, silica-based inorganic materials, or titania-based inorganic materials. The reinforcing fibers may be arranged within the resin in a planar direction, intersecting each other.

[0073] Meanwhile, the above glass fiber, carbon fiber, aramid fiber (e.g., aramid-based organic material), nylon, silica-based inorganic material, or titania-based inorganic material may be used.

[0074] However, the embodiments are not limited thereto, and the insulating layer (110) may include other insulating materials.

[0075] For example, the insulating layer (110) may be rigid or flexible. For example, the insulating layer (110) may include glass or plastic. Specifically, the insulating layer (110) may include chemically strengthened / semi-strengthened glass such as soda lime glass or aluminosilicate glass, or strengthened or flexible plastic such as polyimide (PI), polyethylene terephthalate (PET), propylene glycol (PPG) polycarbonate (PC), or sapphire. For example, the insulating layer (110) may include an optically isotropic film. For example, the insulating layer (110) may include COC (Cyclic Olefin Copolymer), COP (Cyclic Olefin Polymer), photoisotropic polycarbonate (PC), or photoisotropic polymethyl methacrylate (PMMA). For example, the insulating layer (110) may be formed from a material including an inorganic filler and an insulating resin. For example, the insulating layer (110) may be a resin containing reinforcing materials such as inorganic fillers such as silica and alumina, along with a thermosetting resin such as epoxy resin and a thermoplastic resin such as polyimide. Specifically, ABF (Ajinomoto Build-up Film), FR-4, BT (Bismaleimide Triazine), PID (Photo Imagable Dielectric Resin), BT, etc., may be used.

[0076] The circuit board of the first embodiment may have a one-layer structure based on the number of layers of the insulating layer (110). Accordingly, the circuit board of the first embodiment may have a two-layer structure based on the number of layers of the electrode portions (120, 130) disposed on the surface of the insulating layer (110).

[0077] The thickness (T1) of the insulating layer (110) may satisfy a range of 8 µm to 12 µm. Preferably, the thickness (T1) of the insulating layer (110) may satisfy a range of 8.5 µm to 11.5 µm. More preferably, the thickness (T1) of the insulating layer (110) may satisfy a range of 9 µm to 11 µm.

[0078] If the thickness (T1) of the insulating layer (110) is less than 8 μm, the first electrode portion (120) and / or the second electrode portion (130) included in the circuit board of the first embodiment may not be stably protected. And if the first electrode portion (120) and / or the second electrode portion (130) are not stably protected, a reliability problem may occur in which a crack occurs in the first electrode portion (120) and / or the second electrode portion (130), or the first electrode portion (120) and / or the second electrode portion (130) separates from the insulating layer (110). In addition, if the thickness (T1) of the insulating layer (110) exceeds 12 μm, the thickness (T) of the circuit board may increase. In addition, if the thickness (T) of the circuit board increases, the thickness of the semiconductor package and the thickness of the electronic device including the semiconductor package may increase.

[0079] Meanwhile, the thickness (T1) of the insulating layer (110) may represent the vertical distance between adjacent electrode portions in the thickness direction. For example, the thickness (T1) of the insulating layer (110) may represent the vertical distance from the lower surface of the first electrode portion (120) to the upper surface of the second electrode portion (130).

[0080] Specifically, the thickness (T1) of the insulating layer (110) may refer to the thickness of the penetrating electrode (140). That is, the penetrating electrode (140) penetrates the insulating layer (110). Furthermore, the penetrating electrode (140) electrically connects the lower surface of the first electrode part (120) and the upper surface of the second electrode part (130). Accordingly, the thickness of the penetrating electrode (140) may correspond to the thickness (T1) of the insulating layer (110). Also, the thickness (T1) of the insulating layer (110) may refer to the thickness of the penetrating electrode (140).

[0081] An electrode portion may be disposed on the surface of the insulating layer (110).

[0082] For example, a first electrode portion (120) may be disposed on the upper surface of the insulating layer (110). For example, a second electrode portion (130) may be disposed on the lower surface of the insulating layer (110).

[0083] At this time, the circuit board of the first embodiment can be manufactured using the ETS (Embedded Trace Substrate) method. Accordingly, either of the first electrode portion (120) and the second electrode portion (130) can be placed in a recess (not shown) formed on the surface of the insulating layer (110). Hereinafter, the first electrode portion (120) will be described as being placed in a recess (not shown) formed on the upper surface of the insulating layer (110).

[0084] However, the embodiments are not limited thereto, and the recess may be formed on the lower surface of the insulating layer (110), and the second electrode portion (130) may be disposed within the recess formed on the lower surface of the insulating layer (110). In addition, when the recess is formed on the lower surface of the insulating layer (110), the first electrode portion (120) may be disposed protruding above the upper surface of the insulating layer (110).

[0085] The lower surface of the first electrode portion (120) may be positioned lower than the upper surface of the insulating layer (110). For example, the lower surface of the first electrode portion (120) may be positioned lower than the upper surface of the insulating layer (110) by the depth of the recess.

[0086] Accordingly, at least a portion of the side of the first electrode portion (120) may be covered by the insulating layer (110). In this case, although the drawing shows the side of the first electrode portion (120) being entirely covered by the insulating layer (110), it is not limited thereto. For example, depending on the manufacturing method, at least a portion of the side of the first electrode portion (120) may be positioned higher than the upper surface of the insulating layer (110), and accordingly, at least a portion of the side of the first electrode portion (120) may not be covered by the insulating layer (110).

[0087] However, the circuit board of the first embodiment is manufactured using the ETS method, and accordingly, the side of the first electrode portion (120) can be entirely covered with the insulating layer (110).

[0088] At this time, although the drawing shows the upper surface of the first electrode portion (120) being placed on the same plane as the upper surface of the insulating layer (110), it is not limited thereto. For example, in the removal process of the seed layer (not shown) included in the manufacturing process of the circuit board of the first embodiment, at least a portion of the first electrode portion (120) may also be removed. Accordingly, the upper surface of the first electrode portion (120) may be positioned lower than the upper surface of the insulating layer (110). For example, the upper surface of the first electrode portion (120) and the upper surface of the insulating layer (110) may have a step difference.

[0089] The second electrode portion (130) can be placed on the lower surface of the insulating layer (110).

[0090] The second electrode portion (130) may protrude below the lower surface of the insulating layer (110). That is, when manufacturing a circuit board using the ETS method, one of the electrode portions positioned at the uppermost and lowermost sides of the circuit board may have a structure in which it is positioned within a recess of the insulating layer (110), and the other may have a structure in which it protrudes over the surface of the insulating layer (110).

[0091] The first electrode portion (120) and the second electrode portion (130) may include pads and traces depending on their function. The pads may include mounting pads on which semiconductor devices are mounted and terminal pads connected to an external substrate. Additionally, the traces may refer to thin signal lines that electrically connect multiple pads and have a width relatively smaller than that of the pads.

[0092] The first electrode part (120) and the second electrode part (130) may include a conductive material.

[0093] For example, the first electrode part (120) and the second electrode part (130) may include at least one metal material selected from gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu) and zinc (Zn).

[0094] Additionally, the first electrode portion (120) and the second electrode portion (130) may be formed from a paste or solder paste comprising at least one metal material selected from gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu), and zinc (Zn), which has excellent bonding strength.

[0095] The thickness (T2) of the first electrode portion (120) may have a range of 8 µm to 12 µm. Preferably, the thickness (T2) of the first electrode portion (120) may have a range of 8.5 µm to 11.5 µm. More preferably, the thickness (T2) of the first electrode portion (120) may have a range of 9 µm to 11 µm.

[0096] Correspondingly, the thickness (T3) of the second electrode portion (130) may have a range of 8 µm to 12 µm. Preferably, the thickness (T3) of the second electrode portion (130) may have a range of 8.5 µm to 11.5 µm. More preferably, the thickness (T3) of the second electrode portion (130) may have a range of 9 µm to 11 µm.

[0097] If at least one of the thicknesses (T2, T3) of the first electrode portion (120) and / or the second electrode portion (130) is less than 8 μm, the allowable current of the signal transmitted through the first electrode portion (120) and / or the second electrode portion (130) may be reduced. That is, the first electrode portion (120) and the second electrode portion (130) of the first embodiment are outermost electrode portions disposed on the outer layer of a circuit board. The outermost electrode portion is connected to a semiconductor device or to the main board of an electronic device. At this time, if the allowable current of the outermost electrode portion is reduced, the operating characteristics of the semiconductor device or the communication characteristics with the electronic device may be degraded accordingly.

[0098] Additionally, if at least one of the thicknesses (T2, T3) of the first electrode portion (120) and / or the second electrode portion (130) exceeds 12 μm, the thickness of the circuit board and the semiconductor package including it may increase. Additionally, if at least one of the thicknesses (T2, T3) of the first electrode portion (120) and / or the second electrode portion (130) exceeds 12 μm, the line width of the first electrode portion (120) and / or the second electrode portion (130) may increase. And when the line width increases, the circuit integration density decreases, and thereby the overall size of the circuit board may increase.

[0099] The circuit board of the first embodiment includes a through electrode (140). The through electrode (140) may also be referred to as a 'via' that penetrates the insulating layer (110). That is, the insulating layer (110) includes an upper surface and a lower surface opposite to the upper surface. And, the through electrode (140) penetrates the upper surface and the lower surface of the insulating layer (110).

[0100] The through electrode (140) can electrically connect electrode portions disposed in different layers. For example, the through electrode (140) can electrically connect between the first electrode portion (120) and the second electrode portion (130). The upper surface of the through electrode (140) can come into contact with the lower surface of the first electrode portion (120). The lower surface of the through electrode (140) can come into contact with the upper surface of the second electrode portion (130).

[0101] The above-mentioned penetrating electrode (140) can be formed by filling the inside of a penetrating hole (not shown) penetrating the insulating layer (110) with a conductive material.

[0102] The through hole may be formed by any one of a processing process, a mechanical process, a laser process, and a chemical process. When the through hole is formed by a mechanical process, milling, drilling, and routing may be used. Additionally, when the through hole is formed by a laser process, a UV or CO2 laser may be used. Additionally, when the through hole is formed by a chemical process, chemicals such as aminosilanes or ketones may be used.

[0103] Preferably, the through hole can be formed through a laser process. The laser process can be carried out by focusing optical energy on the surface of the insulating layer (110). The laser process can easily process complex shapes by a computer program and can easily process composite materials that are difficult to process with other processes. In addition, the laser processor has the advantage of being able to form through holes with a diameter of up to 0.005 mm and a wide range of processable thicknesses.

[0104] The above laser process can be carried out using a YAG (Yttrium Aluminum Garnet) laser, a CO2 laser, or an ultraviolet (UV) laser. The YAG laser is capable of processing both the copper foil layer and the insulating layer, while the CO2 laser is capable of processing only the insulating layer.

[0105] The through electrode (140) can be formed by filling a through hole formed in the insulating layer (110) with a conductive material. The metal material forming the through electrode (140) may be any one material selected from copper (Cu), silver (Ag), tin (Sn), gold (Au), nickel (Ni), and palladium (Pd). Additionally, the conductive material may be filled using any one or a combination of electroless plating, electroplating, screen printing, sputtering, evaporation, inkjetting, and dispensing.

[0106] The thickness of the through electrode (140) may correspond to the thickness (T1) of the insulating layer (110). For example, the thickness of the through electrode (140) may have a range of 8 μm to 12 μm. Preferably, the thickness of the through electrode (140) may have a range of 8.5 μm to 11.5 μm. More preferably, the thickness of the through electrode (140) may have a range of 9 μm to 11 μm.

[0107] The circuit board of the first embodiment includes a protective layer. The protective layer may be disposed on an insulating layer (110). The protective layer may also be another insulating layer of the circuit board. For example, the protective layer may be an insulating layer disposed on the uppermost and / or lowermost side of the circuit board. For example, the first protective layer (150) described below may be referred to as a "second insulating layer" disposed on the upper surface of the insulating layer (110). Additionally, the second protective layer (160) described below may be referred to as a "third insulating layer" disposed on the lower surface of the insulating layer (110). For convenience of explanation, the "second insulating layer" will be referred to as the first protective layer (150) and the "third insulating layer" as the second protective layer (160).

[0109] For example, the circuit board may include a first protective layer (150) disposed on the upper surface of the insulating layer (110). Additionally, the circuit board may include a second protective layer (160) disposed on the lower surface of the insulating layer (110).

[0110] The first protective layer (150) may be disposed to cover the upper surface of the insulating layer (110) and the upper surface of the first electrode portion (120). Additionally, the first protective layer (150) may include an opening (not shown) that overlaps in the thickness direction or vertical direction with the upper surface of the first electrode portion (120). For example, the first protective layer (150) may include an opening (not shown) that overlaps in the thickness direction or vertical direction with the upper surface of a first electrode pattern mounted on a semiconductor device or an external substrate among a plurality of first electrode patterns of the first electrode portion (120). The width of the opening of the first protective layer (150) may be smaller than the width of the first electrode pattern. Accordingly, at least a portion of the upper surface of the first electrode pattern may be covered by the first protective layer (150), and at least the remaining portion may overlap in the vertical direction or thickness direction with the opening of the first protective layer (150). However, the embodiments are not limited thereto. For example, the width of the opening of the first protective layer (150) may be larger than the width of the first electrode pattern, and accordingly, the upper surface of the first electrode pattern may overlap with the opening of the first protective layer (150) in the thickness direction without being entirely covered by the first protective layer (150).

[0111] The second protective layer (160) may be disposed to cover the lower surface of the insulating layer (110) and the lower surface of the second electrode part (130). Additionally, the second protective layer (160) may include an opening that overlaps in the thickness direction or vertical direction with the lower surface of the second electrode part (130). For example, the second protective layer (160) may include an opening that overlaps in the thickness direction or vertical direction with the lower surface of a second electrode pattern connected to a main board, an external substrate, or a semiconductor element among a plurality of second electrode patterns of the second electrode part (130). The width of the opening of the second protective layer (160) may be smaller than the width of the second electrode pattern. Accordingly, at least a portion of the upper surface of the second electrode pattern may be covered by the second protective layer (160), and at least the remaining portion may overlap in the vertical direction or thickness direction with the opening of the second protective layer (160). However, the embodiments are not limited thereto. For example, the width of the opening of the second protective layer (160) may be larger than the width of the second electrode pattern, and accordingly, the upper surface of the second electrode pattern may overlap with the opening of the second protective layer (160) in the thickness direction without being entirely covered by the second protective layer (160).

[0112] The first protective layer (150) and the second protective layer (160) may include an insulating material. Accordingly, the first protective layer (150) and the second protective layer (160) may also be described as insulating members disposed at the uppermost and lowermost sides, respectively, of the circuit board. The first protective layer (150) and the second protective layer (160) may include various insulating materials that can be cured after being applied to the insulating layer (110). For example, the first protective layer (150) and the second protective layer (160) may be resist layers. For example, the first protective layer (150) and the second protective layer (160) may be solder resist layers containing organic polymer materials. As an example, the first protective layer (150) and the second protective layer (160) may include an epoxy acrylate-based resin. Specifically, the first protective layer (150) and the second protective layer (160) may include a resin, a curing agent, a photoinitiator, a pigment, a solvent, a filler, an additive, an acrylic monomer, etc. The first protective layer (150) and the second protective layer (160) may include at least one of a photo solder resist layer, a coverlay, and a polymer material.

[0113] The thickness (T4) of the first protective layer (150) may satisfy a range of 8 µm to 12 µm. Preferably, the thickness (T4) of the first protective layer (150) may satisfy a range of 8.5 µm to 11.5 µm. More preferably, the thickness (T4) of the first protective layer (150) may satisfy a range of 9 µm to 11 µm.

[0114] If the thickness (T4) of the first protective layer (150) is less than 8㎛, the upper surface of the insulating layer (110) or the upper surface of the first electrode portion (120) may not be stably protected. Additionally, if the thickness (T4) of the first protective layer (150) exceeds 12㎛, the thickness (T) of the circuit board and the thickness of the semiconductor package may increase.

[0115] Additionally, the thickness (T5) of the second protective layer (160) may satisfy a range of 8 µm to 12 µm. Preferably, the thickness (T5) of the second protective layer (160) may satisfy a range of 8.5 µm to 11.5 µm. More preferably, the thickness (T5) of the second protective layer (160) may satisfy a range of 9 µm to 11 µm.

[0116] If the thickness (T5) of the second protective layer (160) is less than 8㎛, the lower surface of the insulating layer (110) or the lower surface of the second electrode part (130) may not be stably protected. Additionally, if the thickness (T5) of the second protective layer (160) exceeds 12㎛, the thickness (T) of the circuit board and the thickness of the semiconductor package may increase.

[0117] Meanwhile, the thickness (T) of the circuit board of the first embodiment may satisfy a range of 40 μm to 60 μm. Preferably, the thickness (T) of the circuit board of the first embodiment may satisfy a range of 42.5 μm to 57.5 μm. More preferably, the range of 45 μm to 55 μm of the first embodiment may satisfy.

[0118] At this time, the thickness of the circuit board in the comparative example exceeded 150 μm. For example, the thickness of the circuit board in the comparative example exceeded 130 μm. For example, the thickness of the circuit board in the comparative example exceeded 100 μm. That is, if the thickness of the circuit board is less than 100 μm, the rigidity of the circuit board weakens and the bending characteristics deteriorate. Furthermore, if the rigidity of the circuit board weakens and the bending characteristics deteriorate, the processability of the process of mounting semiconductor devices on the circuit board may be reduced. For example, if bending of the circuit board occurs during the process of mounting semiconductor devices, a problem may arise where the semiconductor devices cannot be mounted in the correct position. In addition, cracks may occur in the connection part (e.g., solder) connecting the semiconductor devices and the electrode parts, and this may cause problems with physical reliability or electrical reliability.

[0119] In contrast, the thickness (T) of the circuit board in the first embodiment has a range of 40 μm to 60 μm, further a range of 42.5 μm to 57.5 μm, and further a range of 45 μm to 55 μm. In the first embodiment, even if the thickness (T) of the circuit board has the range described above, rigidity can be secured without a decrease in the bending characteristics of the circuit board. Accordingly, in the embodiment, even if the circuit board has an ultra-slim thickness, the process of mounting the semiconductor device can be carried out stably and reliably.

[0120] We will explain in detail why the circuit board of the embodiment has improved bending characteristics and secured rigidity even when it has an ultra-slim thickness, and thus no problems arise in the processability of semiconductor device mounting.

[0121] The circuit board of the embodiment may further include an insulating member (200). The insulating member (200) may be attached to one side of the circuit board until a semiconductor device is mounted on the circuit board. The insulating member (200) can impart a certain level of rigidity to the circuit board while improving the bending characteristics of the circuit board.

[0122] The insulating member (200) may be composed of a plurality of layers.

[0123] For example, the insulating member (200) may include a supporting member (210) and an adhesive member (220).

[0124] The support member (210) may include an insulating material. For example, the support member (210) may be an insulating layer. As an example, the support member (210) may be an insulating layer containing glass fibers. Specifically, the support member (210) may be a prepreg in which glass fibers and fillers are arranged within an epoxy resin. Alternatively, the support member (210) may not include glass fibers. For example, the support member (210) may include an insulating layer in which fillers are dispersed within a resin. For example, the support member (210) may be polyimide. However, the embodiments are not limited thereto, and the support member (210) may be composed of other insulating materials having insulating properties while having a certain level of rigidity.

[0125] The support member (210) may have a thickness in the range of 35 μm to 65 μm. Preferably, the support member (210) may have a thickness in the range of 40 μm to 60 μm. More preferably, the support member (210) may have a thickness in the range of 45 μm to 55 μm.

[0126] If the thickness of the support member (210) is less than 35 μm, the bending characteristics of the circuit board of the embodiment may be reduced or the rigidity may be weakened. In addition, if the bending characteristics of the circuit board are reduced or the rigidity is weakened, the processability in the mounting process of the semiconductor device may be reduced.

[0127] In addition, if the thickness of the support member (210) exceeds 65㎛, the manufacturing cost of the circuit board may increase. That is, the support member (210) is a component used in the manufacturing process of the circuit board and is a component that is removed in the final product, the semiconductor package. At this time, if the thickness of the support member (210) exceeds 65㎛, the unit cost of the support member (210) may increase, and the manufacturing cost of the circuit board and the semiconductor package may increase accordingly. Accordingly, in the embodiment, the thickness of the support member (210) is made to satisfy the range of 35㎛ to 65㎛.

[0128] The insulating member (200) may include an adhesive member (220) disposed on the supporting member (210).

[0129] The adhesive member (220) may be disposed on one side of the support member (210). Preferably, the adhesive member (220) may be disposed on the upper side of the support member (210).

[0130] The adhesive member (220) may include an adhesive material. For example, the adhesive member (220) may provide an adhesive force for attaching the insulating layer (110) to the circuit board.

[0131] An insulating member (200) comprising a support member (210) and an adhesive member (220) as described above may be attached to one side of the circuit board. For example, the insulating member (200) may be positioned at the uppermost or lowermost side of the circuit board. Preferably, the insulating member (200) may be positioned on a protective layer of the circuit board.

[0132] At this time, the insulating member (200) is the part that remains until the end during the manufacture of the circuit board. And, the insulating member (200) can be removed after a semiconductor device is mounted on the circuit board.

[0133] Accordingly, the insulating member (200) may be disposed in an area opposite to the region where a semiconductor device is mounted on the circuit board. Preferably, the insulating member (200) may be disposed on a second electrode portion (130) that has a protruding structure and is disposed on an insulating layer (110) on the circuit board. More preferably, the insulating member (200) may be disposed on the lower surface of a second protective layer (160) that covers at least a portion of the lower surface of the second electrode portion (130) on the circuit board.

[0134] That is, in the embodiment, a plurality of insulating members are used in the process of manufacturing a circuit board using the ETS method. For example, the ETS method manufactures a circuit board using a core member (not shown). Specifically, in the ETS method, a plurality of circuit boards can be manufactured simultaneously on both sides of the core member with the core member in between.

[0135] And, the core member is removed after the plurality of circuit boards are manufactured.

[0136] In this embodiment, the insulating member (200) is attached to the circuit board manufactured on both sides of the core member before the core member is removed. Furthermore, the insulating member (200) can provide a certain level of rigidity to the circuit board even after the core member is removed, and can further improve the bending characteristics of the circuit board.

[0137] Accordingly, in the embodiment, even after the core member is removed, the bending characteristics of the circuit board are improved, and it can have a rigidity of a certain level or higher.

[0138] Accordingly, the insulating member (200) may be positioned on the lower side of the second electrode part (130) positioned on the opposite side, rather than on the upper side of the first electrode part (120) embedded in the insulating layer (110), in a circuit board manufactured by the ETS method.

[0139] Meanwhile, referring to FIG. 3, in the semiconductor package of the embodiment, the insulating member (200) can be removed after a semiconductor device is mounted on the first electrode pattern of the first electrode portion (120) of the circuit board.

[0140] And, as the insulating member (200) is removed from the lower surface of the second protective layer (160), a portion of the insulating member (200) may remain.

[0141] For example, a portion of the resin constituting the adhesive member (220) constituting the insulating member (200) may remain on the lower surface of the second protective layer (160). Specifically, the adhesive material (170) of the adhesive member (220) of the insulating member (200) may remain on the lower surface of the second protective layer (160).

[0142] Specifically, the circuit board of the first embodiment includes a first protective layer (150) and a second protective layer (160).

[0143] And the first protective layer (150) and the second protective layer (160) are layers respectively disposed on the uppermost and lowermost sides of the circuit board. At this time, the first protective layer (150) and the second protective layer (160) may be composed of the same insulating material.

[0144] For example, the surface analysis result of the upper surface of the first protective layer (150) may differ from the surface analysis result of the lower surface of the second protective layer (160). Specifically, the element concentration or content on the upper surface of the first protective layer (150) may differ from the element concentration or content on the lower surface of the second protective layer (160). More specifically, the lower surface of the second protective layer (160) may contain elements that are not included on the upper surface of the first protective layer (150). For example, the concentration or content of elements on the lower surface of the second protective layer (160) may differ from the concentration or content of elements on the upper surface of the first protective layer (150).

[0145] This is because, after the insulating member (200) is attached to the lower surface of the second protective layer (160) and then removed, at least a portion of the adhesive material (170) constituting the adhesive member (220) of the insulating member (200) may remain on the lower surface of the second protective layer (160) during the process of removing the insulating member (200).

[0146] Furthermore, the adhesive material (170) remaining on the lower surface of the second protective layer (160) can provide bonding strength during the process of attaching the semiconductor package to an electronic device. For example, the semiconductor package has a structure in which a semiconductor element is mounted on the circuit board. Then, the semiconductor package with the mounted semiconductor element is coupled to the main board of the electronic device. At this time, the adhesive material (170) remaining on the lower surface of the second protective layer (160) can provide bonding strength between the semiconductor package and the main board of the electronic device. Accordingly, in the embodiment, the bonding strength between the semiconductor package and the electronic device can be further improved.

[0147] Furthermore, the adhesive material remaining on the lower surface of the second protective layer (160) can function to further improve the physical properties of the semiconductor package.

[0148] For example, as will be explained later, the semiconductor package includes a second connection portion (440) disposed on the lower surface of the second electrode pattern of the second electrode portion (130) which overlaps the opening of the second protective layer (160) in the thickness direction. The second connection portion (440) can provide bonding force between the semiconductor package and the main board of the electronic device.

[0149] At this time, at least a portion of the adhesive material (170) remaining on the lower surface of the second protective layer (160) may come into contact with the second connection portion (440, see FIG. 7) of the semiconductor package. Additionally, the adhesive material (170) may function to improve the bonding strength between the second connection portion (440) and the circuit board.

[0150] Accordingly, the embodiment can improve the bonding strength between the circuit board and the second connection part (440) by utilizing the adhesive material (170) remaining on the lower surface of the second protective layer (160). Accordingly, the embodiment can solve the physical reliability problem of the second connection part (440) separating from the circuit board. In addition, the embodiment can solve the electrical characteristic problem between the second electrode pattern of the second electrode part (130) or the electrical characteristic problem between the second connection part (440) and the main board of the electronic device caused by the bonding strength problem of the second connection part (440).

[0151] Meanwhile, referring to FIG. 4, the insulating member (200) in the embodiment may further include additional layers other than the supporting member (210) and adhesive member (220) in FIG. 2.

[0152] For example, referring to FIG. 4(a), the insulating member (200) may further include a metal layer (230a). In this case, the metal layer (230a) may be placed between the insulating member (200) and the adhesive member (220).

[0153] Specifically, the insulating member (200) includes a supporting member (210). The supporting member (210) may include an upper surface and a lower surface opposite to the upper surface. At this time, at least one of the upper surface and the lower surface of the supporting member (210) may be rough. For example, at least one of the upper surface and the lower surface of the supporting member (210) may be given a roughness of a certain level or higher. Preferably, the surface in contact with the adhesive member (220) among the upper surface and the lower surface of the supporting member (210) may be given a roughness of a certain level or higher. And the adhesive member (220) may be placed on the surface of the supporting member (210) that has the roughness. Accordingly, in the embodiment, the bonding strength between the adhesive member (220) and the supporting member (210) can be improved.

[0154] At this time, the adhesive member (220) may include an upper surface and a lower surface opposite to the upper surface. At this time, the upper surface of the adhesive member (220) may be a surface that contacts the lower surface of the second protective layer (160) of the circuit board. Additionally, the lower surface of the adhesive member (220) may be a surface that contacts the upper surface of the support member (210) of the insulating member (200).

[0155] At this time, the upper surface of the adhesive member (220) may be flat.

[0156] The surface roughness of the upper surface of the adhesive member (220) may be smaller than the surface roughness of the upper surface of the support member (210). For example, the surface roughness of the upper surface of the adhesive member (220) may be 80% or less of the surface roughness of the upper surface of the support member (210). Preferably, the surface roughness of the upper surface of the adhesive member (220) may be 60% or less of the surface roughness of the upper surface of the support member (210). More preferably, the surface roughness of the upper surface of the adhesive member (220) may be 40% or less of the surface roughness of the upper surface of the support member (210).

[0157] Through this, the embodiment enables easy removal of the insulating member (200) from the semiconductor package after the manufacturing process of the semiconductor package is completed.

[0158] Specifically, the bonding force between the support member (210) and the adhesive member (220) of the embodiment is greater than the bonding force between the second protective layer (160) of the circuit board and the adhesive member (220). Through this, the embodiment can facilitate separation between the second protective layer (160) and the adhesive member (220) during the process of removing the insulating member (200).

[0159] Additionally, the insulating member (200) includes a first metal layer (230a) disposed on the upper surface of the supporting member (210). Additionally, the insulating member (200) includes an adhesive member (220) disposed on the upper surface of the first metal layer (230a). The first metal layer (230a) can improve the rigidity of the insulating member (200). Furthermore, the first metal layer (230a) can improve the bending characteristics of the circuit board bonded to the insulating member (200) while imparting a certain level of rigidity to the circuit board.

[0160] At this time, the first metal layer (230a) can be formed by electroless plating on the support member (210). In this case, when the first metal layer (230a) is formed by electroless plating, a certain level of surface roughness is provided to the upper surface of the support member (210) to improve the bonding strength between the support member (210) and the first metal layer (230a). Unlike the first metal layer (230a) being formed by electroless plating, a copper foil laminate can be used in the embodiment. For example, the insulating member (200) of the embodiment may include a support member (210) and a copper foil laminate having the first metal layer (230a) disposed on one side of the support member (210). Additionally, the adhesive member (220) may be disposed on one side of the copper foil laminate.

[0161] At this time, a roughness of a certain level or higher may be imparted to the upper surface of the first metal layer (230a). Through this, the embodiment can improve the bonding strength between the first metal layer (230a) and the adhesive member (220). Furthermore, the embodiment can make the bonding strength between the first metal layer (230a) and the adhesive member (220) greater than the bonding strength between the adhesive member (220) and the second protective layer (160) of the circuit board.

[0162] Additionally, referring to Fig. 4(b), the insulating member (200) in the embodiment may include a plurality of metal layers.

[0163] For example, in the embodiment, a double-sided copper foil laminate can be used, or a metal layer can be formed by performing electroless plating on the upper and lower surfaces of the support member (210), respectively.

[0164] Accordingly, the insulating member (200) in the embodiment includes a supporting member (210).

[0165] Furthermore, the insulating member (200) includes metal layers disposed on each side of the supporting member (210). For example, the insulating member (200) of the embodiment includes a first metal layer (230a) disposed on the upper surface of the supporting member (210). Additionally, the insulating member (200) of the embodiment may include a second metal layer (230b) disposed on the lower surface of the supporting member (210). The first metal layer (230a) and the second metal layer (230b) may be formed by performing electroless plating on the upper and lower surfaces of the supporting member (210), respectively. Alternatively, the supporting member (210), the first metal layer (230a), and the second metal layer (230b) may be double-sided copper foil laminates.

[0166] At this time, when metal layers are disposed on both sides of the support member (210), the insulating member (200) may include a cover member (240). The cover member (240) may be a layer disposed on the lowest side of the insulating member (200). Preferably, the cover member (240) may be disposed on the lower surface of the second metal layer (230b) of the insulating member (200). The cover member (240) may be a protective layer that protects the lower surface of the second metal layer (230b). For example, the cover member (240) may be a solder resist layer, but is not limited thereto. The cover member (240) may be disposed on the lower surface of the second metal layer (230b), thereby preventing the lower surface of the second metal layer (230b) from being exposed to the outside. Accordingly, the embodiment can prevent oxidation of the second metal layer (230b) by the cover member (240).

[0167] Meanwhile, the metal layer included in the insulating member (200) further improves the rigidity of the insulating member (200) and further improves the rigidity of the circuit board.

[0168] At this time, the insulating member (200) in FIG. 4 (a) has a structure in which a metal layer is disposed only on the upper surface of the supporting member (210). In addition, the insulating member (200) in FIG. 4 (b) has a structure in which a metal layer is disposed on both the upper and lower surfaces of the supporting member (210).

[0169] Alternatively, as shown in (c) of FIG. 4, the metal layer may have a structure in which it is disposed only on the lower surface of the insulating member (200). Specifically, the metal layer of the insulating member (200) of the embodiment may be disposed only on one of the upper and lower surfaces of the supporting member (210), or alternatively, it may be disposed on both surfaces.

[0170] Accordingly, the insulating member (200) of the embodiment includes a second metal layer (230b) disposed on the lower surface of the support member (210). At this time, the metal layer may not be disposed on the upper surface of the support member (210). Accordingly, the adhesive member (220) may be disposed directly on the upper surface of the support member (210). For example, the lower surface of the adhesive member (220) may come into direct contact with the upper surface of the support member (210). At this time, a certain level of roughness is imparted to the upper surface of the support member (210), thereby improving the bonding strength between the support member (210) and the adhesive member (220). By doing so, the embodiment can make the bonding strength between the support member (210) and the adhesive member (220) greater than the bonding strength between the adhesive member (220) and the second protective layer (160) of the circuit board. Through this, the embodiment can enable the adhesive member (220) to be easily separated from the second protective layer (160) during the process of removing the insulating member (200).

[0172] As described above, the embodiment proceeds with the mounting process of a semiconductor device while the insulating member (200) is attached to the circuit board. Through this, the embodiment can reduce the minimum thickness of the circuit board required for mounting the semiconductor device. Accordingly, the embodiment can slim down the thickness of the circuit board.

[0173] At this time, as will be explained in the manufacturing method of the circuit board of the embodiment, the insulating member (200) is not attached to the circuit board after the manufacturing of the circuit board is completed, but is attached during the manufacturing process of the circuit board. Accordingly, in the embodiment, the manufacturing process of the circuit board proceeds with a carrier disposed on at least one side of the circuit board. The carrier may include the core member and the insulating member (200) described above.

[0175] Through this, the embodiment can optimally set a first ratio of the thickness (T) of the circuit board to the thickness (T1) of the insulating layer (110). Additionally, the embodiment can optimally set a second ratio of the thickness (T) of the circuit board to the thickness (T2) of the first electrode portion (120). Additionally, the embodiment can optimally set a third ratio of the thickness (T) of the circuit board to the thickness (T3) of the second electrode portion (130). Additionally, the embodiment can optimally set a fourth ratio of the thickness (T) of the circuit board to the thickness of the through electrode (140). Additionally, the embodiment can optimally set a fifth ratio of the thickness (T) of the circuit board to the thickness (T4) of the first protective layer (150). Additionally, the embodiment can optimally set a sixth ratio of the thickness (T) of the circuit board to the thickness (T5) of the second protective layer (160).

[0176] At this time, the thickness (T1) of the insulating layer (110) in the first embodiment, the thickness (T2) of the first electrode part (120), the thickness (T3) of the second electrode part (130), the thickness of the through electrode (140), the thickness (T5) of the first protective layer (150), and the thickness (T6) of the second protective layer (160) are determined within the same range. Accordingly, the first to sixth ratios may be substantially the same. However, the embodiments are not limited thereto, and each of the insulating layer (110), the first electrode part (120), the second electrode part (130), the through electrode (140), the first protective layer (150), and the second protective layer (150) may have the same thickness range, but may have different thickness values ​​within the said thickness range. Accordingly, at least two of the first to sixth ratios may be different from each other.

[0177] The first ratio of the embodiment may be 1:3 to 1:10.5. The first ratio refers to the ratio of the thickness (T) of the circuit board to the thickness (T1) of the insulating layer (110). Preferably, the first ratio of the embodiment may be 1:3.3 to 1:7.5. More preferably, the first ratio of the embodiment may be 1:4 to 1:6.

[0178] Prior to the description of the present invention, the first ratio in the circuit board of the comparative example was less than 1:3 or exceeded 1:11. That is, when the number of layers of the circuit board is two or fewer, the insulating layer must have a thickness of at least a certain level to maintain the bending characteristics and secure rigidity of the circuit board. Accordingly, the first ratio of the circuit board of the comparative example was less than 1:3. That is, in the circuit board of the comparative example, the thickness of the insulating layer exceeded 66% of the thickness of the circuit board. Furthermore, in the circuit board of the comparative example, if the thickness of the insulating layer is reduced, the number of layers of the circuit board had to be increased to maintain the bending characteristics and secure rigidity of the circuit board. For example, in the circuit board of the comparative example, if the thickness of the insulating layer is reduced, the thickness of the circuit board must increase in correspondence to maintain the bending characteristics and secure rigidity. Accordingly, in the comparative example, the thickness of the circuit board exceeded 11 times the thickness of the insulating layer.

[0179] Alternatively, the embodiment manufactures a circuit board and a semiconductor package using an insulating member (200). Accordingly, the embodiment may have a first ratio of the thickness (T) of the circuit board to the thickness (T1) of the insulating layer (110) in the range of 1:3 to 1:10.5, preferably 1:3.3 to 1:7.5, and more preferably 1:4 to 1:6.

[0180] Furthermore, the second ratio of the embodiment may be 1:3 to 1:10.5. The second ratio refers to the ratio of the thickness (T) of the circuit board to the thickness (T2) of the first electrode portion (120). Preferably, the second ratio of the embodiment may be 1:3.3 to 1:7.5. More preferably, the second ratio of the embodiment may be 1:4 to 1:6.

[0181] That is, the second ratio of the comparative example was less than 1:3 or exceeded 1:11. In other words, when the number of layers of the circuit board is two or fewer, the thickness of the first electrode portion must be relatively larger to maintain the bending characteristics and secure rigidity of the circuit board. Accordingly, the second ratio of the circuit board of the comparative example was less than 1:3. That is, in the circuit board of the comparative example, the thickness of the first electrode portion exceeded 66% of the thickness of the circuit board. Furthermore, in the circuit board of the comparative example, if the thickness of the first electrode portion was reduced, the number of layers of the circuit board had to be increased to maintain the bending characteristics and secure rigidity. In other words, if the circuit board of the comparative example intended to reduce the thickness of the first electrode portion, the overall thickness of the circuit board had to increase in proportion. Consequently, the circuit board of the comparative example exceeded 11 times the thickness of the first electrode portion.

[0182] Alternatively, the embodiment manufactures a circuit board and a semiconductor package using an insulating member (200). Accordingly, the embodiment may have a second ratio of the thickness (T) of the circuit board to the thickness (T2) of the first electrode portion (120) in the range of 1:3 to 1:10.5, preferably 1:3.3 to 1:7.5, and more preferably 1:4 to 1:6.

[0183] Additionally, the third ratio of the embodiment may be 1:3 to 1:10.5. The third ratio refers to the ratio of the thickness (T) of the circuit board to the thickness (T3) of the second electrode portion (130). Preferably, the third ratio of the embodiment may be 1:3.3 to 1:7.5. More preferably, the third ratio of the embodiment may be 1:4 to 1:6.

[0184] At this time, the second electrode portion (130) may have substantially the same thickness as the first electrode portion (120). Accordingly, the third ratio of the thickness (T) of the circuit board to the second electrode portion (130) may be the same as the second ratio of the thickness (T) of the circuit board to the first electrode portion (120).

[0185] Furthermore, the fourth ratio of the embodiment may be 1:3 to 1:10.5. The fourth ratio refers to the ratio of the thickness (T) of the circuit board to the thickness of the through electrode (140). Preferably, the fourth ratio may be 1:3.3 to 1:7.5. More preferably, the second ratio of the embodiment may be 1:4 to 1:6.

[0186] That is, the above fourth ratio of the comparative example is less than 1:3 or exceeds 1:11.

[0187] At this time, the thickness of the through electrode (140) of the embodiment corresponds to the thickness of the insulating layer (110). Accordingly, a detailed description of the fourth ratio of the thickness of the through electrode (140) and the thickness (T) of the circuit board is omitted.

[0188] Meanwhile, the fifth ratio of the embodiment may be 1:3 to 1:10.5. The fifth ratio refers to the ratio of the thickness (T) of the circuit board to the thickness (T4) of the first protective layer (150). Preferably, the fifth ratio may be 1:3.3 to 1:7.5. More preferably, the fifth ratio may be 1:4 to 1:6.

[0189] Additionally, the sixth ratio of the embodiment may be 1:3 to 1:10.5. The sixth ratio refers to the ratio of the thickness (T) of the circuit board to the thickness (T5) of the second protective layer (160). Preferably, the sixth ratio may be 1:3.3 to 1:7.5. More preferably, the sixth ratio may be 1:4 to 1:6.

[0190] Meanwhile, as shown in FIG. 5, it was confirmed that the bending characteristics of the circuit board of the comparative example deteriorated when it included an insulating layer and an electrode portion having the same thickness as the first embodiment of the present invention (Fig. 5 'A'). Accordingly, the comparative example had a problem in that it was difficult to mount a semiconductor device at an accurate location on the circuit board, or the processability for mounting the semiconductor device was reduced.

[0191] In contrast, the circuit board of the embodiment has a structure in which an insulating member (200), which is a carrier member, is attached to the circuit board. As a result, it was confirmed that the bending characteristics and rigidity of the circuit board of the embodiment were improved compared to the comparative example ('B' and 'C' in FIG. 5).

[0192] Specifically, when using an insulating member that does not include a metal layer ('B' in FIG. 5), it was confirmed that the bending characteristics and rigidity were improved by more than 300% compared to the circuit board of the comparative example.

[0193] In addition, when using an insulating member including at least one metal layer ('C' in FIG. 5), it was confirmed that the bending characteristics and rigidity were improved by more than 400% compared to the circuit board of the comparative example.

[0194] As described above, the first embodiment can reduce the thickness of the circuit board. Specifically, the circuit board of the embodiment may have a one-layer structure based on the number of insulating layers. In addition, the circuit board may include a first electrode portion disposed on the upper surface of the insulating layer, a second electrode portion disposed on the lower surface of the insulating layer, a penetrating electrode penetrating the insulating layer, a first protective layer disposed on the upper surface of the insulating layer, and a second protective layer disposed on the lower surface of the insulating layer.

[0195] And the ratio of the thickness of the circuit board to the insulating layer of the circuit board may range from 1:3 to 1:10.5, preferably from 1:3.3 to 1:7.5, and more preferably from 1:4 to 1:6. In addition, the ratio of the thickness of the circuit board to the first electrode portion or the second electrode portion of the circuit board may range from 1:3 to 1:10.5, preferably from 1:3.3 to 1:7.5, and more preferably from 1:4 to 1:6. In addition, the ratio of the thickness of the circuit board to the through electrode of the circuit board may range from 1:3 to 1:10.5, preferably from 1:3.3 to 1:7.5, and more preferably from 1:4 to 1:6. In addition, the ratio of the thickness of the circuit board to the first protective layer or the second protective layer of the circuit board may range from 1:3 to 1:10.5, preferably from 1:3.3 to 1:7.5, and more preferably from 1:4 to 1:6.

[0196] At this time, the thickness of the circuit board may be 40㎛ to 60㎛.

[0197] That is, the first embodiment can provide a circuit board with a thickness of 60 μm or less, wherein the ratio of the thickness of the circuit board to at least one of the insulating layer, the first electrode portion, the second electrode portion, the through electrode, the first protective layer, and the second protective layer is 1:3 to 1:10.5.

[0198] Accordingly, the embodiment enables the circuit board to be slimmed down, and further enables the semiconductor package and electronic device to be slimmed down.

[0199] Furthermore, the embodiment can reduce the weight of the circuit board due to the slimming of the circuit board. Through this, the embodiment can resolve reliability issues that occur when the circuit board is dropped. For example, when the circuit board is dropped, physical reliability issues of the circuit board increase in proportion to the weight of the circuit board. Accordingly, the embodiment enables the improvement of physical and electrical reliability in the drop test of the circuit board by achieving slimming and weight reduction of the circuit board.

[0200] Meanwhile, the circuit board of the embodiment can improve electrical reliability and physical characteristics. Specifically, the circuit board of the embodiment includes an insulating member disposed on the lower surface of the second protective layer until a semiconductor device is mounted. The insulating member includes a support member and an adhesive member disposed on the support member and in contact with the second protective layer of the circuit board. At this time, the adhesive member is removed as the manufacturing of the semiconductor package is completed while it is bonded to the second protective layer. Accordingly, at least a portion of the adhesive material constituting the adhesive member may remain on the lower surface of the second protective layer of the circuit board. The remaining adhesive material may come into contact with a second connection portion disposed on the circuit board or with the main board of an electronic device. Through this, the embodiment can improve the bonding strength between the circuit board and the second connection portion, and furthermore, the bonding strength with the main board, by utilizing the remaining adhesive material.

[0202] Hereinafter, a circuit board according to the second embodiment will be described.

[0203] FIG. 6 is a cross-sectional view showing a circuit board according to a second embodiment.

[0204] Referring to FIG. 6, the circuit board of the second embodiment may include a plurality of insulating layers. For example, the circuit board of the second embodiment may include a first insulating layer (310) and a second insulating layer (320).

[0205] Specifically, the circuit board of the second embodiment may have a two-layer structure based on the number of insulating layers. That is, the circuit board of the second embodiment may include a first insulating layer (310) and a second insulating layer (320) disposed on the lower surface of the first insulating layer (310).

[0206] The thickness (T1') of the first insulating layer (310) may satisfy a range of 8 µm to 12 µm. Preferably, the thickness (T1') of the first insulating layer (310) may satisfy a range of 8.5 µm to 11.5 µm. More preferably, the thickness (T1') of the first insulating layer (310) may satisfy a range of 9 µm to 11 µm.

[0207] Correspondingly, the thickness (T2') of the second insulating layer (320) may satisfy a range of 8 µm to 12 µm. Preferably, the thickness (T2') of the second insulating layer (320) may satisfy a range of 8.5 µm to 11.5 µm. More preferably, the thickness (T1') of the second insulating layer (320) may satisfy a range of 9 µm to 11 µm.

[0208] If the thickness (T1', T2') of the first insulating layer (320) and / or the second insulating layer (320) is less than 8㎛, the first electrode part (330), the second electrode part (340), and the third electrode part (350) described below may not be reliably protected.

[0209] Additionally, if the thickness (T1', T2') of the first insulating layer (310) and / or the second insulating layer (320) exceeds 12 μm, the thickness (T') of the circuit board may be increased.

[0210] The thickness (T1') of the first insulating layer (310) may represent the vertical distance between adjacent electrode portions in the thickness direction.

[0211] For example, the thickness (T1') of the first insulating layer (310) may mean the vertical distance between the lower surface of the first electrode part (330) and the upper surface of the second electrode part (130).

[0212] For example, the thickness (T2') of the second insulating layer (320) may mean the vertical distance between the lower surface of the second electrode part (340) and the upper surface of the third electrode part (350).

[0213] An electrode portion may be disposed on the surface of the first insulating layer (310) and the second insulating layer (320).

[0214] For example, the circuit board may include a first electrode portion (330) disposed on the upper surface of the first insulating layer (310). For example, the circuit board may include a second electrode portion (340) disposed between the lower surface of the first insulating layer (310) and the upper surface of the second insulating layer (320). For example, the circuit board may include a third electrode portion (350) disposed on the lower surface of the second insulating layer (320).

[0215] The first electrode portion (330) may have an ETS structure. For example, a recess (not shown) may be formed on the upper surface of the first insulating layer (310). And, the first electrode portion (330) may be placed within the recess formed on the upper surface of the first insulating layer (310).

[0216] The second electrode portion (340) may be disposed on the lower surface of the first insulating layer (310). For example, the second electrode portion (340) may be disposed protruding downward from the lower surface of the first insulating layer (310). The upper surface of the second electrode portion (340) may be in contact with the lower surface of the first insulating layer (310). Additionally, the side and lower surfaces of the second electrode portion (340) may be in contact with the second insulating layer (320).

[0217] The third electrode portion (350) may be disposed on the lower surface of the second insulating layer (320). For example, the third electrode portion (350) may be disposed protruding downward from the lower surface of the second insulating layer (320).

[0218] At least one of the first electrode portion (330), the second electrode portion (340), and the third electrode portion (350) may have a thickness different from that of at least one other. For example, the thickness of the electrode portion disposed on the outer layer of the circuit board may be different from the thickness of the electrode portion disposed on the inner layer.

[0219] That is, the first electrode part (330) and the third electrode part (350) may be outer layer electrode parts disposed on the outer layer of the circuit board. And, the second electrode part (340) may be an inner layer electrode part disposed on the inner layer of the circuit board.

[0220] Accordingly, the first electrode portion (330) and the third electrode portion (350) disposed on the outer layer may have a different thickness from the second electrode portion (340) disposed on the inner layer. Preferably, the first electrode portion (330) and the third electrode portion (350) disposed on the outer layer may have a thickness greater than the thickness of the second electrode portion (340) disposed on the inner layer.

[0221] In addition, the first electrode portion (330) and the third electrode portion (350) may have corresponding thicknesses. For example, the thickness of the first electrode portion (330) may be the same as the thickness of the third electrode portion (350). Here, having corresponding thicknesses or the same thicknesses may mean that the difference between the thickness of the first electrode portion (330) and the thickness of the third electrode portion (350) is 1 μm or less, or 0.5 μm or less, or 0.2 μm or less.

[0222] The thickness (T3') of the first electrode portion (330) may have a range of 8 µm to 12 µm. Preferably, the thickness (T3') of the first electrode portion (330) may have a range of 8.5 µm to 11.5 µm. More preferably, the thickness (T3') of the first electrode portion (330) may have a range of 9 µm to 11 µm.

[0223] Accordingly, the thickness (T5') of the third electrode portion (350) may have a range of 8㎛ to 12㎛. Preferably, the thickness (T5') of the third electrode portion (350) may have a range of 8.5㎛ to 11.5㎛. More preferably, the thickness (T5') of the third electrode portion (350) may have a range of 9㎛ to 11㎛.

[0224] If at least one of the thicknesses (T3', T5') of the first electrode portion (330) and / or the third electrode portion (350) is less than 8 μm, the allowable current of the signal transmitted through the first electrode portion (330) and / or the second electrode portion (340) may be reduced. That is, the first electrode portion (330) and the third electrode portion (350) are outermost electrode portions disposed on the outermost layer of a circuit board. The outermost electrode portion is connected to a semiconductor device or to the main board of an electronic device. At this time, if the allowable current of the outermost electrode portion is reduced, the operating characteristics of the semiconductor device or the communication characteristics with the electronic device may be degraded accordingly. Accordingly, the first electrode portion (330) and the third electrode portion (350) of the second embodiment are each made to have a thickness (T3', T5') of 8 μm or more.

[0225] Meanwhile, if at least one of the thicknesses (T3', T5') of the first electrode portion (330) and / or the third electrode portion (350) exceeds 12 μm, the thickness of the circuit board and the semiconductor package including it may increase. Additionally, if at least one of the thicknesses (T3', T5') of the first electrode portion (330) and / or the third electrode portion (350) exceeds 12 μm, the line width of the first electrode portion (330) and / or the third electrode portion (350) may increase. Furthermore, if the line width of the first electrode portion (330) and / or the third electrode portion (350) increases, it may be difficult to miniaturize the electrode pattern accordingly. And, if it is difficult to miniaturize the electrode pattern, there may be a limit to improving the circuit integration density and furthermore, there may be a limit to slimming down the size of the circuit board.

[0226] Meanwhile, the second electrode portion (340) may have a thickness smaller than the thickness (T3', T5') of the first electrode portion (330) and the third electrode portion (350). For example, the second electrode portion (340) may be 80% or less of the thickness (T3', T5') of the first electrode portion (330) and the third electrode portion (350). For example, the second electrode portion (340) may be 70% or less of the thickness (T3', T5') of the first electrode portion (330) and the third electrode portion (350). For example, the second electrode portion (340) may be 60% or less of the thickness (T3', T5') of the first electrode portion (330) and the third electrode portion (350).

[0227] That is, the second electrode portion (340) is an inner layer electrode portion disposed on the inner layer of the circuit board. The inner layer electrode portion is covered and disposed with the first insulating layer (310) and the second insulating layer (320). As a result, even if the thickness of the inner layer electrode portion is reduced compared to the outer layer electrode portion, it may not significantly affect reliability.

[0228] That is, the thickness (T4') of the second electrode portion (340) may have a range of 3㎛ to 7㎛. Preferably, the thickness (T4') of the second electrode portion (340) may have a range of 3.5㎛ to 6.5㎛. More preferably, the thickness (T4') of the second electrode portion (340) may have a range of 4㎛ to 6㎛.

[0229] If the thickness (T4') of the second electrode portion (340) is less than 3㎛, signal transmission loss may increase as the thickness difference between the inner electrode portion and the outer electrode portion becomes too large. Additionally, if the thickness (T4') of the second electrode portion (340) exceeds 7㎛, the thickness (T') of the circuit board and the thickness of the semiconductor package may increase.

[0230] The circuit board of the second embodiment may include a first through electrode (360) and a second through electrode (370). The first through electrode (360) and the second through electrode (370) may be referred to as 'vias' that penetrate the first insulating layer (310) and the second insulating layer (320), respectively.

[0231] That is, the first insulating layer (310) includes an upper surface and a lower surface opposite to the upper surface. And, the first penetrating electrode (360) can penetrate the upper surface and the lower surface of the first insulating layer (310).

[0232] At this time, the first penetrating electrode (360) can electrically connect the first electrode part (330) and the second electrode part (340). For example, the upper surface of the first penetrating electrode (360) can come into contact with the lower surface of the first electrode part (330). For example, the lower surface of the first penetrating electrode (360) can come into contact with the upper surface of the second electrode part (340).

[0233] Additionally, the second insulating layer (320) includes an upper surface and a lower surface opposite to the upper surface. And, the second penetrating electrode (370) can penetrate the upper and lower surfaces of the second insulating layer (320).

[0234] At this time, the second penetrating electrode (370) can electrically connect the second electrode part (340) and the third electrode part (350). For example, the upper surface of the second penetrating electrode (370) can come into contact with the lower surface of the second electrode part (340). For example, the lower surface of the second penetrating electrode (370) can come into contact with the upper surface of the third electrode part (350).

[0235] Each of the first through electrode (360) and the second through electrode (370) can be formed by filling the inside of the through hole penetrating the first insulating layer (310) and the second insulating layer (320), respectively, with a conductive material.

[0236] The thickness of the first through electrode (360) may correspond to the thickness of the first insulating layer (310). For example, the thickness of the first through electrode (360) may have a range of 8 μm to 12 μm. Preferably, the thickness of the first through electrode (360) may have a range of 8.5 μm to 11.5 μm. More preferably, the thickness of the first through electrode (360) may have a range of 9 μm to 11 μm.

[0237] Additionally, the thickness of the second through electrode (370) may correspond to the thickness of the second insulating layer (320). For example, the thickness of the second through electrode (370) may have a range of 8 μm to 12 μm. Preferably, the thickness of the second through electrode (370) may have a range of 8.5 μm to 11.5 μm. More preferably, the thickness of the second through electrode (370) may have a range of 9 μm to 11 μm.

[0238] Meanwhile, the circuit board of the second embodiment includes a protective layer. The protective layer may be disposed on the outermost surface of the circuit board.

[0239] For example, the circuit board of the second embodiment may include a first protective layer (380) disposed on the upper surface of the first insulating layer (310) and the upper surface of the first electrode portion (330).

[0240] Additionally, the circuit board of the second embodiment may include a second protective layer (390) disposed on the lower surface of the second insulating layer (320) and the lower surface of the third electrode portion (350).

[0241] The first protective layer (380) may include an opening that overlaps in the thickness direction with the upper surface of a first electrode pattern that is electrically connected to a semiconductor device or an external substrate among the upper surfaces of the first electrode portion (330).

[0242] Additionally, the second protective layer (390) may include an opening that overlaps in the thickness direction with the lower surface of the second electrode pattern, which is electrically connected to a semiconductor device or an external substrate, among the lower surfaces of the third electrode portion (350).

[0243] The thickness (T6') of the first protective layer (380) may satisfy a range of 8㎛ to 12㎛. Preferably, the thickness (T6') of the first protective layer (380) may satisfy a range of 8.5㎛ to 11.5㎛. More preferably, the thickness (T6') of the first protective layer (380) may satisfy a range of 9㎛ to 11㎛.

[0244] Accordingly, the thickness (T7') of the second protective layer (390) may satisfy a range of 8㎛ to 12㎛. Preferably, the thickness (T7') of the second protective layer (390) may satisfy a range of 8.5㎛ to 11.5㎛. More preferably, the thickness (T7') of the second protective layer (390) may satisfy a range of 9㎛ to 11㎛.

[0245] Meanwhile, the thickness (T') of the circuit board of the second embodiment may be greater than the thickness (T) of the circuit board of the first embodiment. That is, the circuit board of the second embodiment has a two-layer structure based on the number of insulating layers. And the circuit board of the first embodiment has a one-layer structure based on the number of insulating layers. Accordingly, the circuit board of the second embodiment may have a greater thickness compared to the circuit board of the first embodiment.

[0246] Specifically, the thickness (T') of the circuit board of the second embodiment may satisfy a range of 51 μm to 79 μm. Preferably, the thickness (T') of the circuit board of the second embodiment may satisfy a range of 54.5 μm to 75.5 μm. More preferably, the range of 58 μm to 72 μm of the second embodiment may satisfy.

[0247] That is, even if the thickness (T') of the circuit board of the second embodiment is in the range of 51㎛ to 79㎛, further to 54.5㎛ to 75.5㎛, and further to 58㎛ to 72㎛, it is possible to stably mount semiconductor devices without the reduction of bending characteristics and rigidity of the circuit board of the comparative example.

[0248] To this end, although not shown in the drawing, the circuit board of the second embodiment may include an insulating member (200). The insulating member (200) may be disposed on the lower surface of the second protective layer (390) of the circuit board of the second embodiment. Through this, the circuit board of the second embodiment can have a certain level of rigidity while having improved bending characteristics, even if it has a thinner thickness compared to the comparative example.

[0249] Accordingly, an adhesive material, which is part of the adhesive member (220) of the insulating member (200), may remain on the lower surface of the second protective layer (390) of the circuit board of the second embodiment. Furthermore, the remaining adhesive material can improve the bonding strength with the second connection portion. Through this, the remaining adhesive material can improve the electrical reliability and physical reliability of the semiconductor package.

[0251] Through this, the second embodiment can optimally set the first ratio of the thickness (T') of the circuit board to the thickness (T1') of the first insulating layer (310). Additionally, the second embodiment can optimally set the second ratio of the thickness (T') of the circuit board to the thickness (T2') of the second insulating layer (320). Additionally, the second embodiment can optimally set the third ratio of the thickness (T') of the circuit board to the thickness (T3') of the first electrode part (330). Additionally, the second embodiment can optimally set the fourth ratio of the thickness (T') of the circuit board to the thickness (T4') of the second electrode part (340). Additionally, the second embodiment can optimally set the fifth ratio of the thickness (T') of the circuit board to the thickness (T5') of the third electrode part (350). Additionally, the second embodiment can optimally set the sixth ratio of the thickness (T') of the circuit board to the thickness of the first through electrode (360). Additionally, the second embodiment can optimally set the seventh ratio of the thickness (T') of the circuit board to the thickness of the second through electrode (370). Additionally, the second embodiment can optimally set the eighth ratio of the thickness (T') of the circuit board to the thickness of the first protective layer (380). Additionally, the second embodiment can optimally set the ninth ratio of the thickness (T') of the circuit board to the thickness of the second protective layer (390).

[0252] Hereinafter, the first to ninth ratios according to the second embodiment will be described.

[0253] At this time, the respective thicknesses of the first insulating layer (310), the second insulating layer (320), the first electrode part (330), the third electrode part (350), the first penetrating electrode (360), the second penetrating electrode (370), the first protective layer (380), and the second protective layer (390) are determined within the same range as described above. Accordingly, the first ratio, the second ratio, the third ratio, the fifth ratio, the sixth ratio, the seventh ratio, the eighth ratio, and the ninth ratio may be the same as each other. However, the embodiments are not limited thereto, and at least one of the first insulating layer (310), the second insulating layer (320), the first electrode part (330), the third electrode part (350), the first penetrating electrode (360), the second penetrating electrode (370), the first protective layer (380), and the second protective layer (390) may have a thickness different from the other within the range described above. Accordingly, at least one of the above-mentioned first to third ratios and fifth to ninth ratios may differ from at least one other.

[0254] The first ratio of the second embodiment may be 1:3 to 1:10.5. The first ratio refers to the ratio of the thickness (T') of the circuit board to the thickness (T1') of the first insulating layer (310). Preferably, the first ratio of the second embodiment may be 1:4 to 1:10. More preferably, the first ratio of the embodiment may be 1:5 to 1:8.

[0255] That is, as described in the first embodiment, in order to secure rigidity and improve bending characteristics, the circuit board of the comparative example had a thickness of one insulating layer relative to the total thickness of the circuit board, or a thickness of one insulating layer relative to the total thickness of the circuit board. Accordingly, the first ratio of the circuit board of the comparative example was less than 1:3 or exceeded 1:11.

[0256] In contrast, the second embodiment manufactures a circuit board and a semiconductor package using an insulating member (200). Accordingly, the second embodiment may have a first ratio of the thickness (T') of the circuit board to the thickness (T1') of the first insulating layer (310) in the range of 1:3 to 1:10.5, preferably 1:4 to 1:10, and more preferably 1:5 to 1:8.

[0257] Furthermore, the second ratio of the second embodiment may be 1:3 to 1:10.5. The second ratio of the second embodiment refers to the ratio of the thickness (T') of the circuit board to the thickness (T2') of the second insulating layer (320). Preferably, the second ratio may be 1:4 to 1:10. More preferably, the second ratio may be 1:5 to 1:8.

[0258] Additionally, the third ratio of the second embodiment may be 1:3 to 1:10.5. The third ratio of the second embodiment refers to the ratio of the thickness (T') of the circuit board to the thickness (T3') of the first electrode portion (120). Preferably, the third ratio may be 1:4 to 1:10. More preferably, the third ratio may be 1:5 to 1:8.

[0259] Additionally, the fourth ratio of the second embodiment may differ from other ratios. For example, the fourth ratio of the second embodiment refers to the ratio of the thickness (T') of the circuit board to the thickness (T4') of the second electrode portion (340). And, the thickness (T4') of the second electrode portion (340) is smaller than the thickness of other components of the circuit board. Accordingly, the fourth ratio of the second embodiment may be larger than other ratios.

[0260] For example, the fourth ratio of the second embodiment may satisfy a range of 1:6 to 1:21. Preferably, the fourth ratio of the second embodiment may satisfy a range of 1:8 to 1:20. More preferably, the fourth ratio of the second embodiment may satisfy a range of 1:10 to 1:16.

[0261] The fifth ratio of the second embodiment may be 1:3 to 1:10.5. The fifth ratio of the second embodiment refers to the ratio of the thickness (T') of the circuit board to the thickness (T5') of the third electrode portion (350). Preferably, the fifth ratio may be 1:4 to 1:10. More preferably, the fifth ratio may be 1:5 to 1:8.

[0262] The sixth ratio of the second embodiment may be 1:3 to 1:10.5. The sixth ratio of the second embodiment refers to the ratio of the thickness (T') of the circuit board to the thickness of the first through electrode (360). Preferably, the sixth ratio may be 1:4 to 1:10. More preferably, the sixth ratio may be 1:5 to 1:8.

[0263] The seventh ratio of the second embodiment may be 1:3 to 1:10.5. The seventh ratio of the second embodiment refers to the ratio of the thickness (T') of the circuit board to the thickness of the second through electrode (370). Preferably, the seventh ratio may be 1:4 to 1:10. More preferably, the seventh ratio may be 1:5 to 1:8.

[0264] The eighth ratio of the second embodiment may be 1:3 to 1:10.5. The eighth ratio of the second embodiment refers to the ratio of the thickness (T') of the circuit board to the thickness (T6') of the first protective layer (380). Preferably, the eighth ratio may be 1:4 to 1:10. More preferably, the eighth ratio may be 1:5 to 1:8.

[0265] The ninth ratio of the second embodiment may be 1:3 to 1:10.5. The ninth ratio of the second embodiment refers to the ratio of the thickness (T') of the circuit board to the thickness (T7') of the second protective layer (390). Preferably, the ninth ratio may be 1:4 to 1:10. More preferably, the ninth ratio may be 1:5 to 1:8.

[0266] As described above, the circuit board of the second embodiment may have a two-layer structure based on the number of insulating layers. Additionally, the circuit board may include a first electrode portion disposed on the upper surface of the first insulating layer, a second electrode portion disposed between the first insulating layer and the second insulating layer, a third electrode portion disposed on the lower surface of the second insulating layer, a first penetrating electrode penetrating the first insulating layer, a second penetrating electrode penetrating the second insulating layer, a first protective layer disposed on the upper surface of the first insulating layer, and a second protective layer disposed on the lower surface of the second insulating layer.

[0267] And the ratio of the thickness of the circuit board to the first insulating layer or the second insulating layer of the circuit board may have a range of 1:3 to 1:10.5, preferably 1:4 to 1:10, and more preferably 1:5 to 1:7. In addition, the ratio of the thickness of the circuit board to the first electrode portion or the third electrode portion of the circuit board may have a range of 1:3 to 1:10.5, preferably 1:4 to 1:10, and more preferably 1:5 to 1:7. In addition, the ratio of the thickness of the circuit board to the second electrode portion of the circuit board may have a range of 1:6 to 1:21, preferably 1:8 to 1:20, and more preferably 1:10 to 1:14. In addition, the ratio of the thickness of the circuit board to the first through-electrode or the second through-electrode of the circuit board may range from 1:3 to 1:10.5, preferably from 1:4 to 1:10, and more preferably from 1:5 to 1:8. In addition, the ratio of the thickness of the circuit board to the first protective layer or the second protective layer of the circuit board may range from 1:3 to 1:10.5, preferably from 1:4 to 1:10, and more preferably from 1:5 to 1:5.

[0268] At this time, the thickness of the circuit board may be 51㎛ to 79㎛.

[0269] That is, the second embodiment can provide a circuit board with a thickness of 79 μm or less, while the ratio of the thickness of the circuit board to at least one of the first insulating layer, the second insulating layer, the first electrode portion, the second electrode portion, the first through electrode, the second through electrode, the first protective layer, and the second protective layer is 1:3 to 1:10.5.

[0270] Accordingly, the embodiment enables the circuit board to be slimmed down, and further enables the semiconductor package and electronic device to be slimmed down.

[0272] FIG. 7 is a cross-sectional view showing a semiconductor package according to an embodiment.

[0273] Referring to FIG. 7, a semiconductor package according to an embodiment includes a circuit board. At this time, the circuit board may include either the circuit board shown in FIG. 1 or the circuit board shown in FIG. 6. Hereinafter, the semiconductor package of the embodiment is described as including the circuit board of the second embodiment of FIG. 6. However, the embodiment is not limited thereto. For example, the semiconductor package of the embodiment may include the circuit board of the first embodiment of FIG. 1.

[0274] That is, the semiconductor package of the embodiment may be an FCBGA (Flip Chip Ball Grid Array), but is not limited thereto. For example, the product family to which the semiconductor package of the embodiment is applied may be any one of a CSP (Chip Scale Package), an FC-CSP (Flip Chip-Chip Scale Package), and a SIP (System In Package).

[0275] The semiconductor package of the embodiment may include a first connection portion (410). The first connection portion (410) may be disposed on the outermost layer of the circuit board. For example, the first connection portion (410) may be disposed on the first electrode portion (330), which is the first outermost layer of the circuit board. For example, the first connection portion (410) may be disposed on the first electrode pattern of the first electrode portion (330) which is vertically superimposed with the opening of the first protective layer (380).

[0276] The first connecting part (410) may have a cuboid shape. For example, the cross-section of the first connecting part (410) may include a rectangular shape. For example, the cross-section of the first connecting part (410) may include a rectangle or a square.

[0277] Alternatively, the first connection part (410) may have a spherical shape. For example, the cross-section of the first connection part (410) may have a circular shape, a semicircular shape, or an elliptical shape. For example, the cross-section of the first connection part (410) may include a partially or entirely rounded shape. For example, the cross-section of the first connection part (410) may be flat on one side and curved on the other side. The first connection part (410) may be a solder ball, but is not limited thereto.

[0278] Meanwhile, the semiconductor package may include a semiconductor device (420) mounted on the first connection part (410).

[0279] At this time, the semiconductor device (420) can be mounted on the circuit board after the manufacturing of the circuit board is completed. At this time, in the semiconductor package of the embodiment, the mounting of the semiconductor device (420) is performed while the insulating member (200) is placed on the circuit board. Furthermore, in the embodiment, the insulating member (200) can be removed after the mounting process of the semiconductor device (420) is completed. Accordingly, the embodiment can resolve reliability issues such as positional misalignment occurring during the mounting process of the semiconductor device (420). Furthermore, in the embodiment, the mounting process of the semiconductor device can be carried out easily.

[0280] The semiconductor device (420) may be a processor chip. For example, the semiconductor device (420) may be an application processor (AP) chip among a central processor (e.g., CPU), a graphics processor (e.g., GPU), a digital signal processor, an encryption processor, a microprocessor, and a microcontroller. The terminal (425) of the semiconductor device (420) may be electrically connected to the first electrode pattern of the first electrode part (120) through the first connection part (410).

[0281] Meanwhile, although not illustrated in the drawings, the semiconductor package of the embodiment may have a structure in which at least two semiconductor devices are mounted. In this case, the at least two semiconductor devices may be different devices, or they may be the same device. In this case, if the two semiconductor devices are different devices, the conditions of the mounting process (e.g., reflow temperature, etc.) may be different. In this case, when mounting the two different semiconductor devices, if the bending characteristics of the circuit board are degraded or the rigidity of the circuit board is not secured, the processability may be reduced. In this case, the embodiment performs the mounting process of at least two semiconductor devices while an insulating member (200) is disposed on one side of the circuit board. By doing so, the embodiment can provide ease of the mounting process.

[0282] At this time, the at least two semiconductor devices may be two processor chips. For example, the semiconductor package of the embodiment may have at least two chips selected from a central processor (e.g., CPU), a graphics processor (e.g., GPU), a digital signal processor, an encryption processor, a microprocessor, and a microcontroller mounted thereon.

[0283] Alternatively, one of the above at least two semiconductor devices may be a processor chip and the other may be a memory chip.

[0284] However, the embodiments are not limited thereto. For example, the semiconductor device may include various active and passive components.

[0285] Meanwhile, when two or more semiconductor devices are mounted on a semiconductor package, the two semiconductor devices may be mounted on the circuit board at a certain distance from each other.

[0286] Preferably, the spacing between the plurality of semiconductor elements may range from 60 µm to 150 µm. Preferably, the spacing between the plurality of semiconductor elements may range from 70 µm to 120 µm. Preferably, the spacing between the plurality of semiconductor elements may range from 80 µm to 110 µm. If the spacing between the plurality of semiconductor elements is less than 60 µm, problems with operational reliability may occur due to mutual interference between the plurality of semiconductor elements. If the spacing between the plurality of semiconductor elements is greater than 150 µm, signal transmission loss may increase as the distance between the plurality of semiconductor elements increases. If the spacing between the plurality of semiconductor elements is greater than 150 µm, the size of the semiconductor package may increase.

[0287] Additionally, the semiconductor package may include a molding layer (430). The molding layer (430) may be placed over the semiconductor device (420). The molding layer (430) may function to protect the mounted semiconductor device (420). The molding layer (430) may be an EMC (Epoxy Mold Compound), but is not limited thereto.

[0288] The molding layer (430) may have a low dielectric constant to improve heat dissipation characteristics. For example, the dielectric constant (Dk) of the molding layer (430) may be 0.2 to 10. For example, the dielectric constant (Dk) of the molding layer (430) may be 0.5 to 8. For example, the dielectric constant (Dk) of the molding layer (430) may be 0.8 to 5. Accordingly, in the embodiment, the molding layer (430) is made to have a low dielectric constant so that the heat dissipation characteristics of the semiconductor device (420) can be improved.

[0289] Additionally, the semiconductor package includes a second connection portion (440). The second connection portion (440) may be positioned at the bottom side of the circuit board. The second connection portion (440) may be positioned on the lower surface of the third electrode pattern of the third electrode portion (350) which is vertically superimposed with the opening of the second protective layer (390).

[0291] Hereinafter, a method for manufacturing a circuit board according to an embodiment will be described.

[0292] FIGS. 8 to 18 are cross-sectional views for explaining a method for manufacturing a circuit board according to an embodiment in process order. Specifically, FIGS. 8 to 18 are cross-sectional views for explaining a method for manufacturing a circuit board of a second embodiment shown in FIG. 6.

[0293] Referring to FIG. 8, an embodiment may prepare a core member for manufacturing a circuit board. The core member may also be referred to as a first carrier member. For example, the core member may include a core layer (410) and a metal layer (420) disposed on at least one surface of the core layer (410). The metal layer (420) may be disposed on only one surface of the core layer (410), or alternatively, may be disposed on both surfaces.

[0294] For example, if the metal layer (420) is disposed on only one side of the core layer (410), the embodiment can proceed with the process of manufacturing one circuit board on one side of the core layer (410). Alternatively, if the metal layer (420) is disposed on both sides of the core layer (410), the embodiment can proceed with the process of manufacturing two circuit boards simultaneously on both sides of the core layer (410).

[0295] The metal layer (420) can be formed by electroless plating on the surface of the core layer (410). Alternatively, the core member may be CCL (Copper Clad Laminate).

[0296] In the following description, a metal layer (420) is disposed on both sides of the core layer (410), and accordingly, a plurality of circuit boards are manufactured simultaneously on both sides of the core member.

[0297] Referring to FIG. 9, the embodiment may proceed with a process of forming a first electrode portion (330) on the metal layer (420) of the core layer (410). The first electrode portion (330) may be formed by performing electroplating on the metal layer (420) as a seed layer.

[0298] Next, referring to FIG. 10, the embodiment may proceed with a process of laminating a first insulating layer (310) on the metal layer (420) and the first electrode portion (330).

[0299] Next, referring to FIG. 11, the embodiment may proceed with a process of forming a through hole (not shown) penetrating the first insulating layer (310). Additionally, the embodiment may proceed with a process of forming a first through electrode (360) that fills the through hole and a second electrode part (340) connected to the first through electrode (360).

[0300] Next, referring to FIG. 12, the embodiment may proceed with the process of laminating a second insulating layer (320) that covers the second electrode portion (340) below the first insulating layer (310).

[0301] Next, referring to FIG. 13, the embodiment may proceed with a process of forming a through hole (not shown) penetrating the second insulating layer (320). Additionally, the embodiment may proceed with a process of forming a second penetrating electrode (370) that fills the through hole of the second insulating layer (320) and a third electrode part (350) connected to the second penetrating electrode (370).

[0302] Next, referring to FIG. 14, the embodiment may proceed with the process of forming a second protective layer (390) on the lower surface of the second insulating layer (320). At this time, the second protective layer (390) may be positioned to cover the entire lower surface of the third electrode part (350). Accordingly, the embodiment may proceed with the process of forming an opening in the second protective layer (390) that overlaps in the thickness direction with at least one third electrode pattern on the lower surface of the third electrode part (350).

[0303] Next, referring to FIG. 15, the embodiment may proceed with a process of attaching an insulating member (200) to the lower surface of the second protective layer (390). That is, the insulating member (200) may be attached before the core member is removed during the manufacturing process of the circuit board.

[0304] Next, referring to FIG. 16, the embodiment may proceed with a process of separating circuit boards manufactured on both sides thereof centered on the core layer (410).

[0305] Next, referring to FIG. 17, the embodiment may proceed with a process of removing the metal layer (420) of the core member placed on the uppermost side of the circuit board.

[0306] Next, referring to FIG. 18, the embodiment may proceed with the process of forming a first protective layer (380) on the upper surface of the first insulating layer (310). Then, the embodiment may proceed with the process of forming an opening in the first protective layer (380) that overlaps in the thickness direction with the upper surface of the first electrode pattern of the first electrode part (120).

[0307] As described above, the manufacturing process of the circuit board of the embodiment is carried out with a core member and / or an insulating member (200) disposed on at least one side of the circuit board. The insulating member (200) may remain without being removed even after the manufacturing of the circuit board is completely finished. Furthermore, the embodiment may carry out a process of mounting a semiconductor device on the circuit board while the insulating member (200) is disposed.

[0308] The embodiment can slim down the thickness of the circuit board.

[0309] Specifically, the circuit board of the embodiment may have a one-layer structure based on the number of insulating layers. In addition, the circuit board may include a first electrode portion disposed on the upper surface of the insulating layer, a second electrode portion disposed on the lower surface of the insulating layer, a penetrating electrode penetrating the insulating layer, a first protective layer disposed on the upper surface of the insulating layer, and a second protective layer disposed on the lower surface of the insulating layer.

[0310] And the ratio of the thickness of the circuit board to the insulating layer of the circuit board may range from 1:3 to 1:10.5, preferably from 1:3.3 to 1:7.5, and more preferably from 1:4 to 1:6. In addition, the ratio of the thickness of the circuit board to the first electrode portion or the second electrode portion of the circuit board may range from 1:3 to 1:10.5, preferably from 1:3.3 to 1:7.5, and more preferably from 1:4 to 1:6. In addition, the ratio of the thickness of the circuit board to the through electrode of the circuit board may range from 1:3 to 1:10.5, preferably from 1:3.3 to 1:7.5, and more preferably from 1:4 to 1:6. In addition, the ratio of the thickness of the circuit board to the first protective layer or the second protective layer of the circuit board may range from 1:3 to 1:10.5, preferably from 1:3.3 to 1:7.5, and more preferably from 1:4 to 1:6.

[0311] At this time, the thickness of the circuit board may be 40㎛ to 60㎛.

[0312] That is, the first embodiment can provide a circuit board with a thickness of 60 μm or less, wherein the ratio of the thickness of the circuit board to at least one of the insulating layer, the first electrode portion, the second electrode portion, the through electrode, the first protective layer, and the second protective layer is 1:3 to 1:10.5.

[0313] Accordingly, the embodiment enables the circuit board to be slimmed down, and further enables the semiconductor package and electronic device to be slimmed down.

[0314] In addition, the circuit board of the embodiment may have a two-layer structure based on the number of insulating layers. The circuit board may include a first electrode portion disposed on the upper surface of the first insulating layer, a second electrode portion disposed between the first insulating layer and the second insulating layer, a third electrode portion disposed on the lower surface of the second insulating layer, a first penetrating electrode penetrating the first insulating layer, a second penetrating electrode penetrating the second insulating layer, a first protective layer disposed on the upper surface of the first insulating layer, and a second protective layer disposed on the lower surface of the second insulating layer.

[0315] And the ratio of the thickness of the circuit board to the first insulating layer or the second insulating layer of the circuit board may have a range of 1:3 to 1:10.5, preferably 1:4 to 1:10, and more preferably 1:5 to 1:7. In addition, the ratio of the thickness of the circuit board to the first electrode portion or the third electrode portion of the circuit board may have a range of 1:3 to 1:10.5, preferably 1:4 to 1:10, and more preferably 1:5 to 1:7. In addition, the ratio of the thickness of the circuit board to the second electrode portion of the circuit board may have a range of 1:6 to 1:21, preferably 1:8 to 1:20, and more preferably 1:10 to 1:14. In addition, the ratio of the thickness of the circuit board to the first through-electrode or the second through-electrode of the circuit board may range from 1:3 to 1:10.5, preferably from 1:4 to 1:10, and more preferably from 1:5 to 1:8. In addition, the ratio of the thickness of the circuit board to the first protective layer or the second protective layer of the circuit board may range from 1:3 to 1:10.5, preferably from 1:4 to 1:10, and more preferably from 1:5 to 1:5.

[0316] At this time, the thickness of the circuit board may be 51㎛ to 79㎛.

[0317] That is, the second embodiment can provide a circuit board with a thickness of 79 μm or less, while the ratio of the thickness of the circuit board to at least one of the first insulating layer, the second insulating layer, the first electrode portion, the second electrode portion, the first through electrode, the second through electrode, the first protective layer, and the second protective layer is 1:3 to 1:10.5.

[0318] Accordingly, the embodiment enables the circuit board to be slimmed down, and further enables the semiconductor package and electronic device to be slimmed down.

[0319] Meanwhile, the circuit board of the embodiment can improve electrical reliability and physical characteristics. Specifically, the circuit board of the embodiment includes an insulating member disposed on the lower surface of the second protective layer until a semiconductor device is mounted. The insulating member includes a support member and an adhesive member disposed on the support member and in contact with the second protective layer of the circuit board. At this time, the adhesive member is removed as the manufacturing of the semiconductor package is completed while it is bonded to the second protective layer. Accordingly, at least a portion of the adhesive material constituting the adhesive member may remain on the lower surface of the second protective layer of the circuit board. The remaining adhesive material may come into contact with a second connection portion disposed on the circuit board or with the main board of an electronic device. Through this, the embodiment can improve the bonding strength between the circuit board and the second connection portion, and furthermore, the bonding strength with the main board, by utilizing the remaining adhesive material.

[0321] Meanwhile, when a circuit board having the features of the invention described above is used in IT devices or home appliances such as smartphones, server computers, and TVs, it can stably perform functions such as signal transmission or power supply. For example, when a circuit board having the features of the invention performs a semiconductor package function, it can safely protect the semiconductor chip from external moisture or contaminants, and can resolve issues such as leakage current, electrical short circuits between terminals, or electrical open circuits of terminals supplying power to the semiconductor chip. In addition, when it is responsible for signal transmission, it can resolve noise issues. Through this, the circuit board having the features of the invention described above enables the stable operation of IT devices or home appliances, thereby allowing the entire product and the circuit board to which the invention is applied to achieve functional integration or technical interoperability.

[0322] When a circuit board having the features of the invention described above is used in a transportation device such as a vehicle, it can resolve the problem of signal distortion transmitted to the transportation device, or safely protect a semiconductor chip controlling the transportation device from the outside, and further improve the stability of the transportation device by resolving problems such as leakage current, electrical short circuits between terminals, or electrical open circuits of terminals supplying power to the semiconductor chip. Accordingly, the transportation device and the circuit board to which the present invention is applied can achieve functional integration or technical interoperability with each other.

[0323] The features, structures, effects, etc. described in the embodiments above are included in at least one embodiment and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, etc. exemplified in each embodiment may be combined or modified and implemented in other embodiments by a person with ordinary knowledge in the field to which the embodiments belong. Therefore, details regarding such combinations and modifications should be interpreted as being included within the scope of the embodiments.

[0324] Although the above description has focused on embodiments, this is merely an example and is not intended to limit the embodiments. A person skilled in the art to which the embodiments pertain will understand that various modifications and applications not exemplified above are possible within the scope of the essential characteristics of the embodiments. For instance, each component specifically shown in the embodiments may be modified and implemented. Furthermore, differences related to such modifications and applications should be interpreted as being included within the scope of the embodiments set forth in the appended claims.

Claims

Claim 1 A semiconductor package comprising a circuit board including: a first insulating layer; an electrode portion disposed on the first insulating layer; a second insulating layer disposed on the upper surface of the first insulating layer; and a third insulating layer disposed on the lower surface of the first insulating layer, wherein the first insulating layer comprises reinforcing fibers, and the second and third insulating layers comprise resist layers, and the ratio of the thickness of the circuit board to the thickness of the electrode portion satisfies the range of 1:3 to 1:10.

5. Claim 2 A semiconductor package according to claim 1, wherein the thickness of the electrode portion satisfies the range of 8㎛ to 12㎛. Claim 3 A semiconductor package according to claim 1 or 2, wherein the electrode portion comprises a first electrode portion disposed on the upper surface of the first insulating layer; and a second electrode portion disposed on the lower surface of the first insulating layer, and the ratio of the thickness of the circuit board to the thickness of the first electrode portion or the second electrode portion satisfies the range of 1:3 to 1:10.

5. Claim 4 A semiconductor package according to claim 3, wherein the thickness of the first electrode portion satisfies the range of 8㎛ to 12㎛ and the thickness of the second electrode portion satisfies the range of 8㎛ to 12㎛. Claim 5 A semiconductor package according to claim 1 or 2, wherein the second insulating layer is an insulating layer disposed on the uppermost side of the circuit board and the third insulating layer is an insulating layer disposed on the lowermost side of the circuit board. Claim 6 A semiconductor package according to claim 4, wherein the first insulating layer of the circuit board is composed of one layer, and the thickness of the circuit board satisfies the range of 40㎛ to 60㎛. Claim 7 A semiconductor package according to claim 3, wherein the ratio of the thickness of the circuit board to the thickness of the first electrode portion or the second electrode portion satisfies the range of 1:4 to 1:

6. Claim 8 A semiconductor package according to claim 7, wherein the ratio of the thickness of the circuit board to the thickness of the first insulating layer satisfies the range of 1:3 to 1:10.

5. Claim 9 A semiconductor package according to claim 8, wherein the thickness of the first insulating layer satisfies the range of 8㎛ to 12㎛. Claim 10 A semiconductor package according to claim 3, wherein the circuit board includes a through electrode penetrating the first insulating layer, and the ratio of the thickness of the circuit board to the thickness of the through electrode satisfies the range of 1:3 to 1:10.

5. Claim 11 A semiconductor package according to claim 10, wherein the thickness of the through electrode satisfies the range of 8㎛ to 12㎛. Claim 12 A semiconductor package according to claim 3, wherein the ratio of the thickness of the circuit board to the thickness of the second insulating layer or the third insulating layer satisfies the range of 1:3 to 1:10.

5. Claim 13 A semiconductor package according to claim 3, wherein the first insulating layer comprises two layers including a first-1 insulating layer and a first-2 insulating layer disposed below the first-1 insulating layer, the first electrode portion is disposed on the upper surface of the first-1 insulating layer and the second electrode portion is disposed on the lower surface of the first-2 insulating layer, and the circuit board comprises a third electrode portion disposed between the lower surface of the first-1 insulating layer and the upper surface of the first-2 insulating layer, and the thickness of the circuit board satisfies the range of 51 μm to 79 μm. Claim 14 A semiconductor package according to claim 13, wherein the ratio of the thickness of the circuit board to the thickness of the third electrode portion satisfies the range of 1:6 to 1:21, and the thickness of the third electrode portion satisfies the range of 3㎛ to 7㎛. Claim 15 A semiconductor package according to claim 13, wherein the ratio of the thickness of the circuit board to the thickness of the first electrode portion or the second electrode portion satisfies the range of 1:5 to 1:

8. Claim 16 A semiconductor package according to claim 13, wherein the ratio of the thickness of the circuit board to the thickness of the first-1 insulating layer or the first-2 insulating layer satisfies the range of 1:3 to 1:10.

5. Claim 17 A semiconductor package according to claim 16, wherein the thickness of the 1-1 insulating layer satisfies the range of 8㎛ to 12㎛ and the thickness of the 1-2 insulating layer satisfies the range of 8㎛ to 12㎛. Claim 18 A semiconductor package according to claim 13, wherein the circuit board comprises a first through-electrode penetrating the first-1 insulating layer and a second through-electrode penetrating the first-2 insulating layer, and the ratio of the thickness of the circuit board to the thickness of the first through-electrode or the second through-electrode satisfies the range of 1:3 to 1:10.

5. Claim 19 A semiconductor package according to claim 13, wherein the ratio of the thickness of the circuit board to the thickness of the second insulating layer or the third insulating layer satisfies the range of 1:3 to 1:10.

5. Claim 20 A semiconductor package according to claim 3, comprising: a first connection portion disposed on a first electrode pattern of the first electrode portion; and a semiconductor element mounted on the first connection portion, wherein the second insulating layer comprises an opening that overlaps with the first electrode pattern of the first electrode portion in the thickness direction. Claim 21 A semiconductor package according to claim 1, wherein at least a portion of the lower surface of the third insulating layer comprises an adhesive material.

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