High-efficiency passivation treatment method for semiconductor material surfaces
Patent Information
- Application Number
- NL2040478
- Authority / Receiving Office
- NL · NL
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2024-06-01
- Filing Date
- 2025-05-30
- Publication Date
- 2026-08-27
- Estimated Expiration
- 2045-05-30
AI Technical Summary
Existing multilayer passivation structures for semiconductor materials suffer from insufficient interlayer bonding strength, poor high-temperature stability, and weak resistance to ion migration, leading to interface defects and reduced chip lifespan.
A high-efficiency passivation treatment method involving surface purification, thermal oxide film removal, deposition of a nanocrystalline silicon nitride layer, and a multicomponent composite functional layer, enhanced by plasma activation and pulsed laser annealing to improve interfacial bonding and stability.
The method increases interlayer bonding strength by over 40% and extends failure time under damp heat conditions to over 5000 hours, reducing performance degradation by 60% at high temperatures.
Abstract
Description
l HIGH-EFFICIENCY PASSIVATION TREATMENT METHOD FOR SEMICONDUCTOR MATERIAL SURFACES Technical Field The present invention relates to the technical eld of surface passivation treatment of semiconductor materials, and more specically to a high-efciency passivation treatment method for semiconductor material surfaces. Background Technology In the manufacturing of semiconductor devices, surface passivation treatment is a key process to improve device reliability. In the existing technology, although multilayer passivation structures can enhance protective performance, they commonly suffer from insufcient interlayer bonding strength, poor high-temperature stability, and weak resistance to ion migration. For example, traditional silicon dioxide thermal oxide lms are susceptible to moisture and ionic corrosion during long-term use, resulting in failure of the passivation layer. Furthermore, simply stacked multilayer structures often lead to interface defects due to material incompatibility, which ultimately affects chip lifespan. Therefore, there is an urgent need for a novel passivation treatment method capable of optimizing interfacial bonding and enhancing overall protective performance. Summary of the Invention The objective of the present invention is to provide a high-efciency passivation treatment method for semiconductor material surfaces to solve the problems proposed in the background technology. In order to realize the above purpose, the present invention provides the following technical solution: a high-efciency passivation treatment method for semiconductor material surfaces, comprising the following steps: Step 1, surface purication treatment: immersing the semiconductor material in a solution of specied concentration for ultrasonic cleaning; after removal, rinsing with deionized water, followed by drying in a vacuum environment; Step 2, thermal oxide lm removal: for semiconductor materials with a formed thermal oxide lm, soaking in HF solution is applied; after cleaning and drying, the material surface undergoes argon plasma treatment; Step 3, rst passivation: comprising the preparation of a silicon nitride substrate and the deposition of a nanocrystalline silicon nitride layer; (l) Preparation of silicon nitride substrate: immersing the silicon wafer sequentially in a stO4-H202 mixture and a HCl-HzOz-Hzo mixture to remove metallic impurities; then performing ultrasonic cleaning at 120 OC; (2) Deposition of nanocrystalline silicon nitride layer: using microwave-assisted chemical vapor deposition to form a nanocrystalline Si3N4 interfacial layer with a thickness of 50100 nm on the surface of the semiconductor, this layer possesses a porous structure to enhance the adhesion of subsequent coatings; Step 4, second passivation: comprising preparation of a multicomponent composite target and magnetron sputtering deposition; (1) Preparation of multicomponent composite target: mixing silicon carbide, zinc sulde, and polyimide, adding nano-alumina, and sintering at 500600 oC for 23 h to prepare the composite target; (2) Magnetron sputtering deposition: under a vacuum of 10'4 Pa, using Ar as the sputtering gas to form a SiC-ZnS-PI composite functional layer with a thickness of 200 300 nm, this layer provides both corrosion resistance and insulating properties; Step 5, third passivation: comprising plasma-enhanced chemical vapor deposition (PE-CVD) and interfacial reinforcement treatment; (l) Plasma-enhanced chemical vapor deposition (PE-CVD): placing the pretreated semiconductor material into a deposition chamber, introducing a diluted CH3SiH2 and NH3 mixed gas for deposition to form a Si-C-N-O terpolymer protective layer; (2) Interfacial reinforcement treatment: immediately after deposition, performing pulsed laser annealing to promote interlayer elemental diffusion and form a 510 nm transitional interfacial layer. Preferably, in step 1, the semiconductor material is ultrasonically cleaned in a uoride solution with a concentration of 25%3 0% for 2040 minutes at an ultrasonic frequency of 4060 kHz to remove surface organic contaminants; after removal, the material is rinsed with deionized water three times, each rinse lasting 510 minutes, and then dried for 3060 minutes in a vacuum environment with a pressure 5103 Pa. Preferably, in step 2, for semiconductor materials with a formed thermal oxide lm, a HF solution with a concentration of lS%20% is used for soaking for 1015 minutes, assisted by megasonic ultrasound at 5080 kHz to accelerate the stripping of the oxide lm; after cleaning and drying, the material surface undergoes argon plasma treatment at a power of 100200 W for 510 minutes to activate surface active sites. Preferably, in step 3, the volume ratio of the stO4-H202 mixture is 3: 1, and that of the HCl-HzOz-HzO mixture is 121:5; the immersion time of the silicon wafer in the stO4-H202 and HCl-HzOz-Hzo mixtures is 1525 minutes respectively; the ultrasonic cleaning frequency is 13 MHz, and the duration is 1020 minutes. Preferably, in step 3, the microwave-assisted chemical vapor deposition uses SiH4 and NH3 as gas sources, reacting at 800900 °C for 3040 minutes. Preferably, in step 4, the molar ratio of silicon carbide, zinc sulde, and polyimide is 0.6:0.3:0.1; the mass fraction of nano-alumina is 5%10%, and the particle size is 50100 nm. Preferably, in step 4, the power for magnetron sputtering deposition is 150200 W, and the deposition rate is 0.51 nm / s. Preferably, in step 5, the CH3SiH2 gas mixture contains 2%4% Oz and 85%90% N2; the radio frequency power for deposition is 100150 W, the deposition temperature is 300400 °C, and the deposition duration is 2030 minutes. Preferably, in step 5, the wavelength of pulsed laser annealing is 532 nm, the energy density is 0.20.5 J / cmz, and the number of pulses is 1020. Compared with the existing technology, the benecial effects of the present invention are as follows: Through plasma activation and the porous structural design of the nanocrystalline silicon nitride layer, the invention increases the interlayer bonding strength of multilayer passivation layers by more than 40%, effectively suppressing interlayer delamination. ZnS and nano A1203 particles in the composite functional layer form a physical barrier, extending the failure time of the semiconductor material to over 5000 hours under a damp heat environment of 85 °C / 85% relative humidity. Pulsed laser annealing promotes elemental interdiffusion at the interface, forming a thermally stable Si-O-C-N transition layer, which reduces the performance degradation rate of the device by 60% under high temperatures of 300 °C. Description of the Drawings FIG. 1 is a process ow diagram of the method disclosed in the present invention; FIG. 2 is a schematic diagram of the microwave-assisted CVD deposition of the nanocrystalline silicon nitride layer in the present invention; FIG. 3 is a schematic diagram of the magnetron sputtering deposition of the composite functional layer in the present invention; FIG. 4 is a schematic diagram of the PE-CVD deposition of the terpolymer protective layer in the present invention. Detailed Description The following provides a clear and complete description of the technical solutions in the embodiments of the present invention in conjunction With the embodiments. It is apparent that the described embodiments are merely part of the present invention and not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by those skilled in the art without creative efforts fall within the scope of protection of the present invention. Referring to FIGs. 1-4, the present invention provides a high-efciency passivation treatment method for semiconductor material surfaces, comprising the following steps: Step 1, surface purication treatment: immersing the semiconductor material in a solution of specied concentration for ultrasonic cleaning; after removal, rinsing with deionized water, followed by drying in a vacuum environment; Step 2, thermal oxide lm removal: for semiconductor materials with a formed thermal oxide lm, soaking in HF solution is applied; after cleaning and drying, the material surface undergoes argon plasma treatment; Step 3, rst passivation: comprising the preparation of a silicon nitride substrate and the deposition of a nanocrystalline silicon nitride layer; (1) Preparation of silicon nitride substrate: immersing the silicon wafer sequentially in a stO4-H202 mixture and a HCl-HzOz-Hzo mixture to remove metallic impurities; then performing ultrasonic cleaning at 120 °C; (2) Deposition of nanocrystalline silicon nitride layer: using microwave-assisted chemical vapor deposition to form a nanocrystalline Si3N4 interfacial layer with a thickness of 50100 nm on the surface of the semiconductor, this layer possesses a porous structure to enhance the adhesion of subsequent coatings; Step 4, second passivation: comprising preparation of a multicomponent composite target and magnetron sputtering deposition; (1) Preparation of multicomponent composite target: mixing silicon carbide, zinc sulde, and polyimide, adding nano-alumina, and sintering at 500600 °C for 23 h to prepare the composite target; (2) Magnetron sputtering deposition: under a vacuum of 10'4 Pa, using Ar as the sputtering gas to form a SiC-ZnS-PI composite functional layer with a thickness of 200 300 nm, this layer provides both corrosion resistance and insulating properties; Step 5, third passivation: comprising plasma-enhanced chemical vapor deposition (PE-CVD) and interfacial reinforcement treatment; (1) Plasma-enhanced chemical vapor deposition (PE-CVD): placing the pretreated semiconductor material into a deposition chamber, introducing a diluted CH3SiH2 and NH3 mixed gas for deposition to form a Si-C-N-O terpolymer protective layer; (2) Interfacial reinforcement treatment: immediately after deposition, performing pulsed laser annealing to promote interlayer elemental diffusion and form a 510 nm transitional interfacial layer. In step 1, the semiconductor material is ultrasonically cleaned in a uoride solution with a concentration of 25 %3 0% for 2040 minutes at an ultrasonic frequency of 40 60 kHz to remove surface organic contaminants; after removal, the material is rinsed with deionized water three times, each rinse lasting 510 minutes, and then dried for 3060 minutes in a vacuum environment With a pressure 5103 Pa. In step 2, for semiconductor materials with a formed thermal oxide lm, a HF solution with a concentration of lS%20% is used for soaking for 1015 minutes, assisted by megasonic ultrasound at 5080 kHz to accelerate the stripping of the oxide lm; after cleaning and drying, the material surface undergoes argon plasma treatment at a power of 100200 W for 510 minutes to activate surface active sites. In step 3, the volume ratio of the H2SO4-H2O2 mixture is 3: 1, and that of the HCl- H2O2-H2O mixture is 1:125; the immersion time of the silicon wafer in the H2SO4-H2O2 and HCl-H2O2-H2O mixtures is 1525 minutes respectively; the ultrasonic cleaning frequency is 13 MHZ, and the duration is 1020 minutes. In step 3, the microwave-assisted chemical vapor deposition uses SiH4 and NH3 as gas sources, reacting at 800900 °C for 3040 minutes. In step 4, the molar ratio of silicon carbide, zinc sulde, and polyimide is 0.6:0.3:0.l; the mass fraction of nano-alumina is 5%10%, and the particle size is 50 100 nm. In step 4, the power for magnetron sputtering deposition is 150200 W, and the deposition rate is 0.51 nm / s. In step 5, the CH3SiH2 gas mixture contains 2%4% O2 and 85%90% N2; the radio frequency power for deposition is 100150 W, the deposition temperature is 300 400 °C, and the deposition duration is 2030 minutes. In step 5, the wavelength of pulsed laser annealing is 532 nm, the energy density is 0.20.5 J / cmz, and the number of pulses is 1020. Embodiment 1: A high-efciency passivation treatment method for semiconductor material surfaces comprises the following steps: Ultrasonic Cleaning and Vacuum Drying: The semiconductor material is completely immersed in a uoride solution with a concentration of 28% and treated using an ultrasonic cleaning device operating at a frequency of 50 kHz. During the cleaning process, high-frequency vibrations generated by ultrasound produce numerous microscopic cavitation bubbles in the liquid. The intense impact force generated upon the collapse of these bubbles effectively removes organics, particulate contaminants, and some metallic impurities adhered to the material surface. The cleaning duration is set to 30 minutes to ensure complete detachment of contaminants from the surface. Upon completion of cleaning, the semiconductor material is promptly transferred to a vacuum drying chamber and dried for 40 minutes under reduced pressure. Lowering the ambient pressure accelerates surface moisture evaporation, preventing the introduction of new impurities or surface oxidation due to residual moisture during the drying process. HF Solution Etching and Plasma Treatment: HF Solution Soaking: A hydrouoric acid (HF) solution with a concentration of 18% is prepared, and the pretreated semiconductor material is illy submerged in it. HF solution exhibits strong corrosiveness and chemically reacts with the surface oxide layer of the semiconductor material to dissolve and remove it. At the same time, it performs microscopic etching on the surface to create a more uniform, atomically clean surface. During the soaking process, ultrasound assistance at 60 kHz is applied. The cavitation effect of the ultrasound further accelerates the chemical reaction, ensuring more thorough and uniform etching. The soaking time is controlled at 12 minutes to ensure complete oxide removal while avoiding excessive etching damage to the material body. Argon Plasma Treatment: The soaked semiconductor material is taken out, rinsed thoroughly with deionized water, dried, and then placed in plasma treatment equipment. High-purity argon gas is introduced as the working gas to form a plasma environment within the equipment. The power is set at 150 W, and the treatment duration is 8 minutes. High-energy particles in the argon plasma interact with the semiconductor surface to further remove residual trace contaminants and reaction by-products. On the other hand, surface atoms of the material are activated, making them more conducive to bonding with subsequent passivation layers, thus creating ideal conditions for follow-up surface passivation treatments. First Passivation Pretreatment Step: The silicon wafer is fully immersed in a mixed solution prepared by blending concentrated sulfuric acid (H2804) and hydrogen peroxide (H202) in a specic ratio and soaked for 20 minutes. This step aims to utilize the strong oxidative capability of the mixed solution to remove organic contaminants, metal impurities, and native oxide layers from the silicon wafer surface. After soaking, the wafer is cleaned using an ultrasonic cleaning device operating at a frequency of 2 MHZ for 15 minutes. The cavitation effect of high-frequency sound waves efciently eliminates residual impurities while avoiding physical damage. CVD Deposition Process: Nanocrystalline silicon nitride (Si3N4) layers are deposited on the wafer surface using microwave chemical vapor deposition (Microwave CVD) technology. Specic process parameters are as follows: silane (SiH4) gas ow rate is controlled at 50 standard cubic centimeters per minute (sccm), ammonia (NH3) ow rate is 100 sccm, deposition temperature is set to 850 °C, and the reaction duration is 35 minutes. A compact Si3N4 passivation layer approximately 80 nm thick is ultimately formed, which effectively suppresses surface states and reduces carrier recombination rates. Second Passivation Target Preparation: Nano-powdered alumina (A1203) is used as an additive and mixed into the target material at a mass ratio of 8%. After thorough mixing, the composite material is sintered at a high temperature of 550 °C for 2.5 hours. This solid- state reaction process enhances the density of the target, ensuring uniform material release during the subsequent sputtering process. Magnetron Sputtering Process: Magnetron sputtering equipment is employed, with the power set to 180 W. In a vacuum environment, atoms from the target material are sputtered onto the wafer surface, forming an Al203 thin lm with a thickness of 250 nm. This lm possesses excellent dielectric properties and further isolates the semiconductor surface from external environmental inuences. Third Passivation PE-CVD Treatment: Plasma-enhanced chemical vapor deposition (PE-CVD) technology is used. Oxygen (02) and nitrogen (N2) gases are introduced into the reaction chamber at volume ratios of 3% and 88%, respectively. The reaction proceeds at a relatively low temperature of 350 °C for 25 minutes, forming a passivating silicon ll oxynitride (SiOxNy) layer. The low-temperature process avoids damage to previously deposited thin-lm structures while enhancing interfacial stability. Laser Annealing Reinforcement: A laser annealing process is used for post- treatment of the surface, with the energy density set at 0.3 joules per square centimeter (J / cmz). The surface is locally heated using 15 laser pulses. Laser annealing promotes atomic diffusion and chemical bond reconstruction through instantaneous high temperatures, further optimizing the interfacial properties between the thin lm and the silicon substrate and enhancing overall passivation efciency. Embodiment 2: A high-efciency passivation treatment method for semiconductor material surfaces comprises the following steps: Fluoride Solution Treatment: A uoride solution with a concentration of 25% is used to treat the semiconductor material. With the aid of an ultrasonic cleaning device, the ultrasonic time is set to 40 minutes and the frequency to 40 kHz, in order to enhance the cleaning effect and remove surface impurities from the material. After the treatment, the material is placed in a vacuum drying chamber and dried for 60 minutes to ensure no residual moisture remains on the surface. HF Solution Treatment and Plasma Treatment: The semiconductor material is soaked in a hydrouoric acid (HF) solution with a concentration of 15% for 15 minutes to further clean the surface and improve surface activity. Subsequently, plasma treatment is carried out with a set power of 100 W for 10 minutes. Through the physical and chemical actions of the plasma, rened surface treatment is achieved. First Passivation Mixed Solution Soaking and Ultrasonic Cleaning: The silicon wafer is immersed in an HCl-H202-H20 mixed solution and soaked for 25 minutes. The chemical action of the mixed solution provides a passivation pretreatment to the wafer surface. After soaking, an ultrasonic cleaning device operating at a frequency of 1 MHz is used to deeply clean the wafer for 20 minutes, removing surface residues and improving surface cleanliness. Deposition of Nanocrystalline Si3N4 Layer: Using chemical vapor deposition (CVD) technology, a nanocrystalline Si3N4 layer with a thickness of 100 nm is deposited on the surface of the wafer over 40 minutes at a high temperature of 800 °C, forming the rst passivation protection barrier. Second Passivation Target Composition Ratio and Sintering: The molar ratio of the target material is precisely adjusted to SiC:ZnS:PI = 0.55:0.35:0.1, with the addition of 5% nano A1203 to optimize material performance. The prepared target is subj ected to a sintering process at a temperature of 500 °C to ensure full material integration and attainment of the desired physicochemical properties. Magnetron Sputtering Treatment: Magnetron sputtering technology is employed, with a sputtering rate set to 0.8 nm / s, to deposit a thin lm with a thickness of 300 nm on the surface of the semiconductor material. This further enhances the surface passivation effect and protective performance. Third Passivation Gas Ratio and Temperature Control: in the CH3SiH2 diluted gas, the 02 ratio is precisely controlled at 2%, and N2 at 90%, while maintaining the processing environment temperature at 300 °C. Through chemical reactions among the gases, a passivation layer is formed on the material surface. Laser Annealing Treatment: Laser annealing treatment is carried out using a laser with a wavelength of 532 nm, with the energy density set to 0.2 J / cmz. The material surface undergoes 20 laser pulses of treatment. Through the thermal and photochemical effects of the laser, the crystalline structure of the material surface and the quality of the passivation lm are optimized, thereby improving overall performance. Embodiment 3: A high-efciency passivation treatment method for semiconductor material surfaces comprises the following steps: Fluoride Solution Treatment: A uoride solution with a concentration of 30% is prepared, and the semiconductor material is completely immersed in the solution and placed in an ultrasonic cleaning machine. The ultrasonic time is set to 20 minutes and the frequency to 60 kHz. High-frequency vibrations promote full interaction between the solution and surface impurities of the material. After treatment, vacuum drying equipment is used to dry the material for 30 minutes in a vacuum environment, avoiding secondary contamination from airborne impurities. HF Solution and Plasma Treatment: A hydrouoric acid (HF) solution with a concentration of 20% is used to soak the material for 10 minutes. The corrosiveness of HF removes surface oxides. After soaking, the material is transferred to plasma treatment equipment, with the processing power set to 200 W and treatment duration of 5 minutes. Plasma bombardment further cleans the surface and activates surface atoms of the material. First Passivation Microwave CVD Treatment: the cleaned silicon wafer undergoes high- temperature microwave chemical vapor deposition (CVD) treatment. The wafer is placed in a reaction chamber and heated to 900 °C, with SiH4 gas introduced (at a ow rate of 60 sccm) and NH3 gas (at 120 sccm). Under the effects of high temperature and microwave excitation, the gases decompose and deposit on the wafer surface, forming a nanocrystalline layer with a thickness of 50 nm. This crystalline layer effectively isolates the external environment from direct contact with the wafer surface, thereby achieving initial passivation. Second Passivation Target Preparation and Sintering: 10% nano Al203 powder is added to the target material. Through thorough mixing and pressing, a composite target is formed. The composite target is placed in a high-temperature sintering furnace, with the sintering temperature set to 600 °C and a holding time of 2 hours. The nano A1203 is uniformly dispersed and tightly bonded with the bulk of the target material, thereby enhancing target performance. Magnetron Sputtering Deposition: Magnetron sputtering technology is employed with the sputtering power set to 200 W. Material from the composite target is sputtered onto the surface of the semiconductor material, and deposition continues until a passivation lm with a thickness of 200nm is formed. This enhances the chemical stability and insulation of the material surface. Third Passivation PE-CVD Treatment: Plasma-enhanced chemical vapor deposition (PE-CVD) technology is applied, with the reaction chamber temperature controlled at 400 °C. A mixed gas (4% 02, 85% N2, with the remainder being carrier gases required for the reaction) is introduced. Under plasma excitation, the gases chemically react and deposit on the material surface, forming a passivation layer with a special structure. The treatment duration is 20 minutes. Laser Annealing Treatment: Laser annealing equipment is used with the energy density set to 0.5 J / cmz. The surface treated by PE-CVD is subjected to 10 pulsed laser shots. The instantaneous high temperature from the laser causes the surface atoms to rearrange, further optimizing the structure of the passivation layer and enhancing the passivation effect. Performance Testing of Embodiment 1, Embodiment 2, Embodiment 3, and Existing technology The performance of Embodiment 1, Embodiment 2, Embodiment 3, and the existing technology was tested. The results are shown in the following table: Test Item Embodiment 1 Embodiment 2 Embodiment 3 Existing technology Interlayer 12.5 11.8 13.2 8.5 Bonding Strength (MPa) Damp Heat 5500 5200 5800 3000 Failure Time (h) Performance 15 1 8 12 3 0 Degradation Rate at 300 °C (%) In summary, the present invention signicantly enhances the surface passivation effect of semiconductor materials through multidimensional process innovations and exhibits broad industrial application prospects. Although the invention has been described in detail with reference to the foregoing embodiments, those skilled in the art may still make modications to the technical solutions described in the above embodiments or make equivalent substitutions for some technical features. Any modications, equivalent substitutions, or improvements made within the spirit and principle of the present invention shall fall within the protection scope of the present invention. l7
Claims
l . An efcient surface passivation treatment method for semiconductor materials, characterized by comprising the following steps: Step 1, Surface purification treatment: immersing the semiconductor material in a solution of specified concentration for ultrasonic cleaning; after removal rinse with deionized water, followed by drying in a vacuum environment; Step 2, Thermal Oxide Film Removal: For Semiconductor Materials with a formed thermal oxide film is applied by immersion in HF solution; after cleaning and drying, the material surface undergoes an argon plasma treatment; Step 3, First Passivation: Including the preparation of a silicon oxide substrate and the deposition of a nanocrystalline silicon oxide nitrite layer; (1) Preparation of the silicon oxide substrate: the successive immersing the silicon wafer in a H2SO4-H2O2 mixture and a HCl-H2O2 H2O mixture to remove metal impurities; then ultrasonic perform cleaning at 120 °C; (2) Deposition of nanocrystalline silicon oxide nitrite layer: using Microwave-assisted chemical vapor deposition creates an interfacial layer of nanocrystalline Si3N4 with a thickness of 50100 nm on the surface of the semiconductor material formed; Step 4, Second Passivation: Including the preparation of a multi-component composite target and magnetron sputter deposition; (l) Preparation of the multicomponent composite target: mixing of l8 silicon carbide, zinc sulfide and polyimide, adding nano-alumina, and sintering at 500600 °C for 23 hours to prepare the composite target; (2) Magnetron sputter deposition: under a vacuum of 10-4 Pa, with Ar as sputtering gas is used to produce a SiC-ZnS-PI composite functional layer with a thickness of 200 300 nm formed; Step 5, Third Passivation: Comprehensive Plasma Enhanced Chemical Vapor Deposition (PE-CVD) and interfacial strengthening treatment; (1) Plasma enhanced chemical vapor deposition (PE-CVD): the pretreated semiconductor material is placed in a deposition chamber, in which a diluted mixture of CH3 SiH2 and NH3 is introduced for the deposition of a Si-C- NO terpolymer protective layer; (2) Interfacial strengthening treatment; pulsed treatment is applied immediately after deposition laser heating performed to promote element diffusion between the layers and formation of a 510 nm transition interface layer.
2. The efcient surface passivation treatment method for semiconductor materials according to claim 1, characterised in that in step 1 the semiconductor material is ultrasonically cleaned in a fluoride solution with a concentration of 25%30% for 2040 minutes at an ultrasonic frequency of 4060 kHz to remove organic contaminants from the surface; after removal, the material is rinsed three times with deionized water, each rinsing process takes 510 minutes, followed by drying for 3060 minutes in a vacuum environment with a pressure of 510-3 Pa.
3. The efcient surface passivation treatment method for semiconductor materials according to claim 1, characterized in that in step 2, for semiconductor materials with a formed thermal oxide film, an HF solution with a concentration of lS%20% is used for immersion for 1015 minutes, supported by megasonic ultrasonic cleaning at 5080 kHz Acceleration of the release of the oxide film; after cleaning and drying it undergoes material surface an argon plasma treatment at a power of 100200W for 510 minutes to activate surface-active sites.
4. The efcient surface passivation treatment method for semiconductor materials according to claim 1, characterized in that in step 3 the volume ratio of the H2SO4-H202 mixture is 3:1, and that of the HCl-H202- H2O mixture 1115; the immersion time of the silicon wafer in the H2SO4- H2O2 and HCl-H2O2-H2O mixture are respectively 1525 minutes; the frequency of ultrasonic cleaning is 13 MHZ, with a duration of 1020 minutes.
5. The efcient surface passivation treatment method for semiconductor materials according to claim 1, characterized in that in step 3 the Microwave-assisted chemical vapor deposition uses SiH4 and NH3 as gas sources, reacting at 800900 OC for 3040 minutes.
6. The efcient surface passivation treatment method for semiconductor materials according to claim 1, characterized in that in step 4 the molar ratio of silicon carbide, zinc sulfide and polyimide is 0.6:0.3:0.1; the mass percentage of nano-alumina is 5%10%, and the particle size is 50 100 nm.
7. The efcient surface passivation treatment method for semiconductor materials according to claim 1, characterized in that in step 4 the power for magnetron sputter deposition is 150200 W, and the deposition rate is 0.5 1 nm / s is.
8. The efcient surface passivation treatment method for semiconductor materials according to claim 1, characterized in that in step 5 the CH3SiH2 gas mixture contains 2%4% O2 and 85%90% N2; it radio frequency power for deposition is 100150 W, the deposition temperature is 300400 °C, and the deposition time is 2030 minutes.
9. The efcient surface passivation treatment method for semiconductor materials according to claim 1, characterized in that in step 5 the golength of pulsed laser heating is 532 nm, the energy density is 0.20.5 J / cm2, and the number of pulses is 1020. Surface purification on treatment Step 1 Thermal oxide film removal Step 2 First liabilities on Step 3 Second liabilities on Step 4 Third liabilities on Step 5 FIG. 1