UHF Software-Defined Radio Platform

Abstract

This utility model relates to radio equipment. The technical result is a reduction in power consumption and FPGA load by using microcircuits with integrated hardware units for receiving typical modulation and coding types. To achieve this, a software-defined UHF radio platform is proposed. The receiver path includes a radio receiver with hardware demodulation modules, the inputs of which are connected to two radio input channels and the output to a programmable logic integrated circuit (FPGA), which also has a radio receiver control channel with hardware demodulation modules.A quadrature digital-to-analog converter is installed in the transmitting path, with its input connected to the FPGA output, and its output to a square mixer with a phase-locked loop (PLL), the output of which is connected to the radio output channel, a thermostatted crystal frequency generator, with its outputs connected to the FPGA and the square mixer with a PLL, and a phase-locked loop block is connected to the FPGA input. 1 fig.

Description

[0001] Field of technology to which the utility model belongs

[0002] The utility model relates to electronic equipment, namely to the designs of printed circuit boards of software-defined radio devices, and can be used in equipment associated with the reception and transmission of information via radio.

[0003] Technology Level

[0004] Analogues:

[0005] USRP B200 SDR Kit - Single Channel Transceiver (70 MHz - 6 GHz): [website]. - Ettus Research. - URL: https: / / www.ettus.com / all-products / ub200-kit / (accessed: 09.12.2025).

[0006] USRP N300: [website]. - Ettus Research. - URL: https: / / www.ettus.com / all-products / usrp-n300 / (accessed: 09.12.2025).

[0007] USRP X300: [website]. - Ettus Research. - URL: https: / / www.ettus.com / all-products / x300-kit / (accessed: 09.12.2025).

[0008] SDR Hack RF One boards made in Russia: [website]. - ELRON.tech. - URL: https: / / elron.tech / russian-hack-rf-one / (accessed: 09.12.2025).

[0009] RU (11) 238 785 (13) U1

[0010] Known analogues perform the function of software-defined radio:

[0011] "SDR-based systems support multiple protocols, can quickly toggle operating frequencies, change modulation types, adaptively adjust transceiver operating parameters, and programmatically adjust signal quality. SDR transceivers allow for rapid system changes as new requirements and communication standards emerge simply by updating the software."

[0012] Disadvantages of analogs:

[0013] - insufficient isolation of radio channels for reception and transmission,

[0014] - lack of hardware solutions for receiving standard modulations and coding,

[0015] - unable to connect to Ethernet network,

[0016] - lack of a built-in processor for the operating system,

[0017] - limited number of settings,

[0018] - high power consumption, - high cost.

[0019] The closest analogue is the USRP B200 prototype.

[0020] "The USRP B200 series devices provide a compact and low-cost hardware foundation for Software-Defined Radio (SDR) systems, enabling rapid design and implementation of flexible software-defined radio systems.

[0021] Continuous frequency range from 70MHz to 6GHz, 56MHz bandwidth, Spartan 6 FPGA, fully integrated radio paths, high-speed USB 3.0 connectivity and bus power provide the ideal platform to quickly start a variety of RF signal experiments, including FM, TV, cellular, WiFi and more.

[0022] The B200 model contains one receiver channel and one transmitter channel, is powered directly by the USB bus, and is a basic model for experimenting with signals."

[0023] The disadvantages of the prototype are the lack of a processor, one microcircuit is used to receive and transmit radio signals, which worsens the isolation between them, there is no Ethernet interface.

[0024] The technical result of the utility model is: the use of microcircuits with built-in hardware units for receiving typical types of modulations and coding will reduce the load on the programmable logic integrated circuit (hereinafter referred to as FPGA) and reduce energy consumption.

[0025] Disclosure of the essence of the utility model

[0026] This technical result is achieved by fundamentally increasing the complexity and expansion of the hardware platform (board) architecture. Instead of a circuit based on a single transceiver chip and FPGA, a design has been created that additionally includes: a central processing unit with a network controller; separate, functionally specialized receive and transmit chips equipped with their own hardware computing units; and a functional unit for supplying control signals (clock frequency and voltage).

[0027] The user implements the software for the processor and FPGA independently, writes it to the device, after which it functions according to the user's needs.

[0028] This organization of the device makes the utility model the basis for creating solutions for various specialized tasks.

[0029] Brief description of drawings

[0030] The essence of the utility model is explained by a drawing, which is a diagram of the arrangement of electronic components on a board (Fig. 1 - electrical structural diagram).

[0031] Implementation of a utility model

[0032] Device description in statics.

[0033] The UHF software-defined radio platform is a sheet of non-conductive PCB (15) on which the following electronic components are arranged in a unique pattern (electrical circuit):

[0034] - radio receiver with hardware demodulation modules (FPGA) (3),

[0035] - power injection and clock control (4),

[0036] - thermostatic quartz frequency generator (5),

[0037] - square mixer with PLL (6),

[0038] - quadrature digital-to-analog converter (quadrature DAC) (7),

[0039] - read-only memory (ROM memory No. 1) (8),

[0040] - phase-locked loop (hereinafter referred to as PLL) 100 MHz (9),

[0041] - processor (10),

[0042] - random access memory (RAM) (11),

[0043] - another read-only memory device (ROM memory #2) (12),

[0044] - Ethernet interface 1 (13),

[0045] - Ethernet interface 2 (14).

[0046] All electronic components are connected to each other by printed copper tracks (conductors), which carry electrical signals. Supply voltage ranges from 12 to 24 V (1).

[0047] Device operation

[0048] To receive and transmit analog radio signals, the device contains two receiver channels and one transmitter channel.

[0049] The device communicates with external devices via the Ethernet interface: receives and sends commands, and exchanges information.

[0050] The received information and commands are processed by the processor, then transmitted to the FPGA via the PCI interface. The FPGA configures all chips and components related to the radio section, generating a quadrature digital signal with specified modulation and encoding for transmission to the quadrature PAC chip via a parallel 14-bit interface. An analog signal is generated at the DAC output, which is converted to the required frequency using a quadrature mixer chip with an integrated PLL frequency generator. The received signal is fed to the device's radio output channel, where power and a reference frequency, controlled by the FPGA, are also injected.

[0051] The device has two radio input channels for receiving radio signals. Power and a reference frequency are injected into them, controlled by an FPGA. The received radio signal enters a chip with integrated hardware signal reception units, which receives commands from the FPGA to configure parameters and performs reception, demodulation, and decoding of the signal. The received data is transmitted to the FPGA via parallel interfaces, processing up to eight channels simultaneously. The FPGA then extracts useful information from the received data and transmits it to the processor via the PCI interface. Depending on the software, the processor either processes the information internally or sends it to external devices via the Ethernet interface.

[0052] Power supply voltage from 12 to 24 V. Frequency range from 0.9 to 2.1 GHz. Stable clocking for the transmitting part of the device is provided by a high-precision thermostatted crystal oscillator.

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