FPGA-based digital signal generator for intermittent arc fault protection against ground faults

Abstract

This utility model pertains to electrical engineering, specifically relay protection and automation devices, and is intended for use in ground fault protection measurement systems. The technical result consists of increasing the reliability of intermittent arc fault detection by accurately determining pulse current parameters in real time without the use of specialized analog filters, through their digital emulation and adaptation to the actual signal using an FPGA. The device comprises an analog-to-digital converter (ADC) with a high sampling rate, connected to an input current transformer, and a programmable logic integrated circuit (FPGA). The ADC output is connected to the FPGA input. The FPGA incorporates an adaptive filter tuning unit, which calculates the coefficients of the adaptive filter, configured to completely suppress the input digital signal.The FPGA's complex frequency determination block is configured to determine the characteristic roots of the specified adaptive filter and, based on these, the complex frequencies of the signal components. The FPGA's component analysis block, using the determined complex frequencies and the original signal samples, determines the complex amplitudes of the components. Based on the determined parameters (complex frequencies and amplitudes), a control signal is generated for the protection block.

Description

[0001] The utility model relates to the field of electrical engineering, namely to relay protection and automation devices (RPA) of electrical systems, and is intended for use in the measuring path of ground fault protection in electrical networks with isolated and compensated neutral.

[0002] The device is intended to be implemented using high-performance Xilinx Virtex-4 (e.g., XC4VSX35, XC4VFX40, XC4VSX55), Virtex-5 (e.g., XC5VLX30, XC5VSX240T), Virtex-6 (e.g., XC6VLX130T, XC6VSX475T) and Virtex-7 (e.g., XC7A200T, XC7K480T) FPGAs.

[0003] A single-phase ground fault often manifests as an intermittent, short-term arc fault. Such intermittent arc faults are considered dangerous if the interval between them is reduced to tens of milliseconds, as this can lead to a more severe damage condition.

[0004] Various methods and devices for detecting such short circuits are known from the prior art.

[0005] A device for generating a controlled signal is described in patent RU 2629375 C1. In this device, the input protection signal is converted to digital using an ADC. The transient component is then extracted from the digital signal using a digital bandpass filter and converted into a control signal (e.g., an RMS value). A disadvantage of this approach is the need for a high ADC sampling rate to adequately extract the high-frequency components of short pulses, which complicates implementation.

[0006] The closest analogue (prototype) to the claimed utility model is a device implementing the method described in patent WO 2005038474 A1. In this prototype, the transient component of the digital input signal is extracted using a digital bandpass filter and then transformed using a discrete Fourier transform (DFT). The digital bandpass filter and DFT are implemented in a microprocessor. A disadvantage of this prototype is the low reliability of detecting short-term pulsed intermittent arc currents at an insufficiently high sampling rate, as the measured peak value may differ significantly from the actual value due to samples falling on the pulse edge rather than the peak. At the same time, a high sampling rate of the digital input signal increases the demands on the microprocessor's computing resources.

[0007] The problem solved by the claimed utility model is to increase the accuracy and reliability of determining the parameters (peak values ​​and frequency composition) of pulse currents that occur during intermittent arc faults, without the need to complicate the analog part of the measuring path and increase the requirements for the computing resources of the device.

[0008] The technical result consists in increasing the reliability of detecting an intermittent arc fault due to digital signal processing with a high sampling frequency in an FPGA, which makes it possible not only to filter the signal, but also to determine its precise parametric characteristics (complex frequencies and amplitudes of components) and synthesize a control signal based on them.

[0009] The technical result is achieved in that the device for generating a controlled signal for digital protection against ground faults during intermittent arc faults based on FPGA contains:

[0010] Analog-to-digital converter (ADC) with high sampling rate, the input of which is intended to be connected to a protection input signal source (for example, a zero-sequence current transformer or phase current transformer);

[0011] a programmable logic integrated circuit (FPGA) whose input is connected to the ADC output to receive a digital signal.

[0012] The following are implemented in the FPGA:

[0013] adaptive filter setting block, configured to completely suppress the input digital signal, the input of which is connected to the ADC output.;

[0014] a complex frequency determination unit configured to determine the complex frequencies of the components of the input signal corresponding to the characteristic roots of the adaptive filter, based on the coefficients of the adaptive models, wherein the input of the unit is connected to the output of the adaptive filter tuning unit;

[0015] a component analysis unit configured to determine the complex amplitudes of the components of the input signal based on the found complex frequencies and samples of the original digital signal, the first input of which is connected to the output of the complex frequency determination unit, and the second input to the output of the ADC;

[0016] a control signal generation unit, the first input of which is connected to the output of the complex frequency determination unit, the second input to the component analysis unit, and the output is the output of the device, wherein the generation unit is configured to generate a control signal based on certain complex frequencies and amplitudes of the components of the input signal.

[0017] Intermittent arc faults are accompanied by short-term pulsed currents, the shape and frequency content of which can vary significantly. Traditional methods using filtering or Fourier transform have limited time and frequency resolution.

[0018] The claimed device proposes a different approach. The essence of the utility model is explained by the block diagram of the device shown in the figure. The input analog signal is fed to ADC 1 with a high sampling frequency (e.g. 10 - 100 kHz), which allows the shape of a short pulse to be captured in high detail. The digitized signal goes to FPGA 2.

[0019] The key feature is the use of parametric spectral analysis methods implemented in hardware in the FPGA. For this purpose, the adaptive filter tuning unit 3 is used. Its essence lies in the fact that it implements an adaptive filter, the coefficients which are adjusted in such a way that the filter output signal is as close to zero as possible (complete suppression of the input signal).

[0020] Mathematically, this means that the adaptive filter implemented by the adaptive filter tuning block 3 models the input signal as the sum complex exponentials (damped sinusoids). The transfer function of such a filter-analyzer has the form:

[0021]

[0022] where – coefficients of adaptive filter adjustment;

[0023] – adaptive filter order;

[0024] – z-transform operator.

[0025] The coefficients are transmitted to the output of the adaptive filter tuning block. .

[0026] Roots of the filter characteristic polynomial (denominator of the transfer function) are the poles of the model and are uniquely conjugated with the complex frequencies components of the input signal containing frequency information ( ) and decay rate ( ) of each component of the input signal. The complex frequency determination block 4 determines these complex frequencies components of the input signal.

[0027] Knowing complex frequencies , component analysis block 5 solves a system of linear equations to find complex amplitudes component:

[0028]

[0029] Control signal generation block 6 uses these parameters to generate the control signal This control signal may be, for example:

[0030] peak value of reconstructed current pulse;

[0031] high frequency component envelope;

[0032] a synthesized signal of a given duration, the amplitude of which is strictly proportional to the energy of the original pulse.

[0033] Because the control signal is generated based on the precise parameters of the original pulse, rather than randomly generated samples, the reliability of dangerous fault detection is significantly increased. The use of an FPGA allows this to be achieved without complicating the analog portion of the measurement path or increasing the device's computing requirements. This enables reliable discrimination between dangerous modes with a pulse repetition rate of less than 70 ms and non-dangerous ones, even if the original ADC samples do not fall precisely on the pulse peak. Furthermore, the device operates reliably with a peak width of 0.5 ms.

[0034] Thus, the stated technical result is achieved.

Claims

A device for generating a controlled signal for digital protection against ground faults during intermittent arc faults based on an FPGA, comprising an analog-to-digital converter with a high sampling frequency, the input of which is intended for connection to a source of the input protection signal, and at its output a digital signal is generated, characterized in that a programmable logic integrated circuit is introduced into it, the input of which is connected to the output of the analog-to-digital converter, implementing an adaptive filter tuning unit configured to completely suppress the input digital signal, the input of which is connected to the output of the ADC, a complex frequency determination unit configured with the possibility of determining the complex frequencies of the components of the input signal corresponding to the characteristic roots of the adaptive filter, based on the coefficients of the adaptive models, wherein the input of the unit is connected to the output of the adaptive digital filter, a component analysis unit,configured to determine the complex amplitudes of the components of the input signal based on the found complex frequencies and samples of the original digital signal, the first input of which is connected to the output of the complex frequency determination unit, and the second input to the ADC output, a control signal generation unit, the first input of which is connected to the output of the complex frequency determination unit, the second input is connected to the component analysis unit, and the output is the output of the device, wherein the generation unit is configured to generate a control signal based on the determined complex frequencies and amplitudes of the components of the input signal.

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