Carriers synchronizing methed of parallel inverter and system thereof

Abstract

The present disclosure provides a carriers synchronizing method of a parallel inverter. A low-frequency ripple simulating step is performed to drive a high-frequency controlling unit to simulate a low-frequency ripple according to a simulation program. An equidistant grid sampling step is performed to drive the high-frequency controlling unit to sample a high-frequency carrier according to an equidistant grid to generate a high-frequency standard group, and sample the low-frequency ripple according to the equidistant grid and a plurality of reference shifting angles to generate a plurality of low-frequency reference groups. An actual shifting angle searching step is performed to drive the high-frequency controlling unit to compare the high-frequency standard group with the low-frequency reference groups to search an actual shifting angle from the reference shifting angles. A high-frequency carrier adjusting step is performed to drive a proportional integral controller to calculate the actual shifting angle according to an adjusting program to generate a sync reference, and then a period counter adjusts a starting point of the high-frequency carrier according to the sync reference. Therefore, the high-frequency carrier is synchronized to a low-frequency carrier.

Description

[Technical Field]

[0001] This invention relates to a carrier synchronization method and system, and more particularly to a carrier synchronization method and system for a parallel converter applied to an uninterruptible power supply system. [Previous Technology]

[0002] In modern times, with dwindling natural resources and ever-increasing electricity demand, unsustainable power generation methods such as nuclear power and fossil fuel power generation cause numerous environmental problems. Developing sustainable green energy has become an international trend, driving the rapid development of distributed power generation and power electronics technologies. Most green energy conversion devices operate grid-connected to improve the stability of distributed power systems. When grid problems occur, maintaining the energy of distributed power generation systems and providing timely power to loads until the grid stabilizes requires the assistance of uninterruptible power systems (UPS).

[0003] With the increasing power of parallel converters used in uninterruptible power systems (UPS), the key to eliminating or compensating for the ripple current of low-frequency high-power converters lies in synchronizing the drive signals (i.e., pulse-width modulation (PWM) signals) of the low-frequency high-power converter and the high-frequency low-power converter. Conventional synchronization methods use the low-frequency high-power converter as the primary converter. The control board of the low-frequency high-power converter sends a synchronization signal to the control board of the high-frequency low-power converter via signal lines, and the drive signal of the control board is synchronized from the peak.

[0004] However, the additional signal line has parasitic parameters that cause signal delay. Compensating for this delay requires manual timing correction, complicating the system. If the high-frequency and low-frequency control boards still operate at the composite frequency, it means there will be noise interference between them. Furthermore, this signal line may act as an antenna, easily absorbing unwanted noise from the environment, thus affecting the logic decisions of the high-frequency and low-frequency control boards. Therefore, conventional synchronization methods make the system unreliable and complex.

[0005] In view of this, in view of the problems existing in the conventional synchronization method, how to establish a carrier synchronization method and system that avoids the use of redundant signal lines and parallel converters is what the public earnestly hopes for, and it is also the goal and direction that relevant industries must strive to develop and break through. [Summary of the Invention]

[0006] Therefore, the object of the present invention is to provide a carrier synchronization method and system for a parallel converter, which can synchronize a high-frequency carrier to a low-frequency carrier without using additional signal lines.

[0007] According to an embodiment of the present invention, a carrier synchronization method for a parallel converter is provided, which is used to synchronize a high-frequency carrier to a low-frequency carrier. The carrier synchronization method for a parallel converter includes a converter paralleling step, a low-frequency ripple simulation step, an equidistant grid sampling step, an actual offset angle search step, and a high-frequency carrier adjustment step. The converter paralleling step involves paralleling a low-frequency high-power converter and a high-frequency low-power converter, wherein the low-frequency high-power converter is controlled by the low-frequency carrier, and the high-frequency low-power converter is controlled by the high-frequency carrier. The low-frequency ripple simulation step drives a high-frequency control unit to simulate a low-frequency ripple corresponding to one of the low-frequency high-power converters according to a simulation program, wherein the high-frequency control unit includes a proportional-integral controller and a period counter, the period counter being used to generate a high-frequency carrier. The equidistant grid sampling step drives the high-frequency control unit to sample the high-frequency carrier according to an equidistant grid to generate a high-frequency reference set, and samples the low-frequency ripple according to the equidistant grid and a complex reference offset angle to generate a complex low-frequency reference set, wherein these low-frequency reference sets respectively correspond to these reference offset angles. The actual offset angle search step involves driving the high-frequency control unit to compare the high-frequency reference group with these low-frequency reference groups to search for an actual offset angle between the high-frequency carrier and the low-frequency carrier from these reference offset angles. The high-frequency carrier adjustment step involves driving the proportional-integral controller to calculate the actual offset angle according to an adjustment program to generate a synchronization parameter, and then the period counter adjusts one of the starting points of the high-frequency carrier according to the synchronization parameter.

[0008] Accordingly, the carrier synchronization method of the parallel converter of the present invention obtains the actual offset angle between the high-frequency carrier and the low-frequency carrier by simulating low-frequency ripples, and uses the actual offset angle to synchronize the high-frequency carrier towards the low-frequency carrier, so as to achieve high dynamic response and avoid using high-frequency and high-power components to synchronize the high-frequency carrier, thereby improving the freedom of circuit configuration.

[0009] Other embodiments of the foregoing implementation are as follows: The carrier synchronization method of the foregoing parallel converter further includes a high-frequency carrier synchronization step. The high-frequency carrier synchronization step drives the high-frequency control unit to re-execute the equidistant grid sampling step, the actual offset angle search step, and the high-frequency carrier adjustment step according to the adjusted high-frequency carrier, until the starting point of the high-frequency carrier of the current cycle is equal to the starting point of the high-frequency carrier of the next cycle, thereby synchronizing the high-frequency carrier to the low-frequency carrier.

[0010] Other embodiments of the foregoing implementation are as follows: The aforementioned low-frequency ripple simulation step includes a current acquisition step and a data storage step. The current acquisition step drives the high-frequency control unit to acquire an inductor current from a low-frequency inductor connected to the low-frequency high-power converter through a current sensor. The data storage step drives the high-frequency control unit to store a low-frequency switching duty ratio, a DC voltage, and an output voltage corresponding to one of the low-frequency high-power converters. The high-frequency control unit calculates the inductor current, low-frequency switching duty ratio, DC voltage, and output voltage according to the simulation program to generate low-frequency ripple.

[0011] Other embodiments of the aforementioned implementation are as follows: The aforementioned simulation program includes a first inflection point, a second inflection point, and a slope. The first inflection point is represented as , the second inflection point is represented as , and the slope is represented as and conforms to the following formula: ; ;.

[0012] wherein, is a first time, is a second time, is a maximum current value of low-frequency ripple, is a minimum current value of low-frequency ripple, is a positive value of slope, is a low-frequency ripple period, is a low-frequency switching duty ratio, is a given period, is a DC voltage, is an output voltage, is an inductor current difference, and is an inductance value.

[0013] Other embodiments of the foregoing implementation are as follows: The aforementioned equidistant grid sampling step includes a high-frequency carrier cutting step and a low-frequency ripple cutting step. The high-frequency carrier cutting step drives the high-frequency control unit to cut a complex number of reference points from the high-frequency carrier according to the equidistant grid, wherein these reference points are high-frequency reference groups. The low-frequency ripple cutting step drives the high-frequency control unit to cut a complex number of reference points from the low-frequency ripple according to the equidistant grid, corresponding to each reference offset angle, wherein these reference points corresponding to each reference offset angle are each low-frequency reference group.

[0014] Other embodiments of the aforementioned implementation are as follows: In the aforementioned actual offset angle search step, the high-frequency reference group includes a complex number of reference points, each reference point corresponding to a reference vector. Each low-frequency reference group includes a complex number of reference points, each reference point corresponding to a reference vector. The high-frequency control unit performs an inner product operation on the complex number of reference vectors and the complex number of reference vectors in these low-frequency reference groups according to a binary search algorithm, so as to select the reference offset angle corresponding to the one with the largest inner product value as the actual offset angle.

[0015] Other embodiments of the aforementioned implementation are as follows: The aforementioned adjustment procedure includes a synchronization parameter, an actual offset angle, and an integral gain. The synchronization parameter is expressed as , the actual offset angle is expressed as , and the integral gain is expressed as and conforms to the following formula: .

[0016] wherein, is a given period.

[0017] According to another embodiment of the present invention, a carrier synchronization system for a parallel converter is provided for synchronizing a high-frequency carrier to a low-frequency carrier. The carrier synchronization system for the parallel converter includes a low-frequency high-power converter, a low-frequency control unit, a high-frequency low-power converter, and a high-frequency control unit. The low-frequency control unit is electrically connected to and controls the low-frequency high-power converter and is used to generate a low-frequency carrier. The high-frequency low-power converter is connected in parallel to the low-frequency high-power converter. The high-frequency control unit is electrically connected to and controls the high-frequency low-power converter, and includes a proportional-integral controller and a period counter, the period counter being used to generate the high-frequency carrier. The high-frequency control unit is configured to implement a low-frequency ripple simulation step, an equidistant grid sampling step, an actual offset angle search step, and a high-frequency carrier adjustment step. The low-frequency ripple simulation step simulates a low-frequency ripple corresponding to the low-frequency high-power converter according to a simulation program. The equidistant grid sampling step samples a high-frequency carrier wave based on an equidistant grid to generate a high-frequency reference set, and samples low-frequency ripples based on the equidistant grid and complex reference offset angles to generate complex low-frequency reference sets, where these low-frequency reference sets correspond to these reference offset angles respectively. The actual offset angle search step compares the high-frequency reference sets with these low-frequency reference sets to search for an actual offset angle between the high-frequency carrier and the low-frequency carrier from these reference offset angles. The high-frequency carrier adjustment step drives the proportional-integral controller to calculate the actual offset angle according to an adjustment program to generate a synchronization parameter, and then the period counter adjusts one of the starting points of the high-frequency carrier according to the synchronization parameter.

[0018] Accordingly, the carrier synchronization system of the parallel converter of the present invention compares the high-frequency reference group and the low-frequency reference group with different reference offset angles to obtain the actual offset angle between the high-frequency carrier and the low-frequency carrier, and uses the actual offset angle to synchronize the high-frequency carrier towards the low-frequency carrier, so as to achieve high dynamic response and avoid using high-frequency and high-power components to synchronize the high-frequency carrier, thereby improving the freedom of circuit configuration.

[0019] Other embodiments of the foregoing implementation are as follows: The foregoing high-frequency control unit further implements a high-frequency carrier synchronization step. The high-frequency carrier synchronization step re-executes the equidistant grid sampling step, the actual offset angle search step, and the high-frequency carrier adjustment step based on the adjusted high-frequency carrier until the starting point of the high-frequency carrier in the current cycle is equal to the starting point of the high-frequency carrier in the next cycle, thereby synchronizing the high-frequency carrier to the low-frequency carrier.

[0020] Other embodiments of the foregoing implementation are as follows: The aforementioned low-frequency ripple simulation step includes a current acquisition step and a data storage step. The current acquisition step drives the high-frequency control unit to acquire an inductor current from a low-frequency inductor connected to the low-frequency high-power converter through a current sensor. The data storage step drives the high-frequency control unit to store a low-frequency switching duty ratio, a DC voltage, and an output voltage corresponding to one of the low-frequency high-power converters. The high-frequency control unit calculates the inductor current, low-frequency switching duty ratio, DC voltage, and output voltage according to the simulation program to generate low-frequency ripple.

[0021] Other embodiments of the aforementioned implementation are as follows: The aforementioned simulation program includes a first inflection point, a second inflection point, and a slope. The first inflection point is represented as , the second inflection point is represented as , and the slope is represented as and conforms to the following formula: ; ;.

[0022] wherein, is a first time, is a second time, is a maximum current value of low-frequency ripple, is a minimum current value of low-frequency ripple, is a positive value of slope, is a low-frequency ripple period, is a low-frequency switching duty ratio, is a given period, is a DC voltage, is an output voltage, is an inductor current difference, and is an inductance value.

[0023] Other embodiments of the foregoing implementation are as follows: The aforementioned equidistant grid sampling step includes a high-frequency carrier cutting step and a low-frequency ripple cutting step. The high-frequency carrier cutting step drives the high-frequency control unit to cut a plurality of reference points from the high-frequency carrier according to the equidistant grid, wherein these reference points are high-frequency reference groups. The low-frequency ripple cutting step drives the high-frequency control unit to cut a plurality of reference points from the low-frequency ripple according to the equidistant grid, corresponding to each reference offset angle, wherein these reference points corresponding to each reference offset angle are each low-frequency reference group.

[0024] Other embodiments of the aforementioned implementation are as follows: In the aforementioned actual offset angle search step, the high-frequency reference group includes a complex number of reference points, each reference point corresponding to a reference vector. Each low-frequency reference group includes a complex number of reference points, each reference point corresponding to a reference vector. The high-frequency control unit performs an inner product operation on the complex number of reference vectors and the complex number of reference vectors in these low-frequency reference groups according to a binary search algorithm, so as to select the reference offset angle corresponding to the one with the largest inner product value as the actual offset angle.

[0025] Other embodiments of the aforementioned implementation are as follows: The aforementioned adjustment procedure includes a synchronization parameter, an actual offset angle, and an integral gain. The synchronization parameter is expressed as , the actual offset angle is expressed as , and the integral gain is expressed as and conforms to the following formula: .

[0026] wherein, is a given period.

Implementation Method

[0028] Several embodiments of the present invention will now be described with reference to the drawings. For clarity, many practical details will be set forth in the following description. However, it should be understood that these practical details are not intended to limit the invention. That is, in some embodiments of the invention, these practical details are not essential. Furthermore, for the sake of simplicity, some conventional structures and elements will be shown in the drawings in a simple schematic manner; and repeated elements may be denoted by the same number.

[0029] Furthermore, in this document, when a component (or unit or module, etc.) is "connected / linked" to another component, it can mean that the component is directly connected / linked to the other component, or it can mean that the component is indirectly connected / linked to the other component, that is, there is another component between the component and the other component. Only when it is explicitly stated that a component is "directly connected / linked" to another component does it mean that there is no other component between the component and the other component. The terms "first," "second," "third," etc., are only used to describe different components and do not limit the components themselves. Therefore, the first component can also be referred to as the second component. Moreover, the combination of components / units / circuits in this document is not a combination that is generally known, conventional, or customary in this field. Whether the component / unit / circuit itself is customary cannot be used to determine whether its combination relationship is easily completed by someone with ordinary knowledge in the art.

[0030] Please refer to Figure 1, which is a flowchart illustrating a carrier synchronization method 100 for a parallel converter according to a first embodiment of the present invention. As shown in Figure 1, the carrier synchronization method 100 for a parallel converter is used to synchronize a high-frequency carrier to a low-frequency carrier, and includes a converter parallel connection step S01, a low-frequency ripple simulation step S02, an equidistant grid sampling step S03, an actual offset angle search step S04, and a high-frequency carrier adjustment step S05.

[0031] The parallel connection step S01 involves connecting a low-frequency high-power converter (LFHPI) and a high-frequency low-power converter (HFLPI) in parallel. The low-frequency high-power converter is controlled by a low-frequency carrier, and the high-frequency low-power converter is controlled by a high-frequency carrier.

[0032] The low-frequency ripple simulation step S02 drives a high-frequency control unit to simulate the low-frequency ripple of one of the corresponding low-frequency high-power converters according to a simulation program. The high-frequency control unit includes a proportional-integral controller and a period counter, which is used to generate a high-frequency carrier.

[0033] The equidistant grid sampling step S03 drives the high-frequency control unit to sample a high-frequency carrier wave according to an equidistant grid to generate a high-frequency reference group, and samples low-frequency ripples according to the equidistant grid and complex reference offset angles to generate complex low-frequency reference groups. These low-frequency reference groups correspond to these reference offset angles respectively.

[0034] Actual offset angle search step S04: The high-frequency control unit drives the high-frequency reference group to compare with these low-frequency reference groups respectively, so as to search for an actual offset angle between the high-frequency carrier and the low-frequency carrier from these reference offset angles.

[0035] In the high-frequency carrier adjustment step S05, the proportional-integral controller is driven to calculate the actual offset angle according to an adjustment program to generate a synchronization parameter. Then, the period counter adjusts one of the starting points of the high-frequency carrier according to the synchronization parameter.

[0036] Accordingly, the carrier synchronization method 100 of the parallel converter of the present invention obtains the actual offset angle between the high-frequency carrier and the low-frequency carrier through simulated low-frequency ripple, and uses the actual offset angle to synchronize the high-frequency carrier toward the low-frequency carrier, so as to achieve high dynamic response and avoid using high-frequency and high-power components to synchronize the high-frequency carrier, thereby improving the freedom of circuit configuration.

[0037] Please refer to Figure 2, which is a flowchart illustrating a carrier synchronization method 200 for a parallel converter according to a second embodiment of the present invention. As shown in Figure 2, the carrier synchronization method 200 for a parallel converter includes a converter parallel connection step S11, a low-frequency ripple simulation step S12, an equidistant grid sampling step S13, an actual offset angle search step S14, and a high-frequency carrier adjustment step S15. The converter parallel connection step S11, the actual offset angle search step S14, and the high-frequency carrier adjustment step S15 are all the same as the steps corresponding to the carrier synchronization method 100 for a parallel converter, and therefore will not be described again.

[0038] In particular, the carrier synchronization method 200 of the parallel converter may further include a high-frequency carrier synchronization step S16. The high-frequency carrier synchronization step S16 drives the high-frequency control unit to re-execute the equidistant grid sampling step S13, the actual offset angle search step S14, and the high-frequency carrier adjustment step S15 according to the adjusted high-frequency carrier 120, until the starting point of the high-frequency carrier 120 of the current cycle is equal to the starting point of the high-frequency carrier 120 of the next cycle, thereby gradually synchronizing the high-frequency carrier 120 to the low-frequency carrier 110.

[0039] In the above-described carrier synchronization method 200 for parallel converters, a low-frequency high-power converter is connected in parallel with a high-frequency low-power converter to form a parallel converter, and an analog program and an adjustment program can be executed through a high-frequency control unit. The following paragraphs will describe in detail the operation mechanism of the carrier synchronization method 200 for parallel converters of the present invention with reference to the following figures and embodiments.

[0040] Table 1 below lists the circuit symbols corresponding to Figure 5 of the present invention to facilitate understanding of the present invention. Table 1 symbol definition DC voltage ~ Low-frequency switching elements R-phase output terminal of low-frequency high-power converter S-phase output terminal of low-frequency high-power converter T-phase output terminal of low-frequency high-power converter The R-phase inductor current output from the R-phase output terminal S-phase inductor current output from the S-phase output terminal The T-phase inductor current output from the T-phase output terminal ~ High-frequency switching elements R-phase output terminal of high-frequency low-power converter S-phase output terminal of high-frequency low-power converter T-phase output terminal of high-frequency low-power converter The R-phase inductor current output from the R-phase output terminal S-phase inductor current output from the S-phase output terminal The T-phase inductor current output from the T-phase output terminal R-phase low-frequency inductor S-phase low-frequency inductor T-phase low-frequency inductor R-phase high-frequency inductor S-phase high-frequency inductor T-phase high-frequency inductor R-phase capacitor S-phase capacitor T-phase capacitor The output voltage across the R-phase capacitor of the filter Output voltage across the S-phase capacitor of the filter Output voltage across the T-phase capacitor of the filter R-phase output capacitor current S-phase output capacitor current T-phase output capacitor current R-phase load current S-phase load current T-phase load current R-phase AC terminal inductance S-phase AC terminal inductance T-phase AC terminal inductance R-phase AC terminal voltage S-phase AC terminal voltage T-phase AC terminal voltage

[0041] Please refer to Figures 3, 4, and 5 together, wherein Figure 3 is a block diagram of a carrier synchronization system 300 for a parallel converter according to a third embodiment of the present invention; Figure 4 is a block diagram of a high-frequency control unit 340 according to Figure 3; and Figure 5 is a circuit diagram of the carrier synchronization system 300 for a parallel converter according to Figure 3. It should be noted that the carrier synchronization system 300 for a parallel converter in the third embodiment is used to implement the carrier synchronization methods 100 and 200 for the parallel converter, and can synchronize a high-frequency carrier 120 to a low-frequency carrier 110.

[0042] As shown in Figures 3-5, the parallel converter carrier synchronization system 300 includes a low-frequency high-power converter 310, a high-frequency low-power converter 320, a low-frequency control unit 330, a high-frequency control unit 340, a DC power supply 350, a filter 360, and a power grid 370. The DC power supply 350 is electrically connected to the low-frequency high-power converter 310, the high-frequency low-power converter 320, the low-frequency control unit 330, and the high-frequency control unit 340, and provides power. The high-frequency low-power converter 320 is connected in parallel with the low-frequency high-power converter 310 to form a parallel converter for use in uninterruptible power systems.

[0043] The low-frequency control unit 330 is electrically connected to the low-frequency high-power converter 310 and is used to generate a low-frequency carrier 110, and then convert the low-frequency carrier 110 to output a first pulse-width modulation (PWM) signal 111, thereby controlling the switching duty ratio of the low-frequency high-power converter 310.

[0044] The high-frequency control unit 340 is electrically connected to the high-frequency low-power converter 320 and may include a memory 341, a processor 342, a proportional-integral controller 343, and a cycle counter 344. The memory 341 is used to access an analog program 3411, an adjustment program 3412, a binary search algorithm 3413, a low-frequency switching duty ratio corresponding to the low-frequency high-power converter 310, a DC voltage, and an output voltage (i.e., any one of the output voltages in Table 1). The processor 342 is electrically connected to the memory 341 and is used to execute the analog program 3411. The processor 342 may be a digital signal processor (DSP), a microprocessor (MPU), a central processing unit (CPU), or other electronic processor, but the present invention is not limited thereto.

[0045] The proportional-integral controller 343 and the cycle counter 344 are electrically connected to the memory 341. The proportional-integral controller 343 is used to execute the adjustment program 3412. The cycle counter 344 is used to generate a high-frequency carrier 120 and transmit the high-frequency carrier 120 to the memory 341. The processor 342 converts the high-frequency carrier 120 to output a second pulse width modulation signal 121, thereby controlling the switching duty ratio of the high-frequency low-power converter 320. Furthermore, in the third embodiment, the low-frequency high-power converter 310 and the high-frequency low-power converter 320 may be a full-bridge converter, but the invention is not limited thereto. In other embodiments, the low-frequency high-power converter and the high-frequency low-power converter may also be a half-bridge converter or other types of converters.

[0046] Filter 360 is electrically connected to low-frequency high-power converter 310, high-frequency low-power converter 320, low-frequency control unit 330, and high-frequency control unit 340, and can be an LCL filter. The power grid 370 is electrically connected to filter 360. Specifically, the DC terminals of low-frequency high-power converter 310 and high-frequency low-power converter 320 are connected in parallel to each other to jointly receive DC power 350. The output terminal of filter 360 is connected in parallel to the power grid 370 to supply DC power 350 to the downstream power grid 370, or to receive three-phase AC power from the power grid 370 and perform the opposite conversion (i.e., AC to DC).

[0047] The following continues to explain the calculation mechanism of the carrier synchronization method 200 of the parallel converter of the present invention. Please refer to Figures 2-5 together.

[0048] In the carrier synchronization method 200 of the parallel converter, the low-frequency ripple simulation step S12 may include a current acquisition step S121 and a data storage step S122. The current acquisition step S121 drives the high-frequency control unit 340 to acquire an inductor current 130 from a low-frequency inductor connected to the low-frequency high-power converter 310 through a current sensor (not shown separately). Specifically, the current sensor may be a Hall sensor, which acquires the corresponding R-phase inductor current, S-phase inductor current, or T-phase inductor current from any one of the R-phase low-frequency inductors, S-phase low-frequency inductors, and T-phase low-frequency inductors in Figure 5 as the inductor current 130.

[0049] The data storage step S122 drives the memory 341 of the high-frequency control unit 340 to store the low-frequency switching duty ratio, DC voltage and output voltage of the corresponding low-frequency high-power converter 310. The processor 342 of the high-frequency control unit 340 calculates the inductor current 130, low-frequency switching duty ratio, DC voltage and output voltage according to the simulation program 3411 to simulate the low-frequency carrier 110 used to control the low-frequency high-power converter 310 and generate low-frequency ripple 140.

[0050] Please refer to Figures 2-5 and 6 together, wherein Figure 6 is a schematic diagram illustrating the low-frequency ripple simulation step S12 of the carrier synchronization method 200 of the parallel converter in Figure 2. In the low-frequency ripple simulation step S12, the simulation program 3411 may include a first inflection point, a second inflection point and a slope. The first inflection point is represented as, the second inflection point is represented as, and the slope is represented as and conforms to the following equations (1), (2) and (3): (1); (2); (3).

[0051] Wherein, is a first time, is a second time, is a maximum current value of the low-frequency ripple 140, is a minimum current value of the low-frequency ripple 140, is a positive value of the slope, is a low-frequency ripple period, is a low-frequency switching duty ratio, is a given period, is a DC voltage, is an output voltage, is an inductor current difference between the current period and the previous period, and is an inductance value. In detail, the high-frequency control unit 340 predicts the low-frequency carrier 110 through the low-frequency ripple 140 simulated from the simulation program 3411. The low-frequency ripple 140 can be represented by a first inflection point, a second inflection point, and a slope, wherein the first inflection point from a positive slope to a negative slope can be calculated using the low-frequency switching duty ratio, and the second inflection point is derived from the first inflection point.

[0052] Please refer to Figures 2-6 and 7 together, where Figure 7 is a schematic diagram illustrating the low-frequency ripple cutting step S132 of the carrier synchronization method 200 of the parallel converter in Figure 2. The equidistant grid sampling step S13 may include a high-frequency carrier cutting step S131 and a low-frequency ripple cutting step S132. The high-frequency carrier cutting step S131 drives the processor 342 of the high-frequency control unit 340 to cut the high-frequency carrier 120 into 8 reference points according to the equidistant grid (as shown in Figure 8). These 8 reference points constitute a high-frequency reference group 142.

[0053] In the low-frequency ripple cutting step S132, the processor 342 of the high-frequency control unit 340 cuts the low-frequency ripple 140 into multiple reference points corresponding to each reference offset angle according to the equidistant grid. The multiple reference points corresponding to each reference offset angle are the low-frequency reference groups 141. It should be noted that Figure 7 only shows the multiple reference points 0, 1, 2, 3, 4, 5, 6, 7 cut through one of the reference offset angles, and the reference offset angle can be 0~360 degrees.

[0054] As shown in Figure 7, the length of the equidistant grid can be the time length of one high-frequency carrier cycle. After offsetting the equidistant grid by a reference offset angle, the processor 342 then cuts out eight reference points 0, 1, 2, 3, 4, 5, 6, and 7 from the low-frequency ripple 140 according to the offset equidistant grid. These eight reference points 0, 1, 2, 3, 4, 5, 6, and 7 constitute one low-frequency reference group 141. Similarly, the processor 342 can offset the equidistant grid by another reference offset angle, and then cut out another eight reference points from the low-frequency ripple 140 according to the offset equidistant grid, as another low-frequency reference group 141, and so on to generate multiple low-frequency reference groups 141. In addition, the processor 342 temporarily stores the aforementioned sampled high-frequency reference group 142 and multiple low-frequency reference groups 141 in a first-in-first-out (FIFO) buffer inside the processor 342.

[0055] In the actual offset angle search step S14, each reference point of the high-frequency reference group 142 corresponds to a reference vector. Each reference point 0, 1, 2, 3, 4, 5, 6, 7 in these low-frequency reference groups 141 also corresponds to a reference vector. The processor 342 of the high-frequency control unit 340 performs an inner product operation on the plurality of reference vectors and the plurality of reference vectors of these low-frequency reference groups 141 according to the binary search algorithm 3413 in the memory 341, so as to select the reference offset angle corresponding to the one with the largest inner product value as the actual offset angle 150.

[0056] In detail, the binary search algorithm 3413 is mainly used to search for the offset angle between the high-frequency carrier 120 and the low-frequency ripple 140. To this end, the present invention treats eight reference points as eight reference vectors and eight reference points 0, 1, 2, 3, 4, 5, 6, and 7 as eight reference vectors. It is well known that the inner product of orthogonal vectors is zero, and collinear or parallel vectors of the same length will produce the maximum inner product value. In this embodiment, the processor 342 performs a one-to-one inner product operation between the eight reference vectors and the eight reference vectors of the low-frequency reference group 141 corresponding to different reference offset angles. Therefore, the reference offset angle corresponding to the one with the maximum inner product value represents the actual angle difference between the high-frequency carrier 120 and the low-frequency ripple 140, and this angle represents the actual offset angle difference of 150° between the high-frequency carrier 120 and the low-frequency carrier 110.

[0057] Please refer to Figures 2-7 and 8 together, wherein Figure 8 is a schematic diagram illustrating the high-frequency carrier adjustment step S15 of the carrier synchronization method 200 of the parallel converter in Figure 2. In the high-frequency carrier adjustment step S15, the adjustment procedure 3412 may include a synchronization parameter, an actual offset angle 150°, and an integral gain. The synchronization parameter is expressed as, the actual offset angle 150° is expressed as, and the integral gain is expressed as and conforms to the following formula (4): (4).

[0058] Where is a given period. Specifically, the actual offset angle 150 is used to find the difference between the intersection of the synchronization target and the period counter 344 and the synchronization parameters. To this end, the proportional-integral controller 343 executes the adjustment procedure 3412 to correct the synchronization parameters. First, the proportional-integral controller 343 calculates the synchronization parameters of the current period by substituting the actual offset angle 150 into the above equation (4). Then, the period counter 344 adjusts the starting point O of one of the high-frequency carriers 120 according to the synchronization parameters of the current period, so that the high-frequency carrier 120 is gradually synchronized to the low-frequency ripple 140 used to predict the low-frequency carrier 110.

[0059] Please refer to Figures 2-8 and 9 together, wherein Figure 9 is a schematic diagram illustrating the first pulse width modulation signal 111 corresponding to the low-frequency carrier 110 and the second pulse width modulation signal 121 corresponding to the adjusted high-frequency carrier 120 of the present invention. In the high-frequency carrier synchronization step S16, the high-frequency control unit 340 re-executes the equidistant grid sampling step S13, the actual offset angle search step S14, and the high-frequency carrier adjustment step S15 based on the adjusted high-frequency carrier 120 after adjusting the starting point O, until the starting point O of the high-frequency carrier 120 of the current cycle is equal to the starting point O of the high-frequency carrier 120 of the next cycle. Thereby, the adjusted high-frequency carrier 120 is gradually synchronized to the low-frequency carrier 110; in other words, the second pulse width modulation signal 121 is also gradually synchronized to the first pulse width modulation signal 111 (as shown in Figure 9), and the error between the first pulse width modulation signal 111 and the second pulse width modulation signal 121 can be -0.12%. Furthermore, due to the imperfections of the oscillator, the switching period of the low-frequency high-power converter 310 is variable. Therefore, the proportional-integral controller 343 can execute an adjustment program 3412 once every N cycles of the low-frequency high-power converter 310. In this embodiment, N can be 25, but the invention is not limited thereto.

[0060] In summary, the present invention has the following advantages: First, it utilizes simulated low-frequency ripples to find the actual offset angle between the low-frequency carrier and the high-frequency carrier, and then gradually adjusts the high-frequency carrier to synchronize with the low-frequency carrier. Second, it achieves high dynamic response and avoids using high-frequency, high-power components to synchronize the high-frequency carrier, thereby increasing the freedom of circuit configuration. Third, since there is no need to use extra signal lines to synchronize the high-frequency carrier, noise interference between the low-frequency control unit and the high-frequency control unit is reduced.

[0061] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Any person skilled in the art can make various modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims. [Simplified Explanation of the Diagram]

[0027] To make the above and other objects, features, advantages and embodiments of the present invention more apparent and understandable, the accompanying drawings are described as follows: Figure 1 is a flowchart illustrating a carrier synchronization method for a parallel converter according to a first embodiment of the present invention; Figure 2 is a flowchart illustrating a carrier synchronization method for a parallel converter according to a second embodiment of the present invention; Figure 3 is a block diagram illustrating a carrier synchronization system for a parallel converter according to a third embodiment of the present invention; Figure 4 is a block diagram illustrating a high-frequency control unit according to Figure 3; Figure 5 is a circuit diagram illustrating the carrier synchronization system for a parallel converter according to Figure 3; Figure 6 is a schematic diagram illustrating the low-frequency ripple simulation step of the carrier synchronization method for the parallel converter in Figure 2; Figure 7 is a schematic diagram illustrating the low-frequency ripple cutting step of the carrier synchronization method for the parallel converter in Figure 2. Figure 8 is a schematic diagram illustrating the high-frequency carrier adjustment steps of the carrier synchronization method of the parallel converter in Figure 2; and Figure 9 is a schematic diagram illustrating the first pulse width modulation signal corresponding to the low-frequency carrier and the second pulse width modulation signal corresponding to the adjusted high-frequency carrier of the present invention.

Claims

1. A carrier synchronization method for a parallel converter, used to synchronize a high-frequency carrier to a low-frequency carrier, the carrier synchronization method comprising the following steps: a converter paralleling step, wherein a low-frequency high-power converter and a high-frequency low-power converter are connected in parallel, wherein the low-frequency high-power converter is controlled by the low-frequency carrier, and the high-frequency low-power converter is controlled by the high-frequency carrier; a low-frequency ripple simulation step, wherein a high-frequency control unit is driven to simulate a low-frequency ripple corresponding to the low-frequency high-power converter according to a simulation program, wherein the high-frequency control unit includes a proportional-integral controller and a period counter, the period counter being used to generate the high-frequency carrier; an equidistant grid sampling step, wherein the high-frequency control unit is driven to sample the high-frequency carrier according to an equidistant grid to generate a high-frequency reference group, and to sample the low-frequency ripple according to the equidistant grid and a complex reference offset angle to generate a complex low-frequency reference group, wherein the low-frequency reference groups respectively correspond to the reference offset angles; An actual offset angle search step involves driving the high-frequency control unit to compare the high-frequency reference group with the low-frequency reference groups respectively, so as to search for an actual offset angle between the high-frequency carrier and the low-frequency carrier from the reference offset angles; and a high-frequency carrier adjustment step involves driving the proportional-integral controller to calculate the actual offset angle according to an adjustment program to generate a synchronization parameter, and then the period counter adjusts one of the starting points of the high-frequency carrier according to the synchronization parameter.

2. The carrier synchronization method for the parallel converter as described in claim 1 further includes: a high-frequency carrier synchronization step, which drives the high-frequency control unit to re-execute the equidistant grid sampling step, the actual offset angle search step, and the high-frequency carrier adjustment step according to the adjusted high-frequency carrier, until the starting point of the high-frequency carrier in the current period is equal to the starting point of the high-frequency carrier in the next period, thereby synchronizing the high-frequency carrier to the low-frequency carrier.

3. The carrier synchronization method for the parallel converter as described in claim 1, wherein the low-frequency ripple simulation step comprises: a current acquisition step, wherein the high-frequency control unit is driven to acquire an inductor current from a low-frequency inductor connected to the low-frequency high-power converter via a current sensor; and a data storage step, wherein the high-frequency control unit is driven to store a low-frequency switching duty ratio, a DC voltage, and an output voltage corresponding to the low-frequency high-power converter; wherein... The high-frequency control unit calculates the inductor current, the low-frequency switching duty ratio, the DC voltage, and the output voltage according to the simulation program to generate the low-frequency ripple.

4. The carrier synchronization method for a parallel converter as described in claim 1, wherein the simulation program includes a first inflection point, a second inflection point, and a slope, wherein the first inflection point is denoted as , the second inflection point is denoted as , and the slope is denoted as and satisfies the following formula: where For a first time, for a second time, for a maximum current value of the low-frequency ripple, for a minimum current value of the low-frequency ripple, for a positive value of the slope, for a low-frequency ripple period, for a low-frequency switching duty ratio, for a given period, for a DC voltage, for an output voltage, for an inductor current difference, and for an inductance value.

5. The carrier synchronization method for the parallel converter as described in claim 1, wherein the equidistant grid sampling step comprises: a high-frequency carrier cutting step, which drives the high-frequency control unit to cut a plurality of reference points from the high-frequency carrier according to the equidistant grid, wherein the reference points are the high-frequency reference group; and a low-frequency ripple cutting step, which drives the high-frequency control unit to cut a plurality of reference points from the low-frequency ripple according to the equidistant grid, corresponding to each of the reference offset angles, wherein the reference points corresponding to each of the reference offset angles are each of the low-frequency reference groups.

6. The carrier synchronization method for the parallel converter as described in claim 1, wherein in the actual offset angle search step, the high-frequency reference group includes a complex number of reference points, each reference point corresponding to a reference vector, and each low-frequency reference group includes a complex number of reference points, each reference point corresponding to a reference vector. The high-frequency control unit performs an inner product operation on the complex number of reference vectors and the complex number of reference vectors of the low-frequency reference groups according to a binary search algorithm, so as to select the reference offset angle corresponding to the one with the largest inner product value as the actual offset angle.

7. A carrier synchronization method for a parallel converter as described in claim 1, wherein the adjustment procedure includes the synchronization parameter, the actual offset angle, and an integral gain, wherein the synchronization parameter is expressed as , the actual offset angle is expressed as , and the integral gain is expressed as and satisfies the following formula: ; where For a given period.

8. A carrier synchronization system for a parallel converter for synchronizing a high-frequency carrier to a low-frequency carrier, the carrier synchronization system comprising: a low-frequency high-power converter; a low-frequency control unit electrically connected to and controlling the low-frequency high-power converter and for generating the low-frequency carrier; a high-frequency low-power converter connected in parallel to the low-frequency high-power converter; and a high-frequency control unit electrically connected to and controlling the high-frequency low-power converter, the high-frequency control unit comprising a proportional-integral controller and a period counter for generating the high-frequency carrier, the high-frequency control unit being configured to perform an operation comprising the following steps: a low-frequency ripple simulation step, which simulates a low-frequency ripple corresponding to the low-frequency high-power converter according to a simulation program; an equidistant grid sampling step, which samples the high-frequency carrier according to an equidistant grid to generate a high-frequency reference set, and samples the low-frequency ripple according to the equidistant grid and a complex reference offset angle to generate a complex low-frequency reference set, wherein the low-frequency reference sets respectively correspond to the reference offset angles; An actual offset angle search step involves comparing the high-frequency reference group with the low-frequency reference groups to search for an actual offset angle between the high-frequency carrier and the low-frequency carrier from the reference offset angles; and a high-frequency carrier adjustment step involves driving the proportional-integral controller to calculate the actual offset angle according to an adjustment program to generate a synchronization parameter, and then the period counter adjusts one of the starting points of the high-frequency carrier according to the synchronization parameter.

9. The carrier synchronization system of the parallel converter as described in claim 8, wherein the high-frequency control unit further performs an operation comprising the following steps: a high-frequency carrier synchronization step, which re-executes the equidistant grid sampling step, the actual offset angle search step, and the high-frequency carrier adjustment step based on the adjusted high-frequency carrier until the starting point of the high-frequency carrier in the current period is equal to the starting point of the high-frequency carrier in the next period, thereby synchronizing the high-frequency carrier to the low-frequency carrier.

10. The carrier synchronization system of the parallel converter as described in claim 8, wherein the low-frequency ripple simulation step comprises: a current acquisition step, wherein the high-frequency control unit is driven to acquire an inductor current from a low-frequency inductor connected to the low-frequency high-power converter via a current sensor; and a data storage step, wherein the high-frequency control unit is driven to store a low-frequency switching duty ratio, a DC voltage, and an output voltage corresponding to the low-frequency high-power converter; wherein... The high-frequency control unit calculates the inductor current, the low-frequency switching duty ratio, the DC voltage, and the output voltage according to the simulation program to generate the low-frequency ripple.

11. A carrier synchronization system for a parallel converter as described in claim 8, wherein the simulation program includes a first inflection point, a second inflection point, and a slope, wherein the first inflection point is denoted as , the second inflection point is denoted as , and the slope is denoted as and satisfies the following formula: where For a first time, for a second time, for a maximum current value of the low-frequency ripple, for a minimum current value of the low-frequency ripple, for a positive value of the slope, for a low-frequency ripple period, for a low-frequency switching duty ratio, for a given period, for a DC voltage, for an output voltage, for an inductor current difference, and for an inductance value.

12. The carrier synchronization system of the parallel converter as described in claim 8, wherein the equidistant grid sampling step comprises: a high-frequency carrier cutting step, which drives the high-frequency control unit to cut a plurality of reference points from the high-frequency carrier according to the equidistant grid, wherein the reference points are the high-frequency reference group; and a low-frequency ripple cutting step, which drives the high-frequency control unit to cut a plurality of reference points from the low-frequency ripple according to the equidistant grid, corresponding to each of the reference offset angles, wherein the reference points corresponding to each of the reference offset angles are each of the low-frequency reference groups.

13. The carrier synchronization system of the parallel converter as described in claim 8, wherein in the actual offset angle search step, the high-frequency reference group includes a complex number of reference points, each reference point corresponding to a reference vector, and each low-frequency reference group includes a complex number of reference points, each reference point corresponding to a reference vector. The high-frequency control unit performs an inner product operation on the complex number of reference vectors and the complex number of reference vectors of the low-frequency reference groups according to a binary search algorithm, so as to select the reference offset angle corresponding to the one with the largest inner product value as the actual offset angle.

14. A carrier synchronization system for a parallel converter as described in claim 8, wherein the adjustment procedure includes the synchronization parameter, the actual offset angle, and an integral gain, wherein the synchronization parameter is expressed as , the actual offset angle is expressed as , and the integral gain is expressed as and satisfies the following formula: ; where For a given period.

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