Prepreg, metal foil-clad laminate, printed wiring board, and semiconductor device
A prepreg with low dielectric properties and excellent drillability is achieved by using glass cloth with a specified SiO2 ratio and thermosetting compounds, addressing the challenges of existing PCBs in maintaining performance and adaptability.
TW202626898APending Publication Date: 2026-07-01MITSUBISHI GAS CHEM CO INC
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Patent Information
- Application Number
- TW114134075
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-09-10
- Filing Date
- 2025-09-05
- Publication Date
- 2026-07-01
AI Technical Summary
Technical Problem
Existing prepregs and printed circuit boards (PCBs) face challenges in maintaining low dielectric properties while ensuring excellent drillability and adaptability to diverse applications in electronic devices.
Method used
A prepreg is developed using glass cloth with a low dielectric constant and a specified SiO2 ratio, combined with thermosetting compounds such as maleimide compounds and aromatic resins, to achieve low dielectric properties and improved drillability.
Benefits of technology
The prepreg maintains low dielectric properties and enhances drilling processability, leading to improved performance in metal foil laminates and semiconductor devices.
✦ Generated by Eureka AI based on patent content.
Abstract
To provide a prepreg, a metal foil-clad laminate, a printed wiring board, and a semiconductor device. A prepreg according to the present disclosure comprises: a resin composition and / or a semi-cured product thereof; and a glass cloth, wherein the resin composition contains a thermosetting compound, the glass cloth has a dielectric constant of 4.4 or less at the frequency of 10 GHz as measured by a cavity perturbation method in accordance with JIS C218:2007, and the proportion of SiO2 in the glass cloth is 61-85 mass%.
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