Design methodologies, program products, and semiconductor memory devices
TW202627869APending Publication Date: 2026-07-01KIOXIA CORP
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Patent Information
- Application Number
- TW114119488
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-12-17
- Filing Date
- 2025-05-23
- Publication Date
- 2026-07-01
Abstract
The purpose of this invention is to suppress the thickness deviation of the resist pattern on a plurality of contact holes with different depths. The design method of the embodiment is a method for determining the configuration of a plurality of holes with different depths. When there is one or more design constraints, and when a resin layer is formed covering the plurality of holes with a first configuration satisfying one or more constraints, the thickness difference of the first layer caused by a portion of the resin layer flowing into the plurality of holes is calculated in the resin layer on the plurality of holes; it is determined whether the thickness difference of the first layer is below a specified upper limit value; if the thickness difference of the first layer exceeds the upper limit value, the configuration of the plurality of holes is changed to a second configuration satisfying one or more constraints. In this case, the thickness difference of the second layer generated in the resin layer on the plurality of holes is calculated; it is determined whether the thickness difference of the second layer is below an upper limit value; if the thickness difference of the second layer is below the upper limit value, the second configuration is adopted.
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