Memory device

Abstract

This invention improves the operational characteristics of a memory device. The memory device of an embodiment includes: a first string comprising a first memory cell and a first transistor; a second string comprising a second memory cell and a second transistor; a word line connected to the gates of the first and second memory cells; a first wiring connected to the gate of the first transistor; a second wiring connected to the gate of the second transistor and adjacent to the first wiring; and a control circuit that controls the operation of the first and second strings; wherein, when the control circuit performs an operation on the first string, it applies a positive first voltage to the word line, a positive second voltage to the first wiring, and a negative third voltage to the second wiring.