Memory device

Abstract

An embodiment of the present invention aims to suppress read interference from non-selected memory strings. The semiconductor memory device of this embodiment includes a memory string, which includes first and second selection transistors and a plurality of memory cells. During a read operation, a first voltage higher than ground is applied to the source line, and a second voltage is applied to the first and second selection gate lines connected to the selected memory string to turn on the first and second selection transistors. During the first period of the read operation, the second voltage is applied to the first selection gate line connected to the non-selected memory string. During the second period of the read operation following the first period, a third voltage is applied to the first selection gate line connected to the non-selected memory string. This third voltage is higher than ground and lower than the voltage obtained by adding a threshold value of the first selection transistor to the first voltage.