Semiconductor structure and method of forming the same
TW202628663APending Publication Date: 2026-07-01TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information
- Application Number
- TW114124292
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-05-01
- Filing Date
- 2025-06-27
- Publication Date
- 2026-07-01
Abstract
A method includes forming a first semiconductor layer and a second semiconductor layer overlapping the first semiconductor layer. The second semiconductor layer is spaced apart from the first semiconductor layer by a dielectric isolation layer. The method includes performing a first epitaxy process to form a lower source / drain region aside of the first semiconductor layer, forming a dummy contact etch stop layer over the lower source / drain region, forming a dummy inter-layer dielectric over the dummy contact etch stop layer, and performing a second epitaxy process to form an upper source / drain region aside of the second semiconductor layer, The upper source / drain region is over the dummy inter-layer dielectric. The dummy inter-layer dielectric and the dummy contact etch stop layer are removed to form a gap between the upper source / drain region and the lower source / drain region. A dielectric region is formed to fill the gap.
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