Electrostatic discharge (ESD) protection circuit and method of operating the same
TW202628691APending Publication Date: 2026-07-01TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD +1
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Patent Information
- Application Number
- TW114115287
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-12-19
- Filing Date
- 2025-04-23
- Publication Date
- 2026-07-01
Abstract
An integrated circuit includes a buffer circuit coupled between a first node and a second node, an input / output (IO) pad coupled to the buffer circuit, a first clamp circuit coupled between the IO pad and the second node, and a second clamp circuit coupled between the IO pad and the first node. The buffer circuit is configured to output a first signal to the IO pad. The first clamp circuit is configured to clamp a first electrostatic discharge (ESD) event at the IO pad or the second node. The second clamp circuit is configured to clamp a second ESD event at the IO pad or the first node.
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