Circuit design method and electronic device executing the circuit design method

Abstract

The invention provides a circuit design method and an electronic device for executing the circuit design method. The circuit design method includes the following steps: performing an IR drop analysis based on circuit placement data; selecting a target cell; replacing the target cell with a sub-cell; setting up a buffer cell; placing the buffer cell in an area; and connecting the sub-cell and the buffer cell with a routing.

Claims

1. An electronic device comprising: a memory for storing circuit layout data and a plurality of program codes and / or program instructions; and a computing circuit coupled to the memory for executing the program codes and / or program instructions to perform the following steps: performing a voltage drop analysis based on the circuit layout data; selecting a target cell; and replacing the target cell with a sub-cell, wherein, The sub-unit has substantially the same function or logic as the target unit; a buffer unit is provided; the buffer unit is placed in a region; and the sub-unit and the buffer unit are connected by a winding; wherein the region is adjacent to a unit, and a first voltage drop of the unit is less than a second voltage drop of the target unit; wherein the buffer unit is used to drive the unit.

2. The electronic device as claimed in claim 1, wherein, The target unit is a first target unit, the sub-unit is a first sub-unit, the buffer unit is a first buffer unit, the voltage drop analysis is a first voltage drop analysis, and the calculation circuit further performs the following steps: after placing the buffer unit in the area, solving the timing problem of the circuit layout based on the circuit layout data; performing a second voltage drop analysis based on the circuit layout data; and when a voltage drop of a second target unit is greater than or equal to a threshold, and the size of the second target unit is greater than or equal to a size threshold, replacing the second target unit with a second sub-unit, and setting a second buffer unit.

3. The electronic device as claimed in claim 2, wherein, The computing circuit further performs the following steps: placing the second sub-unit and the second buffer unit at the position of the second target unit.

4. The electronic device as claimed in claim 2, wherein, The unit is a first unit, the second target unit is adjacent to a second unit, and the second target unit and the second unit actually switch logic at the same time. The computing circuit further performs the following steps: replacing the second unit with a third sub-unit and setting a third buffer unit.

5. The electronic device as claimed in claim 4, wherein, The computing circuit further performs the following steps: placing the third sub-unit and the third buffer unit in the position of the second unit.

6. The electronic device as claimed in claim 1, wherein, A first dimension of the target cell is greater than the sum of a second dimension of the sub-cell and a third dimension of the buffer cell.

7. An electronic device comprising: a memory for storing circuit layout data and a plurality of program codes and / or program instructions; and a computing circuit coupled to the memory for executing the program codes and / or program instructions to perform the following steps: solving timing problems of the circuit layout based on the circuit layout data; performing a voltage drop analysis based on the circuit layout data; and when a voltage drop of a target cell is greater than or equal to a threshold, and the size of the target cell is greater than or equal to a size threshold, replacing the target cell with a sub-cell, and providing a buffer cell; wherein, The size of the target unit is greater than the sum of the size of the sub-unit and the size of the buffer unit, or the power consumption of the target unit is greater than the sum of the power consumption of the sub-unit and the power consumption of the buffer unit.

8. The electronic device as claimed in claim 7, wherein, The computing circuit further performs the following steps: placing the sub-unit and the buffer unit at the location of the target unit.

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