Systems and methods for mitigating clock signal drift

Abstract

A system comprising: a processing circuit; and a memory storing instructions, which, based on being executed by the processing circuit, cause the processing circuit to perform: determining a first value of a signal at a first clock edge of a clock signal; determining a second value of the signal at a second clock edge of the clock signal; generating an output value based on a computation of at least the first value and the second value; determining a status of the clock signal based on a comparison between the output value and a reference value; and adjusting the clock signal based on the status.