Method for forming semiconductor structure
TW202630786APending Publication Date: 2026-07-16TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information
- Application Number
- TW114121555
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-04-11
- Filing Date
- 2025-06-10
- Publication Date
- 2026-07-16
Abstract
A method includes forming top semiconductor channels for a top device over bottom semiconductor channels for a bottom device; forming a high-k gate dielectric layer wrapping around each of the top and the bottom semiconductor channels; forming a first gate metal over the high-k gate dielectric layer; etching back the first gate metal to expose top portions of the high-k gate dielectric layer while bottom portions of the high-k gate dielectric layer remain, wherein the etching back includes dry etching to etch the first gate metal and to generate a co-polymer byproduct that covers the exposed top portions of the high-k gate dielectric layer; and performing a post-cleaning process to remove the co-polymer byproduct, the post-cleaning process comprising a first wet cleaning to remove silicon oxide components of the co-polymer byproduct and a second wet cleaning to remove metal oxide components of the co-polymer byproduct.
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