Semiconductor device and methods of formation

TW202630789APending Publication Date: 2026-07-16TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information

Application Number
TW114108274
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-01-07
Filing Date
2025-03-06
Publication Date
2026-07-16
Patent Text Reader

Abstract

A source / drain contact of a nanostructure transistor is formed such that the source / drain contact is recessed within an underlying source / drain region of the nanostructure transistor using a multiple-step etching process. The source / drain contact being recessed within the source / drain region provides a greater amount of surface area for the source / drain contact to contact the source / drain region. This provides for increased contact surface area between the source / drain contact and the source / drain region, and the increased contact surface area provides for reduced contact resistance between the source / drain region and the source / drain contact, because of the less-restricted current flow path between the source / drain region and the source / drain contact. In this way, the reduced contact resistance between the source / drain region and the source / drain contact enables a greater power efficiency to be achieved for the nanostructure transistor and / or enables increased switching speeds to be achieved for the nanostructure transistor, among other examples.
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