Build up bonding layer process and structure for low temperature bonding

Abstract

Disclosed herein are methods of forming a microelectronic component. In some embodiments, the methods include providing a substrate having a first surface, forming a first metal feature on the first surface, forming a second metal feature on the first metal feature, forming a dielectric layer over the substrate such that the dielectric layer directly contacts sidewalls of the first and second metal features, and planarizing the dielectric layer to form a second surface for hybrid bonding. After planarizing the dielectric layer, the second metal feature is exposed at the second surface.

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