Semiconductor structures and methods for forming the same
TW202630985APending Publication Date: 2026-07-16TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information
- Application Number
- TW114106174
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-01-03
- Filing Date
- 2025-02-20
- Publication Date
- 2026-07-16
Abstract
A semiconductor structure that suppresses moisture-induced delamination may be provided by forming an interposer including first redistribution wiring interconnects embedded within first redistribution dielectric layers; forming die-side bump structures and dummy bump structures on a respective one of the first redistribution wiring interconnects; and attaching at least one semiconductor die including a respective array of on-die bump structures to a respective subset of the die-side bump structures of the interposer. The dummy bump structures are not bonded to any of the at least one semiconductor die due to a vertical gap between the dummy bump structures and the at least one semiconductor die.
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