Memory device

Abstract

Provided are a memory device and a method of operating the same. The memory device includes: a first sub-memory array, a second sub-memory array and a third sub-memory array arranged sequentially along a first direction; a first bit line selection circuit connected to a first bit line in the first sub-memory array and a second bit line in the second sub-memory array, wherein the first bit line and the second bit line extend along the first direction; and a first bit line sense amplifier connected to an output terminal of the first bit line selection circuit and a third bit line in the third sub-memory array and extending along the first direction.

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