Using throttler for droop mitigation

Abstract

A clock throttler circuit for droop mitigation and disclose circuitry, related methods and state machine, the method performed at a system to select a first clock signal or a second clock signal to be provided to a subsystem, the method including: receiving, from a droop detector, a trigger signal indicative of a droop event at the subsystem; invoking modulation circuitry to throttle the selectable clock signal in accordance with the event; selecting the first clock signal; providing, to the modulation circuitry, the first clock signal to be throttled.

Images