Data computing device, computing accelerator and data computing method

TW202634417AActive Publication Date: 2026-08-16ATEN INTERNATIONAL CO LTD
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Patent Information

Application Number
TW114104642
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-02-07
Publication Date
2026-08-16
Estimated Expiration
2045-02-06

AI Technical Summary

Technical Problem

Existing AI technologies are limited by network transmission speeds and require specific computational accelerators for different operating systems, making them inconvenient to install and configure.

Method used

A computing accelerator is designed as an external device that emulates a storage device, allowing it to operate independently of the host device's operating system, with a processing unit and storage device simulation unit that can be connected in a plug-and-play manner, performing calculations and storing results without needing additional drivers.

Benefits of technology

Enables AI calculations to be performed locally without network constraints and simplifies installation by allowing the computing accelerator to function like a USB drive, enhancing user convenience and versatility across different operating systems.

✦ Generated by Eureka AI based on patent content.

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Abstract

A data computing device includes a computing accelerator. The computing accelerator includes a computing unit and a storage device simulation unit. The computing unit is configured to perform an computation according to a computation data to generate an computation result. The storage device simulation unit includes a processor and a memory. The processor is coupled to the computing unit and the memory. When the processor confirms that a first file is written into the memory, the processor uses the first file as the computation data to obtain a computation result generated by the computing unit. The processor is configured to store the computation result as a second file in the memory.
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Description

[Technical Field]

[0001] This disclosure relates to data processing and computing technology, and in particular to a data computing device, computing accelerator and data computing method. [Previous Technology]

[0002] With the rapid development of technology, Artificial Intelligence (AI) has been widely applied in various fields, including anomaly detection, machine vision, robot control, and speech recognition. Currently, AI is mostly offered as a network service. In other words, users must connect to the internet and perform AI calculations through cloud servers. However, this approach limits the speed of AI to network transmission speed. Furthermore, users find it difficult to personalize and adjust the AI's computational model, thus leaving much room for improvement. [Summary of the Invention]

[0003] This disclosure relates to a data processing device, including a processing accelerator. The processing accelerator includes a processing unit and a storage device simulation unit. The processing unit performs calculations based on processing data to generate calculation results. The storage device simulation unit includes a processor and memory, wherein the processor is coupled to the processing unit and the memory. When the processor confirms that the memory has been written to a first file, the processor uses the first file as processing data to obtain the calculation results generated by the processing unit. The processor stores the calculation results as a second file in the memory.

[0004] This disclosure also relates to a data processing method executed in a computing accelerator. The data processing method includes: determining, through a processor in the computing accelerator, whether a memory coupled to the processor has been written to a first file; when the first file is written to the memory, using the first file as a processing data; performing a processing operation on the processing data through a processing unit in the computing accelerator to generate a processing result; and storing the processing result in memory as a second file.

[0005] This disclosure also relates to a computing accelerator, comprising a computing unit and a storage device simulation unit. The computing unit performs calculations based on computing data to generate calculation results. The storage device simulation unit includes a processor and memory. The processor is coupled to the computing unit and the memory, and is used to configure the memory as external memory. The processor is also used to determine the type of data written to the memory. When the data written to the memory is a model file, the processor updates the computing unit according to the model file. When the data written to the memory is a first file, the processor uses the first file as computing data to obtain the calculation results generated by the computing unit. The types of computing data and model files are different.

[0006] Accordingly, by setting the machine learning model in the storage device simulation unit and configuring the storage device simulation unit and the computing unit as a computing accelerator, the computing accelerator can be used like an external storage device without being limited by the device's operating system.

Implementation Method

[0008] Several embodiments of the present invention will be disclosed below with reference to the drawings. For clarity, many practical details will be described in the following description. However, it should be understood that these practical details are not intended to limit the present invention. That is, in some embodiments of the present invention, these practical details are not essential. In addition, for the sake of simplicity, some conventional structures and elements will be shown in the drawings in a simple schematic manner.

[0009] In this document, when an element is referred to as a "connection" or "coupled," it may mean an "electrical connection" or "electrical coupling." "Connection" or "coupled" may also be used to indicate that two or more elements operate or interact with each other. Furthermore, although terms such as "first," "second," etc., are used herein to describe different elements, these terms are only used to distinguish elements or operations described using the same technical terms. Unless the context clearly indicates otherwise, these terms do not specifically refer to or imply any order or sequence, nor are they intended to limit the invention.

[0010] An AI computing accelerator is a computing processing circuit designed for a specific computing model. Terminal devices equipped with computing accelerators can perform calculations directly through the computing accelerator without needing to obtain AI services through a cloud server.

[0011] For example, when the processor of a terminal device (such as a computer or smartphone) receives computational data, the processor transmits the computational data to a computation accelerator to obtain the computational result using the hardware and computational model in the computation accelerator. However, since the computation accelerator must work with the processor, it needs to be designed separately for different operating systems. In other words, different operating systems require different computation accelerators. For users, this not only limits their choices but may also lead to problems in installing / configuring the computation accelerator (such as needing to correctly install the corresponding driver), making the application inconvenient.

[0012] This disclosure describes the computing accelerator as an external device, and makes the data processing method of the computing accelerator not limited by the operating system of the terminal device, so as to improve the ease of use. For ease of explanation, in the following paragraphs, the computing accelerator and the matching host device will be collectively referred to as the "data processing device".

[0013] Figure 1 is a schematic diagram of a data processing device 100 according to a partial embodiment of the present disclosure. The data processing device 100 includes a computing accelerator AID and a host HD. The host HD may be a terminal device or a server, or it may be an electronic device with a built-in embedded system (such as an automotive control system). The computing accelerator AID can be connected to the host HD via a port (such as a Universal Serial Bus). In other words, the computing accelerator AID can be connected to the host HD in a plug-and-play manner to provide AI computing services.

[0014] The computing accelerator AID includes a storage device simulation unit 110 and a computing unit 120. The storage device simulation unit 110 and the computing unit 120 may each be a processing circuit or a microprocessor, and may include hardware and / or firmware. The computing unit 120 includes a machine learning model M1, which is used to perform calculations based on received computing data and according to the machine learning model M1 to generate computing results.

[0015] The machine learning model M1 is used to provide specific computational functions and can be implemented by a neural network. In one embodiment, the neural network of the machine learning model M1 includes one or more layers, including an input layer, a hidden layer, and an output layer. Each layer has multiple neurons, and the multiple neurons have corresponding parameters (i.e., weight values ​​generated through training) to determine the transmission strength and direction of signals in the neural network. The machine learning model M1 can process the received computational data, such as: analyzing the semantics of text to provide a response, organizing data, identifying the content in an image, generating data according to input instructions (e.g., generating images or music, identifying errors in data, generating more similar content based on the input data), etc. Since those skilled in the art can understand the meaning and composition of machine learning models, further details are omitted here.

[0016] The storage device emulation unit 110 is coupled to the arithmetic unit 120 and includes a processor 111 and a memory 112. The processor 111 is coupled to the arithmetic unit 120 and the memory 112 and is used to communicate with the host HD. The memory 112 may be a type of flash memory used to store data and files. In one embodiment, the storage device emulation unit 110 configures the memory 112 as an external memory, and the processor 111 is used to determine the type of data written to the memory 112, for example: determining the extension name of the data to be written, or analyzing the content of the write instruction through voice recognition or text recognition. The memory 112 may be any type of storage medium, and this disclosure does not limit its type.

[0017] Specifically, when the computing accelerator AID is connected to the host HD, the host HD identifies the computing accelerator AID as an external storage device, such as a USB flash drive / USB hard drive, based on the storage device emulation unit 110. For example, the connection circuit of the host HD sends an identification request signal to the computing accelerator AID, and the computing accelerator AID sends an identification response signal back to the host HD accordingly. The identification response signal may include a device descriptor, such as the manufacturer's name code, product identification code, type code, etc., so that the host HD can identify the computing accelerator AID as an external storage device based on the device descriptor.

[0018] Continuing from the above, in one embodiment, when the host HD recognizes the computing accelerator AID as an external storage device, the host HD allocates a driver in the operating system corresponding to "external storage device" to read memory 112. At this time, the host HD uses memory 112 as an external data storage space. For example, the host HD will display a data management program on the display screen and show a list of files stored in memory 112. In one embodiment, the host HD can also use a general-purpose driver to communicate with memory 112 and then read it. In other words, after the computing accelerator AID is connected to the host HD, no additional driver needs to be installed; bidirectional communication and transmission can be performed simply through the interaction between the connection interfaces. The interaction between the connection interfaces can be the USB transmission protocol, but this disclosure is not limited to this.

[0019] The processor 111 is used to receive operation instructions from the host HD and execute the corresponding actions. Since the computing accelerator AID is recognized as an external storage device, the content of the "operation instructions" is the same as that of the flash drive, including writing data, reading data, and clearing data. The processor 111 is also used to continuously monitor the memory 112, for example, to confirm whether the data writing is complete.

[0020] If the operation instruction is a write instruction, the processor 111 will write data into memory 112 according to the write instruction to form a first file D1. When the first file D1 is written, the processor 111 will use the first file D1 as calculation data and input the calculation data into the machine learning model M1 to generate a calculation result corresponding to the calculation data through the machine learning model M1. Then, the processor 111 will store the calculation result as a second file in memory 112.

[0021] Accordingly, for users of the host HD, the user will be able to use the computing accelerator in a manner similar to a "USB flash drive". In addition, since the computing accelerator AID is recognized as an external storage device, as long as the host HD can read the external storage device, it can correctly establish communication with the processor 111 without being limited by the operating system.

[0022] In some embodiments, the machine learning model M1 may be provided by the host HD. In other words, the host HD may provide a model file to the computing unit 120 as the machine learning model M1 in the computing unit 120, or update the existing machine learning model M1 in the computing unit 120 according to the model file.

[0023] It should be specifically noted that the "Host HD" shown in Figure 1 is for illustrative purposes only, and the Computation Accelerator AID can be connected to different devices. For example, the Computation Accelerator AID can be connected to an electronic device with an embedded system to enhance or expand the functionality of the embedded system through machine learning models. On the other hand, the Computation Accelerator AID can also be connected to a computer (such as a maintenance personnel's computer) to set or update the internal machine learning models. The aforementioned "electronic device with an embedded system" and "maintenance personnel's computer" can both be the Host HD shown in Figure 1, and the application of the Computation Accelerator AID is not limited to the schematic diagram shown in Figure 1.

[0024] For ease of understanding, several application scenarios of the computing accelerator AID are described below. In one embodiment, the machine learning model M1 can be a neural network for conversational AI. The user can record questions as text (e.g., file extension .txt) or voice (e.g., file extension .mp3) and store the file in memory 112, i.e., the first file D1. The processor 111 inputs the first file D1 to the machine learning model M1 and outputs the results generated by the machine learning model M1 in the same type / format as the second file D2 (e.g., file extension .txt or .mp3). The user can open the second file D2 to see the response content of the machine learning model M1.

[0025] In other embodiments, the machine learning model M1 may be an analytical AI. The user can store the data to be analyzed in memory 112, i.e., a first file D1. The first file D1 may be a video (e.g., with the extension .mp4) or an image (e.g., with the extension .jpg). The processor 111 inputs the first file D1 into the machine learning model M1, causing the machine learning model M1 to analyze the first file D1 (e.g., removing noise, adding effects, etc.). Then, the processor 111 outputs the calculation result in the same type / format as a second file D2.

[0026] Additionally, in some embodiments, the processor 111 determines the type of data written to the memory 112 to perform different processing. Specifically, the processor 111 can determine the file extension of the first file D1 to confirm whether the first file is computational data. As in the aforementioned embodiment, if the data type received by the machine learning model M1 is "text", the processor 111 will determine whether the file extension of the first file D1 is ".txt" or other text format. When the type / file extension matches, the processor 111 will input the first file D1 as computational data into the machine learning model M1.

[0027] In other embodiments, the processor 111 may also determine whether the type of the data being written belongs to the type of a model file. A "model file" is all or part of the configuration data (e.g., firmware, parameters, etc.) of the machine learning model M1, such as an update file for the machine learning model M1, with a file extension of ".onnx" or ".pth". Therefore, the type / file extension of the "model file" and the type / file extension of the "computation data" (the input data received by the machine learning model M1) will be different. If the processor 111 determines that the type of the first file D1 being written is the type of a model file, then the processor 111 will update the machine learning model M1 in the computation unit 120 according to the first file D1 / model file.

[0028] Figure 2 shows a flowchart of a data processing method according to a portion of the present disclosure. Using Figures 1 and 2 as examples, the operation of the data processing device 100 will be described. First, the computing accelerator AID is connected to the host HD so that the host HD recognizes the computing accelerator AID as an external storage device. Furthermore, the processor 111 can monitor the type of received signal or monitor the state of the memory 112.

[0029] In step S201, the processor 111 receives an operation instruction from the host HD and identifies the content of the operation instruction. Steps S202 to S208 are the judgment and subsequent processing performed on different contents of the operation instruction.

[0030] In step S202, the processor 111 determines whether the operation instruction is a write instruction. In other words, it determines whether the operation instruction requires writing a file to memory 112. If the operation instruction is a write instruction, then in step S203, the processor 111 writes the first file D1 to memory 112 according to the operation instruction.

[0031] In step S204, the processor 111 determines whether the operation instruction contains an end instruction. The "end instruction" can be a specific character, such as "End of File (EOF)". When the processor 111 determines that the operation instruction contains an end instruction, it can confirm that the data (first file D1) that the host HD is currently writing has been completed.

[0032] In step S205, after the first file D1 is written to memory 112, processor 111 uses the first file D1 as computation data and inputs the computation data into machine learning model M1 to execute the computation function of machine learning model M1 based on the first file D1 (computation data). In one embodiment, processor 111 monitors memory 112 to confirm whether an end instruction has been written into memory 112.

[0033] In step S206, the machine learning model M1 performs calculations based on the computational data to generate a calculation result. After receiving the calculation result, the processor 111 stores the calculation result as a second file D2 in memory 112. Accordingly, for the user of the host HD, the storage space of memory 112 will see that a second file D2 has been added, which is the calculation result of the machine learning model M1.

[0034] As mentioned above, in some embodiments, before executing step S205, the processor 111 may first determine whether the format of the first file D1 conforms to the operation format of the operation data (e.g., .txt, .jpg, etc.). If the format of the first file D1 conforms to the operation format, the processor 111 will execute step S205 and use the first file D1 as the operation data.

[0035] Continuing from the above, in other embodiments, the processor 111 may further determine whether the first file D1 conforms to the model format of the model file, wherein the model format and the operation format are different from each other. If the format of the first file D1 conforms to the model format, it means that the first file D1 belongs to the model file at this time. At this time, the processor 111 does not execute step S205, but instead installs / updates the machine learning model M1 according to the model file, or updates at least one of the multiple parameters in the machine learning model M1.

[0036] The aforementioned action of "determining the type / format of the first file D1" can be performed after step S204, that is, when the end instruction is detected, the type of the first file D1 is determined. However, this disclosure is not limited thereto. In other embodiments, the processor 111 may also determine the type of the first file D1 in step S201 to confirm whether the first file D1 belongs to a type of computational data or a model file.

[0037] In step S207, the processor 111 determines whether the operation instruction is a read instruction. If the operation instruction is a read instruction, it means that the host HD wants to read the calculation result of the machine learning model M1. In step S208, the processor 111 uses the second file D2 as output data and transmits the output data (second file D2) to the host HD to present the calculation result.

[0038] In some embodiments, the processor 111 can identify the second file D2 in response to a read instruction (e.g., the user selects the second file D2 and performs a copy or open operation). However, this disclosure is not limited thereto. In other embodiments, after the processor 111 uses the first file D1 as processing data (i.e., step S205), it can retain or delete the first file D1, and the read instruction will output the second file D2 in memory 112 to the host HD. However, this disclosure is not limited thereto. Accordingly, even if the read instruction does not actively specify / select the second file D2, the processor 111 can actively output all data (the second file D2) in memory 112 to the host HD.

[0039] This disclosure uses the "write file, read file" method as the input and input method of the machine learning model. In terms of data operation, it is only a simple data copying and moving. Therefore, the computing accelerator AID does not need to set up a specific driver or a specific program framework, and can be unrestricted by the operating system, thus improving the convenience and versatility of use.

[0040] The various elements, method steps or technical features in the foregoing embodiments can be combined with each other, and are not limited to the order of textual description or graphical presentation in this disclosure.

[0041] Although the present disclosure has been disclosed above with reference to embodiments, it is not intended to limit the present disclosure. Anyone skilled in the art may make various modifications and alterations without departing from the spirit and scope of the present disclosure. Therefore, the scope of protection of the present disclosure shall be determined by the appended claims. [Simplified Explanation of the Diagram]

[0007] Figure 1 is a schematic diagram of a data processing device according to some embodiments of the present disclosure. Figure 2 is a flowchart of a data processing method according to some embodiments of the present disclosure. [Biomaterial Storage]

[0043] Domestic storage information (please note in order of storage institution, date, and number): None. International storage information (please note in order of storage country, institution, date, and number): None.

Claims

1. A data processing device comprising a computing accelerator and a host coupled to the computing accelerator, wherein the computing accelerator comprises: a computing unit for performing calculations based on computing data to generate a calculation result; and a storage device simulation unit comprising a processor and a memory, wherein the processor is coupled to the computing unit and the memory, and the host identifies the computing accelerator as an external storage device based on the storage device simulation unit; wherein the host is configured to provide a model file to the computing unit as a machine learning model in the computing unit, or update the machine learning model in the computing unit; and when the processor confirms that a first file written by the host to the memory has been completed, the processor is configured to use the first file as computing data to generate the calculation result corresponding to the computing data through the machine learning model; wherein the processor is configured to store the calculation result as a second file in the memory.

2. The data processing apparatus as described in claim 1, wherein when the processor determines that the format of the first file conforms to a processing format, the processor uses the first file as the processing data of the processing unit.

3. The data processing apparatus as claimed in claim 1, wherein the machine learning model includes a plurality of parameters, and when the processor determines that the memory is written to the model file, the processor updates at least one of the parameters in the machine learning model according to the model file.

4. The data processing device as described in claim 3, wherein the processor is configured to monitor the memory, and when an end instruction is written to the memory, the processor is configured to execute the machine learning model based on the first file.

5. A data processing method, executed in a computing accelerator, the data processing method comprising: determining, via a processor in the computing accelerator, whether a memory coupled to the processor is written to a first file by a host coupled to the computing accelerator, wherein the host identifies the computing accelerator as an external storage device; when the writing of the first file to the memory is completed, using the first file as processing data; providing a model file to a computing unit via the host, as a machine learning model in the computing unit, or updating the machine learning model in the computing unit; performing a calculation on the processing data via the machine learning model in the computing unit of the computing accelerator to generate a calculation result; and storing the calculation result in the memory as a second file.

6. The data processing method as described in claim 5, wherein the machine learning model has a plurality of parameters, and the data processing method further comprises: when determining that the memory is written to the model file, updating at least one of the parameters in the machine learning model according to the model file.

7. The data processing method as described in claim 6, wherein the method of using the first file as the processing data further comprises: monitoring the memory; and executing the machine learning model based on the first file when an end instruction is written to the memory.

8. A computing accelerator, comprising: a computing unit for performing calculations based on computing data to generate a calculation result; and a storage device simulation unit comprising a processor and a memory, wherein the processor is coupled to the computing unit and the memory, and is configured to set the memory as an external memory of a host coupled to the computing accelerator, the processor further being configured to determine the type of data written to the memory; wherein when the data written to the memory by the host is a model file, the processor is configured to use the model file as a machine learning model in the computing unit, or update the machine learning model in the computing unit; wherein when the data written to the memory is a first file, the processor is configured to use the first file as computing data to generate the calculation result corresponding to the computing data through the machine learning model; wherein the computing data and the model file are of different types and are written by the host.