Access to configuration state table in memory

Abstract

An apparatus comprises processing circuitry configured to perform data processing in response to instructions, and at least one functional unit configured to issue one or more configuration state table access requests to access a configuration state table in memory, wherein a configuration state table access request specifies a target physical address identifying a memory location associated with target configuration state. A control register, accessible to the processing circuitry, is configured to indicate a constraint on allocation of a portion of an address space for storing the configuration state table.

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