Calculation method for swapping image memory addresses and circuit system
Patent Information
- Application Number
- TW114104241
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-02-06
- Publication Date
- 2026-08-16
- Estimated Expiration
- 2045-02-05
Smart Images

Figure TWG2TA001072050_001 
Figure TWG2TA001072050_002 
Figure TWG2TA001072050_003
Abstract
Claims
1. A method for image data memory address swapping, executed in a circuit system, comprising: Image data is received from an image source, which provides a new frame. In a panel replay selection update procedure, a selection update segment that needs to be updated in the new frame is extracted. A writing procedure writes the image data into a virtual block. After a reading procedure finishes reading the virtual block, it begins reading the next virtual block. The selection update segment obtained from the virtual block is combined with the image data in the previous virtual block to generate the next frame of image data.
2. The image data memory address swapping calculation method as described in claim 1, wherein, When the reading program reads the selected update segment and combines it with the image data in the previous virtual block, it exchanges the non-selected update segments in the virtual block and the previous virtual block through mapping.
3. The image data memory address swapping calculation method as described in claim 1, wherein, Before the writing program starts writing a current virtual segment, it checks the exchange function of the current virtual segment to determine whether to map and exchange the current virtual segment with the corresponding virtual segment in the next virtual block.
4. The image data memory address swapping calculation method as described in claim 1, wherein before the reading program starts reading a current virtual segment, the swapping function of the current virtual segment is checked to determine whether the current virtual segment should be mapped and swapped with the corresponding virtual segment in the previous virtual block.
5. The image data memory address swapping calculation method as described in any one of claims 1 to 4, wherein, The memory of the circuit system is virtualized to obtain multiple virtual segments including the virtual block, the previous virtual block, and the next virtual block, wherein the size of each virtual block or physical block is designed to write one frame of image data.
6. A circuit system comprising: A processing circuit and a memory are provided. The processing circuit executes a write program and a read program to run an image data memory address swapping algorithm, including: receiving image data from an image source, wherein the image source provides a new frame; in a panel replay selection update program, extracting a selection update segment that needs to be updated from the new frame; the write program writes the image data into a virtual block; after the read program finishes reading the virtual block, it begins reading the next virtual block; and the selection update segment obtained from the virtual block is combined with the image data in the previous virtual block to generate the next frame of image data.
7. The circuit system as described in claim 6, wherein, When the reading program reads the selected update segment and combines it with the image data in the previous virtual block, it exchanges the non-selected update segments in the virtual block and the previous virtual block through mapping.
8. The circuit system as described in claim 6, wherein, Before the writing program starts writing a current virtual segment, it checks the exchange function of the current virtual segment to determine whether to map and exchange the current virtual segment with the corresponding virtual segment in the next virtual block.
9. The circuit system as described in claim 6, wherein before the reading program begins reading a current virtual segment, the exchange function of the current virtual segment is checked to determine whether the current virtual segment should be mapped and exchanged with the corresponding virtual segment in the previous virtual block.
10. The circuit system of any one of claims 6 to 9, wherein the memory is virtualized to obtain the plurality of virtual blocks, and each virtual block is divided into a plurality of virtual segments, and each virtual segment corresponds to one of the plurality of physical segments individually divided from one or more physical blocks, wherein the size of each virtual block or physical block is designed to write one frame of image data.