Scheduling device and an operation method for a memory device using a multi-clock command

TW202634599APending Publication Date: 2026-08-16SK HYNIX INC
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
TW114142865
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-02-06
Filing Date
2025-11-04
Publication Date
2026-08-16

Smart Images

  • Figure TWG2TA001072908_001
    Figure TWG2TA001072908_001
  • Figure TWG2TA001072908_002
    Figure TWG2TA001072908_002
  • Figure TWG2TA001072908_003
    Figure TWG2TA001072908_003
Patent Text Reader

Abstract

A memory system includes a memory device and a memory controller. The memory device includes at least one data storage area. The memory controller is coupled to the memory device and configured to transmit at least one command, scheduled to be transmitted within a preset clock range, to the memory device. The memory controller is configured to transmit an activation command included in the at least one command to the memory device when a command to be transmitted subsequent to the activation command is not a data input and output (input / output) command.
Need to check novelty before this filing date? Find Prior Art