Static random access memory device

Abstract

A static random access memory device includes at least one word line, a first bit line, a second bit line, a power supply line, a first ground line, a second ground line, and a static random access memory cell. The power supply line is parallel to the first bit line, the second bit line, the first ground line, and the second ground line and is perpendicular to the word line. The static random access memory cell includes a first inverter, a second inverter, a first pass transistor, and a second pass transistor. The first inverter and the second inverter are cross-coupled and respectively coupled to the first pass transistor and the second pass transistor. The static random access memory cell is coupled to the power supply line, the first ground line, the second ground line, the word line, the first bit line, and the second bit line.

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