Light-emitting diode lamp and light-emitting diode light string

Abstract

A light-emitting diode (LED) lamp includes a working circuit and a voltage clamping device. The working circuit is electrically connected between a working voltage and a ground terminal, and used to provide a power control and / or a lighting control operation for the LED lamp. The voltage clamping device is connected to the working circuit in parallel, and the voltage clamping device includes a switch. The switch is electrically connected between the working voltage and the ground terminal. After the LED lamp is powered up to operate, when the working voltage is increased to exceed a reference voltage, the switch is controlled to be turned on so as to form a conduction path between the working voltage and the ground terminal, and a large current flows through the conduction path so that the voltage clamping device clamps the working voltage of supplying power to the working circuit.

Description

Technical Field

[0001] This invention relates to a light-emitting diode (LED) chip and a LED string, and more particularly to an LED chip and an LED string with active voltage clamping. Prior Technology

[0002] Because light-emitting diodes (LEDs) have advantages such as high luminous efficiency, low power consumption, long lifespan, fast response speed, and high reliability, they are widely used in lighting fixtures or decorative lighting applications, such as Christmas tree lights and illuminated sneakers, in series, parallel, or series-parallel connection methods, as light bars or light strings.

[0003] Taking festive lighting as an example, a complete LED lighting fixture basically consists of an LED string (with multiple LEDs) and a driver unit that drives the LEDs. The driver unit is electrically connected to the LED string and controls the LEDs by providing the necessary power and control signals with luminous data, either in a point-to-point or synchronous manner, to achieve diverse lighting output effects and variations of the LED lighting fixture.

[0004] In DC parallel-series LED strings, the voltage decreases as the number of LEDs and the length of the wiring increases. Although current LEDs incorporate constant current and bypass current to maintain a fixed current flow at any given time, thus achieving a fixed impedance and evenly distributing the voltage, Ohm's law (V=IR, where V is voltage, I is current, and R is impedance) means that a fixed current does not necessarily mean a fixed impedance. If the impedance of one LED drops, causing a sudden voltage drop, the voltage of other LEDs may increase. Therefore, a Zener diode can be added to each LED to clamp its voltage and maintain a stable operating voltage.

[0005] Furthermore, in automatically sorted parallel-to-series LED strings, during sorting, when a particular LED experiences a current change, the controller expects to detect the voltage change. However, due to the series connection, other LEDs will increase or decrease their voltage to cancel out the voltage change of that LED, resulting in no voltage change at the controller or the voltage change becoming so small that it cannot be detected. Therefore, adding a Zener diode can solve this problem. In other words, a Zener diode clamps the LED to a fixed voltage, preventing it from rising too much and thus canceling out the voltage change to be detected.

[0006] However, the problem is that Zener diodes typically have a fixed on-state voltage. As mentioned earlier, the voltage decreases towards the end of the LED string. When the voltage is low, the Zener diode's on-state voltage remains fixed, causing it to become ineffective. Therefore, Zener diodes are not suitable for operating environments with large load variations and high currents.

[0007] Therefore, how to design a light-emitting diode (LED) chip and LED string, especially an LED chip and LED string with active voltage clamping that can actively adjust the voltage regulation of the conduction voltage according to different working voltages, and solve the problems and technical bottlenecks of the existing technology, is an important research topic for the inventors of this case. Summary of the Invention

[0008] One object of the present invention is to provide a light-emitting diode (LED) chip. The LED chip includes a working circuit and a voltage clamping device. The working circuit is electrically connected between a working voltage and a ground terminal, for providing at least power control and / or light emission control to the LED chip. The voltage clamping device is connected in parallel to the working circuit. The voltage clamping device includes a switch. The switch is electrically connected between the working voltage and the ground terminal. When the LED chip is powered on, if the working voltage increases beyond a reference voltage, the switch is controlled to turn on, forming a conductive path between the working voltage and the ground terminal, and a large current flows through this conductive path, causing the voltage clamping device to clamp the working voltage supplied to the working circuit.

[0009] In one embodiment, the voltage clamping device includes a capacitor, a first amplifier, and a switch. The capacitor receives the operating voltage and is charged by the operating voltage to establish a capacitor voltage, which is recorded as the reference voltage after the operating voltage stabilizes. The first amplifier receives the reference voltage and a voltage divider corresponding to the operating voltage, and compares the voltage divider with the reference voltage to generate a switch signal. The switch receives and is controlled by the switch signal. When the operating voltage increases beyond the reference voltage, the switch signal controls the switch to turn on, causing a large current to flow through the conduction path.

[0010] In one embodiment, the voltage clamping device further includes a first switch. The first switch is connected in series with the capacitor and is controlled by a control signal provided by the operating circuit. When the control signal turns on the first switch, the operating voltage charges the capacitor to establish the capacitor voltage.

[0011] In one embodiment, the voltage clamping device further includes a voltage divider resistor network. The voltage divider resistor network receives the operating voltage and divides the operating voltage to provide the divided voltage.

[0012] In one embodiment, the voltage clamping device further includes a second amplifier. The second amplifier receives the capacitor voltage and provides the capacitor voltage as the reference voltage after the operating voltage has stabilized.

[0013] In one embodiment, the voltage clamping device includes an analog-to-digital converter (ADC), a third amplifier, and the switch. The ADC receives the operating voltage and records it as a reference voltage after the operating voltage stabilizes. The third amplifier receives the reference voltage and a voltage divider corresponding to the operating voltage, and compares the voltage divider with the reference voltage to generate a switch signal. The switch receives and is controlled by the switch signal. When the operating voltage increases beyond the reference voltage, the switch signal controls the switch to turn on, causing a large current to flow through the conduction path.

[0014] In one embodiment, the voltage clamping device further includes a voltage divider resistor network. The voltage divider resistor network receives the operating voltage and divides the operating voltage to provide the divided voltage.

[0015] In one embodiment, the voltage clamping device includes a constant voltage circuit, a first comparator, a second comparator, a register, the switch, a fourth amplifier, and an analog switch. The constant voltage circuit receives the operating voltage and records it as the reference voltage after the operating voltage stabilizes. The first comparator receives the reference voltage and a first voltage divider corresponding to the operating voltage, and compares the first voltage divider with the reference voltage to generate a first register signal. The second comparator receives the reference voltage and a second voltage divider corresponding to the operating voltage, and compares the second voltage divider with the reference voltage to generate a second register signal. The register receives the first register signal and the second register signal, and generates a register output signal based on the level of the first register signal and the second register signal. The fourth amplifier receives the register output signal and a second reference voltage, and compares the register output signal with the second reference voltage to generate a switch signal for controlling the switch. The analog switch receives the temporary output signal and the switching signal output by the fourth amplifier; wherein, when the temporary output signal enables the analog switch, the analog switch outputs the switching signal to control the switch. Furthermore, when the operating voltage increases beyond the reference voltage, the switching signal controls the switch to turn on, causing a large current to flow through the conduction path.

[0016] In one embodiment, the voltage clamping device further includes a first voltage-dividing resistor network and a second voltage-dividing resistor network. The first voltage-dividing resistor network receives the operating voltage and divides the operating voltage to provide the first voltage-divided voltage. The second voltage-dividing resistor network receives the operating voltage and divides the operating voltage to provide the second voltage-divided voltage.

[0017] In one embodiment, the voltage clamping device further includes a fourth amplifier. The fourth amplifier receives the temporary output signal and a second reference voltage, and compares the temporary output signal and the second reference voltage to generate a switching signal for controlling the switch.

[0018] In one embodiment, the voltage clamping device further includes a third voltage divider resistor network. The third voltage divider resistor network receives the operating voltage and divides the operating voltage to provide the second reference voltage.

[0019] In one embodiment, the voltage clamping device further includes an analog switch. The analog switch receives the temporary output signal and the switching signal output by the fourth amplifier. When the temporary output signal enables the analog switch, the analog switch outputs the switching signal to control the switch.

[0020] In one embodiment, the voltage clamping device further includes an inverter and a second switch. The inverter is coupled to the register and is used to invert the level of the register output signal to a second switch signal. The second switch, coupled to the inverter and the switch, is controlled by the second switch signal.

[0021] In one embodiment, when the operating voltage decreases below the reference voltage, the second switching signal controls the second switch to turn on, causing the current in the conduction path to decrease significantly until zero current.

[0022] Another object of the present invention is to provide a light-emitting diode (LED) string. The LED string includes a plurality of LED beads. Each LED bead is connected in series, and each LED bead includes a working circuit and a voltage clamping device. The working circuit is electrically connected between a working voltage and a ground terminal to provide power control and / or light emission control for the LED bead. The voltage clamping device is connected in parallel to the working circuit. The voltage clamping device includes a switch. The switch is electrically connected between the working voltage and the ground terminal. When the LED string is powered on, if the working voltage of each LED bead in the LED string increases beyond a reference voltage, the switch of the LED bead is controlled to conduct, forming a conductive path between the working voltage and the ground terminal, and a large current flows through the conductive path, causing the voltage clamping device to clamp the working voltage supplying the working circuit of the LED bead.

[0023] To gain a deeper understanding of the techniques, means, and effects employed by this invention to achieve its intended purpose, please refer to the following detailed description and accompanying drawings. It is believed that the purpose, features, and characteristics of this invention can be understood in a thorough and specific manner from these drawings. However, the accompanying drawings are provided for reference and illustration only and are not intended to limit the scope of this invention. Simple Explanation of the Diagram

[0024] Figure 1: This is a circuit block diagram of the LED string of the present invention.

[0025] Figure 2: This is a block diagram of the voltage clamping device of the light-emitting diode lamp bead of the present invention.

[0026] Figure 3A: is a circuit diagram of the first embodiment of the voltage clamping device of the present invention.

[0027] Figure 3B: is a schematic diagram of the working voltage and the current in the conduction path of the first embodiment of Figure 3A.

[0028] Figure 4A: is a circuit diagram of a second embodiment of the voltage clamping device of the present invention.

[0029] Figure 4B: A schematic diagram of the operating voltage and conduction path current in the second embodiment of Figure 4A.

[0030] Figure 5A: is a circuit diagram of the third embodiment of the voltage clamping device of the present invention.

[0031] Figure 5B is a schematic diagram of the operating voltage, current in the conduction path, and register signal of the third embodiment of Figure 5A. Implementation

[0032] The technical content and detailed description of the present invention are explained below with reference to the accompanying drawings.

[0033] Please refer to Figure 1, which is a circuit block diagram of the LED string of the present invention. The LED string 1 shown in Figure 1 has a plurality of LED beads 11, 12, 13, ..., 1N connected in series. As shown in Figure 1, the LED string 1 receives a DC power supply VDC and includes a control device 10 and the plurality of LED beads 11, 12, 13, ..., 1N. The control device 10 is connected between the positive voltage terminal VDC+ and the negative voltage terminal VDC- of the DC power supply VDC.

[0034] For each LED (light-emitting diode) bead 11, 12, 13, ..., 1N, due to the non-ideal characteristics of its components, such as the impedance differences of the RGB LEDs, the LED string will experience a large voltage drop under heavy load. Therefore, if the impedance of one LED decreases, it will cause a sudden voltage drop, resulting in an increase in the voltage of other LEDs and affecting their operation.

[0035] As shown in Figure 2, each LED bead 11, 12, 13, ..., 1N includes a working circuit 500 and voltage clamping devices 100, 200, 300. The working circuit 500 may include, for example, (but not limited to) a register, a sequencing circuit, a sorting circuit, an LED control circuit, etc., to provide power control and / or light emission control for the corresponding LED beads 11, 12, 13, ..., 1N. The voltage clamping devices 100, 200, 300 are coupled to the working circuit 500, and the working circuit 500 and the voltage clamping devices 100, 200, 300 are electrically connected between the DC voltage VDD and the ground terminal GND (in this embodiment, the ground terminal GND is used as an example; in other embodiments, it may be a negative voltage terminal). Compared to the voltage-clamping diodes used in existing technologies, which are passive components, the voltage regulator does not change according to the voltage drop across each LED chip 11, 12, 13, ..., 1N of the DC voltage VDD. Therefore, the LED chips 11, 12, 13, ..., 1N at the end of the series LED string may fail to start the voltage regulation effect (i.e., voltage regulation failure).

[0036] Therefore, the present invention achieves the voltage clamping effect by using voltage clamping devices 100, 200, 300 with active elements. In this way, regardless of the change in the voltage drop of DC voltage VDD (i.e., operating voltage VDD, hereinafter referred to as such) on each light-emitting diode lamp bead 11, 12, 13, ..., 1N, the voltage clamping effect on the working circuit 500 can be achieved by controlling the active elements.

[0037] Please refer to Figure 3A, which is a circuit diagram of the first embodiment of the voltage clamping device of the present invention. The voltage clamping device 100 mainly includes a capacitor C11, a first switch Q11, a second switch Q12, a first amplifier A12, a second amplifier A11, and a voltage divider resistor network R11, R12.

[0038] The voltage clamping device 100 is controlled by the control signal CONT provided by the operating circuit 500. Therefore, the control signal CONT is used to start or stop the voltage regulation function of the voltage clamping device 100. Specifically, the control signal CONT is used to control the first switch Q11. In this embodiment, the first switch Q11 is an N-type metal-oxide-semiconductor field-effect transistor (MOSFET). The gate of the first switch Q11 receives and is controlled by the control signal CONT. The source of the first switch Q11 is powered by the operating voltage VDD.

[0039] When the control signal CONT turns on the first switch Q11, the operating voltage VDD powers the voltage clamping device 100. The operating voltage VDD charges the capacitor C11 through the forward power supply path of the diode D11, so the voltage across the capacitor C11 (i.e., the capacitor voltage) gradually increases. Therefore, the diode D11 and the capacitor C11 form a voltage source as the input power supply for the second amplifier A11.

[0040] The positive input (or non-inverting input) of the second amplifier A11 is connected to diode D11 and capacitor C11 to receive the capacitor voltage, and the negative input (or inverting input) is connected to the output of the second amplifier A11. Therefore, the second amplifier A11 forms a voltage follower (or unity-gain buffer), which has the characteristics of high input impedance and low output impedance, and is used as an impedance matching and buffer circuit. Thus, the capacitor voltage is amplified by the non-inverting amplifier A11 with a voltage gain of 1 and output to the output of the second amplifier A11. Furthermore, the output voltage of the second amplifier A11 is supplied to the negative input of the first amplifier A12 through resistor R13 and is received thereas, thus serving as the reference voltage for the first amplifier A12.

[0041] The positive input terminal of the first amplifier A12 is connected to a voltage divider resistor network R11, R12, which includes a first resistor R11 and a second resistor R12. This network receives the operating voltage VDD and divides it. Therefore, the divided voltage (i.e., the voltage received at the positive input terminal of the first amplifier A12) is equal to... .

[0042] When the operating voltage VDD increases, the voltage divided by the first resistor R11 and the second resistor R12 (i.e., the voltage received at the positive input terminal of the first amplifier A12) also increases accordingly; similarly, when the operating voltage VDD decreases, the voltage divided by the first resistor R11 and the second resistor R12 also decreases accordingly. This is because the first amplifier A12 receives the divided voltage (through the positive input terminal) and the reference voltage (through the negative input terminal) respectively, and uses this to amplify the reference voltage. The amplification gain is related to resistors R14 and R13, as well as the divided voltage. Therefore, when the operating voltage VDD is higher, the divided voltage is higher, resulting in a high-level signal output from the first amplifier A12; conversely, when the operating voltage VDD is lower, the divided voltage is lower, resulting in a low-level signal output from the first amplifier A12. In this embodiment, the second switch Q12 is a P-type metal-oxide-semiconductor field-effect transistor (MOSFET). The gate of the second switch Q12 receives the signal output by the first amplifier A12, and the drain and source of the second switch Q12 receive the operating voltage VDD and the ground terminal GND, respectively.

[0043] Therefore, when the operating voltage VDD is too high, the output of the first amplifier A12 outputs a high-level signal to control the second switch Q12 to conduct. Thus, a path with extremely low impedance is formed between the operating voltage VDD and the ground terminal GND, thereby generating a large current I in this conduction path to clamp the operating voltage VDD. Figure 3B is a schematic diagram of the operating voltage and the current in the conduction path in the first embodiment of Figure 3A.

[0044] In summary, the first embodiment disclosed in Figure 3A of this case is implemented using capacitor C11. After the first switch Q11 is turned on by the control signal CONT for a period of time until the operating voltage VDD stabilizes, that is, the capacitor voltage of capacitor C11 reaches a certain value, this fixed capacitor voltage is recorded by capacitor C11 as the voltage value of the operating voltage VDD. After recording the voltage value of the operating voltage VDD, the first switch Q11 is turned off by the control signal CONT, thus cutting off the charging path of capacitor C11, and this voltage value is used as a reference voltage to be provided to the first amplifier A12.

[0045] When the operating voltage VDD is too high, the signal generated by the first amplifier A12 will be at a high level, which will then control the second switch Q12 to turn on, causing a large current I to flow through the path between the operating voltage VDD and the ground terminal GND. This will clamp the operating voltage VDD to the originally recorded value. Therefore, even if the operating voltage VDD is too high, the voltage clamping device 100 can clamp and stabilize the operating voltage VDD at the desired operating voltage VDD.

[0046] Please refer to Figure 4A, which is a circuit diagram of the second embodiment of the voltage clamping device of the present invention. The voltage clamping device 200 mainly includes an analog-to-digital converter circuit 201, a third switch Q21, a third amplifier A21, and a voltage divider resistor network R21, R22. Compared with the first embodiment of Figure 3A, this embodiment omits the use of the first switch Q11, diode D11, capacitor C11, and second amplifier A11, and directly replaces them through the analog-to-digital converter circuit 201. That is, the analog-to-digital converter circuit 201 can be used to achieve the operation and function of the aforementioned first switch Q11, diode D11, capacitor C11, and second amplifier A11.

[0047] The analog-to-digital converter 201 directly receives the operating voltage VDD and converts it into a digital voltage signal. This not only replaces the control of the first switch Q11's on / off state and the repeated charging and discharging of capacitor C11 in the first embodiment, but also replaces the voltage follower operation provided by the second amplifier A11. Therefore, the analog-to-digital converter 201 directly sets and records the desired operating voltage VDD value through digital control. Furthermore, the analog-to-digital converter 201 provides a reference voltage for the third amplifier A21.

[0048] The positive input terminal of the third amplifier A21 is connected to a voltage divider resistor network R21 and R22, which includes the third resistor R21 and the fourth resistor R22. This network receives the operating voltage VDD and divides the operating voltage VDD. Therefore, the divided voltage (i.e., the voltage received at the positive input terminal of the third amplifier A21) is equal to... .

[0049] When the operating voltage VDD increases, the voltage divided by the third resistor R21 and the fourth resistor R22 (i.e., the voltage received at the positive input terminal of the third amplifier A21) also increases accordingly; similarly, when the operating voltage VDD decreases, the voltage divided by the third resistor R21 and the fourth resistor R22 also decreases accordingly. This is because the third amplifier A21 receives the divided voltage (through the positive input terminal) and the reference voltage (through the negative input terminal) respectively, and uses this to amplify the reference voltage. The amplification gain is related to resistors R24 and R23, as well as the divided voltage. Therefore, when the operating voltage VDD is higher, the divided voltage is higher, resulting in a high-level signal output from the third amplifier A21; conversely, when the operating voltage VDD is lower, the divided voltage is lower, resulting in a low-level signal output from the third amplifier A21. In this embodiment, the third switch Q21 is a P-type metal-oxide-semiconductor field-effect transistor (MOSFET). The gate of the third switch Q21 receives the signal output by the third amplifier A21, and the drain and source of the third switch Q21 receive the operating voltage VDD and the ground terminal GND, respectively.

[0050] Therefore, when the operating voltage VDD is too high, the output of the third amplifier A21 outputs a high-level signal to control the third switch Q21 to conduct. Thus, a path with extremely low impedance is formed between the operating voltage VDD and the ground terminal GND, thereby generating a large current I in this conduction path to clamp the operating voltage VDD. Figure 4B is a schematic diagram of the operating voltage and the current in the conduction path in the second embodiment of Figure 4A.

[0051] In summary, the second embodiment disclosed in Figure 4A of this invention is implemented using an analog-to-digital converter circuit 201. After the operating voltage VDD is powered on for a period of time until it stabilizes, the analog-to-digital converter circuit 201 sets and records the voltage value (digital voltage value) of the operating voltage VDD to be clamped and regulated. After recording the voltage value of the operating voltage VDD, this voltage value is used as a reference voltage to be provided to the third amplifier A21.

[0052] When the operating voltage VDD is too high, the signal generated by the third amplifier A21 will be at a high level, which will then control the third switch Q21 to conduct, causing a large current I to flow through the path between the operating voltage VDD and the ground terminal GND. This will clamp the operating voltage VDD to the originally recorded value. Therefore, even if the operating voltage VDD is too high, the voltage clamping device 200 can clamp and stabilize the operating voltage VDD at the desired operating voltage VDD.

[0053] In the second embodiment, it is implemented by analog-to-digital converter circuit 201, which records and sets the voltage value of the working voltage VDD. The voltage value is not affected by voltage changes during operation, thus having better stability and accuracy.

[0054] Please refer to Figure 5A, which is a circuit diagram of the third embodiment of the voltage clamping device of the present invention. The voltage clamping device 300 mainly includes a constant voltage circuit 301, a first voltage divider resistor network R31, R33, a second voltage divider resistor network R32, R34, a first comparator A31, a second comparator A32, a register 302, a fourth amplifier A33, an analog switch 303, a fourth switch Q31, a fifth switch Q32, and a third voltage divider resistor network R38, R39.

[0055] The constant voltage circuit 301 is controlled by the control signal CONT provided by the working circuit 500. Therefore, the control signal CONT is used to start or stop the voltage regulation function of the voltage clamping device 300. In one embodiment, the constant voltage circuit 301 can be a simple capacitor element, a supercapacitor element, a linear regulator, a switching regulator, etc.

[0056] After the operating voltage VDD is powered on for a period of time until it stabilizes, the voltage value of the operating voltage VDD to be clamped and regulated is set and recorded through the constant voltage circuit 301. After recording the voltage value of the operating voltage VDD, this voltage value is used as a reference voltage to be provided to the first comparator A31 and the second comparator A32.

[0057] The positive input terminal of the first comparator A31 is connected to the second voltage divider resistor network R32, R34, which includes a seventh resistor R32 and an eighth resistor R34. This network receives the operating voltage VDD and divides it. Therefore, the second voltage divider voltage (i.e., the voltage received at the positive input terminal of the first comparator A31) is equal to... The negative input of the second comparator A32 is connected to the first voltage divider resistor network R31, R33, which includes the fifth resistor R31 and the sixth resistor R33. This network receives the operating voltage VDD and divides it. Therefore, the first divided voltage (i.e., the voltage received at the negative input of the second comparator A32) is equal to... .

[0058] When the operating voltage VDD increases (especially a rapid increase, or an instantaneous increase, the same applies below and will not be emphasized further), the voltage divided by the seventh resistor R32 and the eighth resistor R34 (that is, the voltage received at the positive input terminal of the first comparator A31) also increases accordingly; similarly, when the operating voltage VDD decreases, the voltage divided by the seventh resistor R32 and the eighth resistor R34 also decreases accordingly. Furthermore, when the operating voltage VDD increases, the voltage divided by the fifth resistor R31 and the sixth resistor R33 (that is, the voltage received at the negative input terminal of the second comparator A32) also increases accordingly; similarly, when the operating voltage VDD decreases, the voltage divided by the fifth resistor R31 and the sixth resistor R33 also decreases accordingly.

[0059] Because the first comparator A31 receives the second divided voltage (through its positive input terminal) and the reference voltage (through its negative input terminal) respectively, and compares the second divided voltage with the reference voltage, the output of the first comparator A31 outputs a high-level signal when the second divided voltage is greater than the reference voltage; conversely, the output of the first comparator A31 outputs a low-level signal when the second divided voltage is less than the reference voltage. Similarly, because the second comparator A32 receives the first divided voltage (through its negative input terminal) and the reference voltage (through its positive input terminal) respectively, and compares the first divided voltage with the reference voltage, the output of the second comparator A32 outputs a low-level signal when the first divided voltage is greater than the reference voltage; conversely, the output of the second comparator A32 outputs a high-level signal when the first divided voltage is less than the reference voltage.

[0060] Referring to Figure 5B, which is a schematic diagram of the operating voltage, conduction path current, and register signal in the third embodiment of Figure 5A, when the operating voltage VDD increases (especially rapidly) at time t1, causing the second voltage divider voltage to be greater than the reference voltage and the first voltage divider voltage to be greater than the reference voltage, the output of the first comparator A31 outputs a high-level signal, and the output of the second comparator A32 outputs a low-level signal. In this embodiment, the register 302 is implemented as an RS flip-flop. In this case, the high-level signal output by the first comparator A31 is provided to the S (set) input of the register 302, while the low-level signal output by the second comparator A32 is provided to the R (reset) input of the register 302.

[0061] Since the S (set) input of register 302 receives a high-level signal and the R (reset) input receives a low-level signal, the Q output of register 302 generates a high-level signal (as shown in Figure 5B), and this high-level signal is provided to analog switch 303 and inverter N31 respectively. This high-level signal generates a low-level signal via inverter N31, which is used to control the fifth switch Q32 to turn off. In this embodiment, the fifth switch Q32 is a P-type MOSFET. The gate of the fifth switch Q32 receives the signal output from inverter N31, and the drain and source of the fifth switch Q32 are connected to the gate of the fourth switch Q31 and the ground terminal GND, respectively. Simultaneously, this high-level signal enables analog switch 303, causing analog switch 303 to output the signal of the fourth amplifier A33, thereby accurately controlling the on and off states of the fourth switch Q31.

[0062] In this invention, the analog switch 303 can be a transmission gate (TMG), which is implemented using CMOS technology and is used to control the conduction and cutoff of signals. Its core components are a PMOS and an NMOS field-effect transistor, and the conduction is determined by complementary control signals.

[0063] In addition to the aforementioned circuit operation, when the operating voltage VDD increases, the third voltage divider voltage (i.e., the voltage received at the positive input terminal of the fourth amplifier A33) provided by the ninth resistor R38 and the tenth resistor R39 also increases accordingly. The higher the operating voltage VDD, the higher the third voltage divider voltage, causing the output terminal of the fourth amplifier A33 to output a high-level signal. Simultaneously, after the analog switch 303 is enabled, this high-level signal controls the fourth switch Q31 to conduct. Incidentally, if the analog switch 303 is not enabled, this high-level signal will not control the fourth switch Q31 to conduct; in other words, even if the signal output by the fourth amplifier A33 is high-level, if the analog switch 303 is not enabled, the fourth switch Q31 will not be turned on.

[0064] In this embodiment, the fourth switch Q31 is a P-type MOSFET. The gate of the fourth switch Q31 receives the signal output from the fourth amplifier A33, and the drain and source of the fourth switch Q31 receive the operating voltage VDD and the ground terminal GND, respectively. Therefore, a path with extremely low impedance is formed between the operating voltage VDD and the ground terminal GND, thereby generating a large current I in this conduction path to clamp the operating voltage VDD.

[0065] Furthermore, referring to Figure 5B, when the operating voltage VDD decreases at time t3 (especially rapidly, or instantaneously, the same applies below, and will not be emphasized further), causing the second voltage divider voltage to be less than the reference voltage and the first voltage divider voltage to be less than the reference voltage, the output of the first comparator A31 outputs a low-level signal, and the output of the second comparator A32 outputs a high-level signal. In this case, the low-level signal output by the first comparator A31 is provided to the S (setting) input of the temporary register 302, while the high-level signal output by the second comparator A32 is provided to the R (reset) input of the temporary register 302.

[0066] Since the S (set) input of register 302 receives a low-level signal and the R (reset) input receives a high-level signal, the Q output of register 302 generates a low-level signal (as shown in Figure 5B). This low-level signal is provided to analog switch 303 and inverter N31. The low-level signal generates a high-level signal via inverter N31, which directly controls the conduction of the fifth switch Q32. Simultaneously, the low-level signal disables analog switch 303, preventing it from outputting the signal from the fourth amplifier A33. Furthermore, although the third voltage divider increases, because the fifth switch Q32 is grounded, a path with extremely high impedance is formed between the operating voltage VDD and the ground terminal GND. This significantly reduces the current in the circuit along this path until it reaches zero.

[0067] In summary, the third embodiment disclosed in Figure 5A of this invention is implemented using a register 302 and an analog switch 303 to design a circuit that responds to rapid changes in the operating voltage VDD. Specifically, when the operating voltage VDD increases rapidly, the first comparator A31 generates a high-level signal and provides it to the S (setting) input of the register 302 to control the conduction of the fourth switch Q31, creating a path with minimal impedance between the operating voltage VDD and the ground terminal GND. This generates a large current in this conduction path, achieving the purpose of clamping the operating voltage VDD. Conversely, when the operating voltage VDD decreases rapidly, the second comparator A32 generates a high-level signal and provides it to the R (reset) input of the register 302 to control the conduction of the fifth switch Q32, creating a path with extremely high impedance between the operating voltage VDD and the ground terminal GND. This significantly reduces the current in this path until it reaches zero.

[0068] The above description is merely a detailed explanation and illustration of preferred embodiments of the present invention. However, the features of the present invention are not limited thereto and are not intended to limit the present invention. The scope of the present invention should be determined by the following claims. All embodiments that conform to the spirit of the claims and similar variations thereof should be included in the scope of the present invention. Any variations or modifications that can be easily conceived by those skilled in the art within the field of the present invention can be covered by the following claims.

[0069] 1: LED string lights 500: Working Circuit 100, 200, 300: Voltage clamping device CONT: Control signal VDD: Operating voltage, DC voltage GND: Ground terminal C11: Capacitor D11: Dipolar Q11: First switch Q12: Second switch A12: First Amplifier A11: Second Amplifier R11: First resistor R12: Second resistor R13, R14: Resistors 201: Analog to Digital Conversion Circuit Q21: Third switch A21: Third Amplifier R21: Third resistor R22: Fourth resistor R23, R24: Resistors 301: Constant Voltage Circuit 302: Temporary Register 303: Analog Switch R31: Fifth resistor R33: Sixth resistor R32: Seventh resistor R34: Eighth resistor R38: Ninth resistor R39: Tenth resistor R35, R36, R37, R30: Resistors Q31: Fourth Switch Q32: Fifth Switch A31: First comparator A32: Second comparator A33: Fourth Amplifier N31: Inverter I: Current 11, 12, 13, ..., 1N: Light-emitting diode (LED) beads 10: Control device VDC: DC power supply VDC+: Positive voltage terminal VDC-: Negative voltage terminal

[0070] none

Claims

1. A light-emitting diode (LED) bead, comprising: A working circuit is electrically connected between a working voltage and a ground terminal to provide power control and / or light emission control for the light-emitting diode chip. A voltage clamping device is connected in parallel to the working circuit. The voltage clamping device includes: a switch electrically connected between the working voltage and the ground terminal; wherein, after the light-emitting diode is powered on, when the working voltage increases to exceed a reference voltage, the switch is controlled to conduct, forming a conduction path between the working voltage and the ground terminal, and a large current flows through the conduction path, so that the voltage clamping device clamps the working voltage supplied to the working circuit.

2. The light-emitting diode (LED) chip as described in claim 1, wherein the voltage clamping device comprises: A capacitor receives the operating voltage and is charged by the operating voltage to establish a capacitor voltage, and records the capacitor voltage as the reference voltage after the operating voltage stabilizes; a first amplifier receives the reference voltage and a voltage divider corresponding to the operating voltage, and compares the voltage divider voltage with the reference voltage to generate a switching signal; and a switch receives the switching signal and is controlled by the switching signal; wherein, when the operating voltage increases beyond the reference voltage, the switching signal controls the switch to turn on, causing a large current to flow through the conduction path.

3. The light-emitting diode (LED) chip as described in claim 2, wherein the voltage clamping device further comprises: A first switch, connected in series with the capacitor, is controlled by a control signal provided by the operating circuit; wherein, when the control signal turns on the first switch, the operating voltage charges the capacitor to establish the capacitor voltage.

4. The light-emitting diode (LED) chip as described in claim 2, wherein the voltage clamping device further comprises: A voltage divider resistor network receives the operating voltage and divides the operating voltage to provide the divided voltage.

5. The light-emitting diode (LED) chip as described in claim 2, wherein the voltage clamping device further comprises: A second amplifier receives the capacitor voltage and provides the capacitor voltage as the reference voltage after the operating voltage stabilizes.

6. The light-emitting diode (LED) chip as described in claim 1, wherein the voltage clamping device comprises: An analog-to-digital converter circuit receives the operating voltage and records it as a reference voltage after the operating voltage stabilizes; a third amplifier receives the reference voltage and a voltage divider corresponding to the operating voltage, and compares the voltage divider with the reference voltage to generate a switching signal; and a switch receives the switching signal and is controlled by the switching signal; wherein, when the operating voltage increases beyond the reference voltage, the switching signal controls the switch to turn on, causing a large current to flow through the conduction path.

7. The light-emitting diode (LED) chip as described in claim 6, wherein the voltage clamping device further comprises: A voltage divider resistor network receives the operating voltage and divides the operating voltage to provide the divided voltage.

8. The light-emitting diode (LED) chip as described in claim 1, wherein the voltage clamping device comprises: A circuit with a fixed voltage receives the operating voltage and records it as the reference voltage after the operating voltage stabilizes. A first comparator receives the reference voltage and a first voltage divider corresponding to the operating voltage, and compares the first voltage divider with the reference voltage to generate a first temporary signal; a second comparator receives the reference voltage and a second voltage divider corresponding to the operating voltage, and compares the second voltage divider with the reference voltage to generate a second temporary signal; a register receives the first temporary signal and the second temporary signal, and generates a temporary output signal based on the level of the first and second temporary signals; a switch; a fourth amplifier receives the temporary output signal and a second reference voltage, and compares the temporary output signal with the second reference voltage to generate a switch signal for controlling the switch; and an analog switch receives the temporary output signal and the switch signal output by the fourth amplifier; wherein, when the temporary output signal enables the analog switch, the analog switch outputs the switch signal to control the switch; When the operating voltage increases beyond the reference voltage, the switch signal controls the switch to turn on, causing a large current to flow through the conduction path.

9. The light-emitting diode (LED) chip as described in claim 8, wherein the voltage clamping device further comprises: A first voltage divider resistor network receives the operating voltage and divides the operating voltage to provide the first voltage divider voltage; And a second voltage divider resistor network, which receives the operating voltage and divides the operating voltage to provide the second voltage divider.

10. The light-emitting diode (LED) chip as described in claim 8, wherein the voltage clamping device further comprises: A third voltage divider resistor network receives the operating voltage and divides the operating voltage to provide the second reference voltage.

11. The light-emitting diode (LED) chip as described in claim 8, wherein the voltage clamping device further comprises: An inverter, coupled to the register, is used to invert the level of the register output signal into a second switching signal; And a second switch, coupled to the inverter and the switch, controlled by the signal of the second switch.

12. The light-emitting diode (LED) chip as claimed in claim 11, wherein when the operating voltage decreases below the reference voltage, the second switch signal controls the second switch to turn on, causing the current in the conduction path to decrease significantly until zero current.

13. A string of light-emitting diodes, comprising: A plurality of light-emitting diode (LED) beads are connected in series, and each LED bead includes: a working circuit electrically connected between a working voltage and a ground terminal for providing power control and / or light emission control for the LED bead; and a voltage clamping device connected in parallel to the working circuit, the voltage clamping device including: a switch electrically connected between the working voltage and the ground terminal; wherein, after the LED string is powered on, when the working voltage of each LED bead in the LED string increases to exceed a reference voltage, the switch of the LED bead is controlled to conduct, forming a conduction path between the working voltage and the ground terminal, and a large current flows through the conduction path, causing the voltage clamping device to clamp the working voltage supplied to the working circuit of the LED bead.

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