Circuit substrate and electronic device

Abstract

A circuit substrate having an active region and a peripheral region is provided. The circuit substrate includes a plurality of conductive layers and a first electrode. The conductive layers include a first conductive layer, a second conductive layer and at least one third conductive layer. The first conductive layer and the second conductive layer are at least disposed on the peripheral region. The third conductive layer is at least disposed on the peripheral region and between the first conductive layer and the second conductive layer. The third conductive layer is electrically connected between the first and the second conductive layers via a plurality of through-holes of the circuit substrate. The first electrode is disposed on the peripheral region and electrically connected to the second conductive layer. An electronic device is also provided.

Description

Technical Field

[0001] This invention relates to a circuit board and an electronic device. Prior Technology

[0002] Electroless nickel immersion gold (ENIG) is a surface coating process for printed circuit boards. This process deposits a nickel-phosphorus alloy layer onto the surface of copper leads, followed by a gold layer to prevent nickel oxidation. Processing the leads of the circuit board using this coating process helps improve the yield of subsequent mass transfer processes. However, depositing a metal film on the leads in the peripheral area of ​​the circuit board can lead to a decrease in the yield of the chip-on-film (COF) packaging process in the peripheral area. Summary of the Invention

[0003] This invention provides a circuit board and electronic device with high process yield.

[0004] According to an embodiment of the present invention, a circuit board is provided, having an active region and a peripheral region. The circuit board includes a plurality of conductive layers and a first electrode. The conductive layers include a first conductive layer, a second conductive layer, and at least one third conductive layer. The first and second conductive layers are disposed at least on the peripheral region. The third conductive layer is disposed at least on the peripheral region and located between the first and second conductive layers. The third conductive layer is electrically connected between the first and second conductive layers through a plurality of vias in the circuit board. The first electrode is disposed on the peripheral region and electrically connected to the second conductive layer.

[0005] According to one embodiment of the present invention, an electronic device is provided, including a circuit board.

[0006] Based on the above, the circuit board and electronic device provided in the embodiments of the present invention have a first conductive layer, a second conductive layer and at least a third conductive layer disposed on the peripheral area. These conductive layers can be used to input signals to the active area or output signals from the active area.

[0007] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings for detailed explanation. Simple Explanation of the Diagram

[0008] Figure 1 shows a schematic diagram of a circuit board according to some embodiments of the present invention. Figure 2A shows a schematic cross-sectional view along line segment AA' of Figure 1 according to a first embodiment of the present invention. Figure 2B shows a schematic cross-sectional view along line segment BB' of Figure 1 according to an embodiment of the present invention. Figure 2C shows an enlarged view of the dashed box in Figure 2B. Figure 3 shows a schematic cross-sectional view along line segment AA' of Figure 1 according to a second embodiment of the present invention. Implementation

[0009] Referring to FIG1, an electronic device 1 is provided according to some embodiments of the present invention. The electronic device 1 includes a circuit board 10 as shown in FIG1. ​​The circuit board 10 includes a stacked structure 100 and has an active region AR and a peripheral region PR. The peripheral region PR of the circuit board 10 includes a first region R1, a second region R2, and an electrode region R3. The first region R1 is located between the active region AR and the electrode region R3, and the second region R2 is located on the side of the electrode region R3 away from the active region AR.

[0010] In some embodiments, the electronic device may be a light-emitting diode display, but is not limited thereto.

[0011] Referring also to Figure 1 and Figure 2A. Figure 2A shows a schematic cross-sectional view along line segment AA' of Figure 1 according to a first embodiment of the present invention.

[0012] The circuit board 10 also includes electrodes 200 located on electrode regions R3 in the peripheral region PR. The stacked structure 100 of the circuit board 10 includes conductive layers 101 (first conductive layer), 102, 103, 104, and 105 (second conductive layer), dielectric layers 201, 202, 203, 204, and 205 in the peripheral region PR. Dielectric layer 201 is disposed between conductive layers 101 and 102, and electrically connects conductive layers 101 and 102 by filling at least one via of dielectric layer 201 with conductive material. Dielectric layer 202 is disposed between conductive layers 102 and 103, and electrically connects conductive layers 102 and 103 by filling at least one via of dielectric layer 202 with conductive material. A dielectric layer 203 is disposed between conductive layers 103 and 104, and electrically connects conductive layers 103 and 104 by filling at least one via of the dielectric layer 203 with conductive material. A dielectric layer 204 is disposed between conductive layers 104 and 105, and electrically connects conductive layers 104 and 105 by filling at least one via of the dielectric layer 204 with conductive material. Accordingly, conductive layer 101 can be electrically connected to conductive layer 105.

[0013] It should be noted that in the structure shown in FIG2A, three conductive layers (i.e., conductive layers 102, 103, and 104) are disposed between conductive layer 101 and conductive layer 105. However, the circuit board 10 provided in the embodiments of the present invention is not limited to the structure shown in FIG2A. In one embodiment, only one conductive layer (i.e., at least one third conductive layer) may be disposed between conductive layer 101 and conductive layer 105 of the circuit board 10.

[0014] Electrode 200 is disposed on electrode region R3 and electrically connected to conductive layer 105. It should be noted that the vertical projection of electrode 200 onto conductive layer 105 and the vertical projection of conductive layers 102, 103, and 104 onto conductive layer 105 do not overlap. In other words, conductive layers 102, 103, and 104 are not disposed on electrode region R3 where electrode 200 is disposed. On the other hand, as shown in FIG2A, circuit board 10 has five conductive layers on first region R1, while circuit board 10 has only two conductive layers on electrode region R3. In general, in the circuit board 10 provided according to the embodiment of the present invention, the number of conductive layers on electrode region R3 is less than the number of conductive layers on first region R1.

[0015] Please refer to Figures 2B and 2C first. Figure 2B shows a cross-sectional view along line segment BB' of Figure 1 according to an embodiment of the present invention, and Figure 2C shows an enlarged view of the dashed frame in Figure 2B. In this embodiment, the electronic device 1 can be a light-emitting diode display 1. Using mass transfer technology, multiple light-emitting diodes (not shown) can be disposed on the circuit board 10 of the light-emitting diode display 1. These light-emitting diodes are bonded to multiple electrodes (second electrodes) 400 on the active area AR of the circuit board 10 during the mass transfer process. In order to improve the yield of the mass transfer process, a metal thin film 410 is deposited on these electrodes 400 by means of chemical plating or electroplating before the mass transfer process. The metal thin film 410 may include, for example, nickel, gold and the like. In the above-described coating process, a metal thin film 210 having the same material as the metal thin film 410 is also formed on the electrode 200, as shown in Figures 2B and 2C. Therefore, in the circuit board 10 provided in the embodiments of the present invention, the number of conductive layers on the electrode region R3 is configured to be less than the number of conductive layers on the first region R1, thereby avoiding the formation of an excessively thick structure on the electrode region R3 of the circuit board 10 after the above-mentioned coating process, which would lead to a decrease in the yield of subsequent processes (e.g., chip-on-film (COF)).

[0016] In the first embodiment shown in FIG2A, conductive layers 101, 102, 103, 104, and 105 are all disposed on the first region R1 and the second region R2. Conductive layer 101 can be electrically connected to conductive layer 105 through conductive layers 102, 103, and 104 on the first region R1, and can also be electrically connected to conductive layer 105 through conductive layers 102, 103, and 104 on the second region R2.

[0017] However, the present invention is not limited to the structure shown in FIG2A. Referring to FIG3, it shows a cross-sectional schematic diagram along line segment AA' of FIG1 according to the second embodiment of the present invention.

[0018] The main difference between this second embodiment and the first embodiment is that the conductive layers 102, 103, and 104 are not disposed on the portion of the second region R2 corresponding to the line segment AA'.

[0019] In this second embodiment, the conductive layer 101 can be electrically connected to the conductive layer 105 via the conductive layers 102, 103, and 104 on the first region R1.

[0020] Furthermore, according to one embodiment, the conductive layer 105 is also disposed on the active region AR, and the conductive layer 101 is disposed on the first region R1, the electrode region R3, and the second region R2. Accordingly, signals can be input to the active region AR through the conductive layer 101 on the second region R2, or signals from the active region AR can be output through the conductive layer 101 on the second region R2.

[0021] Similarly, in another embodiment, conductive layers 102, 103, and 104 are also disposed on the active region AR, and conductive layer 101 is disposed on the first region R1, the electrode region R3, and the second region R2. Accordingly, signals can be input to the active region AR through the conductive layer 101 on the second region R2, or signals from the active region AR can be output through the conductive layer 101 on the second region R2.

[0022] In the second embodiment shown in FIG3, the conductive layer 105 may also be disposed on the first region R1, the electrode region R3 and the second region R2.

[0023] In summary, the circuit board and electronic device provided according to the embodiments of the present invention have at least the following features and advantages: (1) the first conductive layer, the second conductive layer and at least one third conductive layer disposed on the peripheral region can be used to input signals to the active region or output signals from the active region; (2) the number of conductive layers disposed on the electrode region of the peripheral region is less than the number of conductive layers on the first region of the peripheral region; and (3) the circuit board is suitable for improving the yield of mass transfer process by means of chemical plating or electroplating, while taking into account the yield of flip-chip thin film packaging process.

[0024] 1: Electronic devices, light-emitting diode displays 10: Circuit board 100: Layered structure 101, 102, 103, 104, 105: Conductive layers 200: First electrode 201,202,203,204,205: Dielectric layer 210,410:Metal film 400: Second electrode AR: Active Zone PR: Surrounding Area R1: Zone 1 R2: Second Zone R3: Electrode region

Claims

1. A circuit board having an active region and a peripheral region, the circuit board comprising: A plurality of conductive layers, including: a first conductive layer disposed at least on the peripheral region; a second conductive layer disposed at least on the peripheral region; and at least one third conductive layer disposed at least on the peripheral region and located between the first conductive layer and the second conductive layer, wherein the at least one third conductive layer is electrically connected between the first conductive layer and the second conductive layer via a plurality of vias in the circuit board; and a first electrode disposed on the peripheral region and electrically connected to the second conductive layer.

2. The circuit board as claimed in claim 1, wherein the vertical projection of the first electrode on the second conductive layer does not overlap with the vertical projection of the at least one third conductive layer on the second conductive layer.

3. The circuit board of claim 1, wherein the peripheral region includes a first region, an electrode region, and a second region, the first electrode is disposed on the electrode region, the first region is located between the active region and the electrode region, and the second region is located on the side of the electrode region away from the active region, wherein the number of the plurality of conductive layers of the circuit board on the electrode region is less than the number of the plurality of conductive layers of the circuit board on the first region.

4. The circuit board as claimed in claim 1, wherein the circuit board further comprises a first metal thin film located on the first electrode.

5. The circuit board as claimed in claim 4, the circuit board further comprising a second electrode and a second metal thin film, the second electrode being disposed on the active region, the second metal thin film being located on the second electrode, and the first metal thin film and the second metal thin film having the same material.

6. The circuit board as claimed in claim 1, wherein at least one of the second conductive layer and the at least one third conductive layer is further disposed on the active region.

7. The circuit board of claim 6, wherein the peripheral region includes a first region, an electrode region, and a second region, the first region being located between the active region and the electrode region, the second region being located on the side of the electrode region away from the active region, and the first conductive layer being disposed on the first region, the electrode region, and the second region.

8. The circuit board as claimed in claim 3, wherein the second conductive layer is disposed on the first region, the electrode region, and the second region.

9. The circuit board as claimed in claim 3, wherein the at least one third conductive layer is disposed on the second region.

10. An electronic device comprising a circuit board as described in claim 1.

11. The electronic device as claimed in claim 10, wherein the electronic device is a light-emitting diode display.

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