Semiconductor device structure and manufacturing method thereof

Abstract

A semiconductor device structure of this invention is provided. The integrated circuit includes: a first transistor device and a second transistor device, including closely adjacent first and second contact structures in surface region of a semiconductor substrate; and an isolation structure, extending in between the first and second contact structures in the semiconductor substrate, and having at least one laterally protruding structure laterally protruding with respect to vertically extending body portion of the isolation structure. The at least one laterally protruding structure is at least partially located below the first and second contact structures.

Description

[Technical Field]

[0001] This invention relates to a semiconductor device structure and a method for manufacturing the same, and more particularly to a semiconductor device structure and a method for manufacturing the same capable of suppressing leakage current along an isolation structure. [Previous Technology]

[0002] Generally, a semiconductor device structure includes multiple interconnected semiconductor elements. An isolation structure is provided between adjacent semiconductor elements to block unwanted leakage paths. However, during the formation of the isolation structure, charges easily form within it, accumulating opposite polarity charges around the isolation structure to form conductive channels. This adversely affects the isolation effect of the isolation structure and, consequently, the performance of the semiconductor device structure. [Summary of the Invention]

[0003] The present invention provides a semiconductor device structure, comprising: a first transistor element and a second transistor element, including a first contact structure and a second contact structure located on the surface of a substrate and adjacent to each other; and an isolation structure extending in the substrate between the first contact structure and the second contact structure, and having at least one lateral protrusion protruding laterally outward relative to the longitudinally extending body portion of the isolation structure, wherein the at least one lateral protrusion is at least partially located below the first contact structure and the second contact structure.

[0004] The present invention provides a method for manufacturing a semiconductor device structure, comprising: forming an isolation structure in a substrate, wherein the isolation structure has at least one lateral protrusion protruding laterally outward relative to a longitudinally extending body portion of the isolation structure; and forming a first transistor element and a second transistor element on both sides of the isolation structure, wherein the first transistor element and the second transistor element include a first contact structure and a second contact structure located at the surface layer of the substrate and spaced apart by the isolation structure, wherein at least one lateral protrusion of the isolation structure is at least partially located below the first contact structure and the second contact structure.

Implementation Method

[0005] This invention provides an improved isolation structure whose special structure can effectively block surrounding leakage paths. This isolation structure can be applied to various semiconductor device structures, as illustrated below by several embodiments. However, upon understanding, those skilled in the art will recognize that this isolation structure can be applied to other types of semiconductor device structures and will function similarly.

[0006] The semiconductor element structure 10 may be a logic circuit, such as a driving circuit for a memory array. Multiple semiconductor elements are interconnected to provide various functions of the semiconductor element structure 10. The semiconductor elements may include transistor elements 100.

[0007] A transistor element 100 is formed on the surface of a substrate 102 and includes a gate structure 104 disposed on the substrate 102. The gate structure 104 includes a gate electrode 106 and a gate dielectric layer 108 extending between the gate electrode 106 and the substrate 102. The gate structure 104 includes a hard masking layer 110 stacked on the gate electrode 106, including spacer walls 112 extending along the sidewalls of the hard masking layer 110, the gate electrode 106, and the gate dielectric layer 108. The transistor element 100 also includes drain / source structures 114 disposed on both sides of the gate structure 104. The drain / source structures 114 may be provided by doped regions in the surface region of the substrate 102. The drain / source structures 114 may be epitaxial structures formed in surface recesses of the substrate 102.

[0008] In addition to the transistor elements 100, the semiconductor device structure 10 further includes an isolation structure 116 disposed between adjacent transistor elements 100. More specifically, the isolation structure 116 extends between the adjacent drain / source structures 114 of the adjacent transistor elements 100 and extends from the surface of the substrate 102 into the substrate 102. In this way, the isolation structure 116 filled with insulating material can electrically isolate the adjacent drain / source structures 114, thereby avoiding crosstalk between adjacent transistor elements 100.

[0009] The depth of the isolation structure 116 is greater than the depth of the drain / source structure 114, such that the bottom surface of the isolation structure 116 is lower than the bottom surface of the drain / source structure 114. Furthermore, the isolation structure 116 has at least one lateral convex structure (hump) 116h at its middle section and / or bottom, which is lower than the bottom surface of the drain / source structure 114. In FIG. 1, the isolation structure 116 has only a single lateral convex structure 116h located at its middle section between two adjacent transistor elements 100. The top end of the lateral convex structure 116h is lower than the bottom surface of the drain / source structure 114, while the bottom end of the lateral convex structure 116h is higher than the bottom surface of the isolation structure 116.

[0010] The lateral protrusion 116h protrudes outward from the sidewall of the isolation structure 116, such that the isolation structure 116 has a larger width at the lateral protrusion 116h compared to the main body portions above and below. The isolation structure 116 tapers downward from its top, but has a locally larger width at the lateral protrusion 116h. Furthermore, although depicted as having a curved surface, the lateral protrusion 116h may also have other surface shapes.

[0011] During the formation of the isolation structure 116h, fixed charges, such as positive charges, are easily formed in the isolation structure 116h. Charges of opposite polarity, such as negative charges, may be induced around the isolation structure 116h. These charges accumulated on the sidewalls and bottom surface of the isolation structure 116h may inadvertently form a leakage path LK, electrically connecting the drain / source structures 114 located on both sides of the isolation structure 116h. Nevertheless, the lateral protrusion structure 116h of the isolation structure 116 can cut off the leakage path LK, thereby ensuring that the drain / source structures 114 on both sides are electrically isolated from each other. As one mechanism, the lateral protrusion structure 116h can extend through the leakage path LK, thereby effectively cutting off the leakage path LK. As another mechanism, as will be described in more detail below, the lateral protrusion structure 116h has an air gap AG therein, which greatly reduces the charge accumulation around the lateral protrusion structure 116h, thereby cutting off the leakage path LK.

[0012] The isolation structure 116 includes an insulating filler material 118 and an insulating liner 120 covering the sidewalls and bottom surface of the insulating filler material 118. The insulating filler material 118 may be silicon nitride, while the insulating liner 120 may be made of silicon oxide. When forming the insulating filler material 118, fixed charges, such as positive charges, are easily formed in the insulating filler material 118. These fixed charges can induce charges of opposite polarity, such as negative charges, in the surrounding substrate 102 through the insulating liner 120. Nevertheless, the lateral protrusions 116h of the isolation structure 116 prevent these induced charges from continuously extending to the drain / source structures 114 on both sides and forming a leakage path LK. One reason for this is that an air gap AG is formed at the lateral protrusions 116h of the isolation structure 116 between the insulating filler material 118 and the insulating liner 120. The dielectric constant of the air gap AG is much lower than that of the insulating liner 120, thus effectively reducing the opposite polarity charge induced by the fixed charge in the insulating filler material 118 around the lateral protrusion 116h. Furthermore, the formation of the air gap AG allows the insulating filler material 118 to be spaced further from the insulating liner 120 at the lateral protrusion 116h, which also reduces the opposite polarity charge induced around the lateral protrusion 116h. Because charge induction around the lateral protrusion 116h is avoided, the leakage path LK is blocked at the lateral protrusion 116h. Therefore, the effect of the isolation structure 116 electrically isolating adjacent transistor elements 100 can be further ensured, and crosstalk between adjacent memory cells is blocked.

[0013] The semiconductor device structure 20 includes a dynamic random access memory (DRAM) array, which includes multiple access transistors AT formed in multiple active regions 202 on the substrate 200. Although not shown, the DRAM array also includes multiple storage capacitors respectively connected to one access transistor AT. To control the access transistor AT and connect the access transistor AT to the storage capacitor, signal line, bit line contact structures and capacitor contact structures are further provided between the substrate 200 and the storage capacitor.

[0014] Each access transistor AT is defined at the intersection of a word line WL and an active region 202. The word line WL passing through the active region 202 provides the gate of the access transistor AT, and the portions of the active region 202 located on both sides of the intersecting word lines WL serve as the drain and source of the access transistor AT. The active region 202 is shared by a pair of access transistors AT, and is passed through by two word lines WL respectively. The portion of each active region 202 located between the two intersecting word lines WL serves as the common drain / source of the two access transistors AT.

[0015] A character line WL is formed in a trench extending downward from the surface of the substrate 200 into the substrate 200, and includes a gate electrode 204 and a gate dielectric layer 206 covering the sidewalls and bottom surface of the gate electrode 204. The gate electrode 204 is etched back so that its top surface is lower than the surface of the substrate 200, and an insulating plug 208 is backfilled into the trench to cover the top surface of the gate electrode 204. On the other hand, the top of the gate dielectric layer 206 may extend to a height substantially flush with the surface of the substrate 200. Furthermore, the gate electrode 204 contacts the gate dielectric layer 206 via a conductor liner 210. The conductor liner 210 may improve the adhesion between the gate electrode 204 and the gate dielectric layer 206, and / or provide a function for work function adjustment.

[0016] The portion of the active region 202 located on both sides of the staggered word lines WL serves as the drain / source of the access transistor AT. More specifically, this portion of each active region 202 is doped to form a doped region 212 to provide the drain and source of the access transistor AT. The conductivity type of the doped region 212 is opposite to (or complementary to) that of the active region 202.

[0017] In an embodiment where each active region 202 is shared by a pair of access transistors AT, a doped region 212 interleaved between two word lines WL of each active region 202 serves as the common drain / source of the two access transistors AT and is connected to a bit line BL extending above the substrate 200 via a bit line contact structure 214. The bit line contact structure 214 may extend downward from above the substrate 200 to a depth below the surface of the substrate 200, extending into the doped region 212 serving as the common drain / source. The bit line contact structure 214 extends laterally into the top region of the word line WL, for example, into the gate dielectric layer 206 and insulating plug 208 of the word line WL. On the other hand, the bit line BL extends along the top surface of the bit line contact structure 214. The bit line BL includes a conductor layer 216 and a conductor liner 218 extending between the conductor layer 216 and the bit line contact structure 214.

[0018] The other drain / source (doped region 212) of each access transistor AT is connected to a storage capacitor (not shown) via a capacitor contact structure 220. In an embodiment where each active region 202 is shared by a pair of access transistors AT, the capacitor contact structure 220 is disposed on the doped regions 212 interleaved on both sides of the two word lines WL of each active region 202. As an example, the capacitor contact structure 220 may include a lower contact structure 222 and an upper contact structure 224 stacked on the lower contact structure 222. The upper contact structure 224 includes a conductor structure 226 and a conductor liner 228 covering the sidewalls and bottom surface of the conductor structure 226. Furthermore, the total height of the capacitor contact structure 220 is greater than the total height of the bit line contact structure 214 and the bit line BL. The bit line BL extends between the substrate 200 and the storage capacitor (not shown) disposed above the capacitor contact structure 220.

[0019] The bit line contact structure 214, the bit line BL, and the capacitor contact structure 220 are embedded in at least one dielectric layer. The at least one dielectric layer includes a dielectric liner 230 extending along the surface of the substrate 200 and an interlayer dielectric layer 232 formed on the dielectric liner 230. Although the interlayer dielectric layer 232 is shown as a single-layer structure, it can actually be a multilayer structure.

[0020] In the embodiment shown in FIG2, the isolation structure 116 is used to define each active region 202 and to block crosstalk between the access transistors AT defined in each active region 202 and the access transistors AT defined in adjacent active regions 202. The isolation structure 116 can be used to prevent the doped regions 212 on both sides from being accidentally electrically connected to each other via the leakage path LK. More specifically, the lateral protrusions 118 of the isolation structure 116 extend through the leakage path LK to block the leakage path LK, and / or the leakage path LK can be blocked by forming an air gap AG in the lateral protrusions 118 to significantly reduce the accumulation of charge around it. Therefore, the isolation structure 116 can more reliably isolate the doped regions 212 located on both sides, that is, the doped regions 212 connected to the storage capacitor (not shown) via the corresponding capacitor contact structure 220. For the same reason, the isolation structure 116 can effectively isolate the doped regions 212 that serve as common drain / source in adjacent active regions 202 from each other. By blocking these leakage paths, crosstalk between adjacent memory cells can be effectively avoided, thus making DRAM more energy-efficient and having better data retention capabilities.

[0021] At the stage shown in FIG. 3A, a first masking layer 302 is first formed on the substrate 300, followed by the formation of a trench TR that passes through the masking layer 302 and extends into the substrate 300. The substrate 300 may be the substrate 102 illustrated in FIG. 1, or the substrate 200 illustrated in FIG. 2. In a subsequent step, an isolation structure 116 will be formed within the trench TR.

[0022] At the stage shown in FIG3B, a second masking layer 304 is conformally formed along the exposed surfaces of the first masking layer 302 and the substrate 300. In this way, the second masking layer 304 covers the top surface of the first masking layer 302 and the sidewalls and bottom surface of the trench TR.

[0023] At the stage shown in FIG. 3C, the lateral extension portion of the second masking layer 304, namely the portion extending along the top surface of the first masking layer 302 and the portion extending along the bottom surface of the trench TR, is removed. The top surface of the first masking layer 302 is exposed, and the substrate 300 is exposed at the bottom of the trench TR. The above-mentioned patterning of the second masking layer 304 is achieved by an anisotropic etching process. Since the patterning of the second masking layer 304 can be completed without performing a lithography process, the patterning operation of the second masking layer 304 is also called a self-aligned patterning process.

[0024] At the stage shown in FIG3D, an anisotropic etching process is performed using the first masking layer 302 and the second masking layer 304 as masks. The substrate 300 is etched downwards from the bottom of the trench TR, thereby further increasing the depth of the trench TR. After deepening, the bottom of the trench TR is not masked by any masking layer.

[0025] At the stage shown in FIG3E, an isotropic etching process is performed using the first masking layer 302 and the second masking layer 304 as masks. At this time, the substrate 300 is etched isotropically outward from the bottom of the trench TR, which is not covered by any masking layer. The trench TR is deepened and extends laterally outward at the bottom, forming a spherical portion SP that defines the lateral protrusion structure 116h of the isolation structure 116.

[0026] The anisotropic etching process described in FIG3D is omitted, and the isotropic etching process described in FIG3E is performed directly after the patterning of the second mask layer 304 is completed to form the spherical part SP.

[0027] At the stage shown in Figure 3F, an anisotropic etching process is performed again using the first masking layer 302 and the second masking layer 304 as masks. Due to the high directivity of anisotropic etching, the trench TR mainly deepens downwards at this time. The trench TR has a longitudinal extension V below the spherical portion SP.

[0028] At the stage shown in FIG3G, the second masking layer 304 is removed, and then the insulating liner 120 of the isolation structure 116 is conformally formed along the surface of the trench TR. The process of forming the insulating liner 120 includes performing a planarization process, which removes the first masking layer 302 and the portion of the insulating liner 120 located above the surface of the substrate 300.

[0029] Next, at the stage shown in FIG3H, the insulating filler material 118 of the isolation structure 116 is filled into the trench TR. The insulating liner 120 formed in the spherical portion SP of the trench TR and the insulating filler material 118 form the lateral protrusion structure 116h of the isolation structure 116. The insulating filler material 118 is formed using a physical vapor deposition process, and the process conditions are adjusted so that the insulating filler material 118 does not completely fill the spherical portion SP of the trench TR, but an air gap AG is formed in the spherical portion SP between the insulating liner 120 and the insulating filler material 118.

[0030] In Figure 1, the isolation structure 116 can be formed first, and then the transistor element 100 can be manufactured. In Figure 2, the isolation structure 116 can be formed first to define multiple active regions 202, and then the access transistor AT can be formed in the active regions 202. After the access transistor AT is manufactured, the contact structure, bit lines and storage capacitor are formed on the substrate 200.

[0031] The isolation structure 416 shown in Figure 4A is similar to the isolation structure 116 shown in Figures 1 and 2, except that the isolation structure 416 shown in Figure 4A does not have an air gap AG. Specifically, at the lateral protrusion 416h of the isolation structure 416, the insulating filler material 118 expands laterally outward to contact the insulating liner 120, so that there is no air gap between the insulating filler material 118 and the insulating liner 120. Although there is no air gap, the lateral protrusion 416h of the isolation structure 416 still blocks the leakage path LK because it extends through the leakage path LK (as shown in Figures 1 and 2).

[0032] Furthermore, the substrate 400 shown in FIG. 4A may be the substrate 102 illustrated in FIG. 1 or the substrate 200 illustrated in FIG. 2. Moreover, the contact structure 402 shown in FIG. 4A may be the drain / source structure 114 illustrated in FIG. 1 or the doped region 212 illustrated in FIG. 2.

[0033] The top of the lateral protrusion 116h of the isolation structure 116 shown in FIG. 1 is located below the bottom surface of the drain / source structure 114. Similarly, the top of the lateral protrusion 116h of the isolation structure 116 shown in FIG. 2 is located below the bottom surface of the doped region 212, and the top of the lateral protrusion 416h of the isolation structure 416 in FIG. 4A is lower than the bottom surface of the contact structure 402. On the other hand, the top of the lateral protrusion 416h' of the isolation structure 416' in FIG. 4B is higher than the bottom surface of the contact structure 402, while the bottom of the lateral protrusion 416h' is lower than the bottom surface of the contact structure 402. Furthermore, compared to the isolation structures 116 and 416, the bottom of the isolation structure 416' extends downward from the bottom of the lateral protrusion 416h' with a greater depth, thus having a better electrical isolation effect.

[0034] The lateral protrusion 416h' has an air gap AG extending between the insulating filler material 118 and the insulating liner 120. However, at the lateral protrusion 416h', the insulating filler material 118 expands laterally outward to contact the insulating liner 120, so that there is no air gap between the insulating filler material 118 and the insulating liner 120.

[0035] Compared to the upward movement of the lateral protrusion of the isolation structure shown in FIG. 4B, FIG. 4C shows that the lateral protrusion of the isolation structure can also be moved downward. Compared to the isolation structure 116 shown in FIG. 1 and FIG. 2 and the isolation structure 416 shown in FIG. 4A, the isolation structure 416'' shown in FIG. 4C has a lateral protrusion 416h'' spaced further away from the contact structure 402 above. The lateral protrusion 416h'' has an air gap AG extending between the insulating filler material 118 and the insulating liner 120. However, at the lateral protrusion 416h'', the insulating filler material 118 expands laterally outward to contact the insulating liner 120, so that there is no air gap between the insulating filler material 118 and the insulating liner 120.

[0036] The isolation structure 516 shown in FIG. 5 is similar to the isolation structure 116 described in FIG. 1 and FIG. 2, except that the isolation structure 516 shown in FIG. 5 has a plurality of lateral protrusions, including lateral protrusions 516h1 and lateral protrusions 516h2. The lateral protrusions 516h1 protrudes laterally outward relative to the longitudinally extending body portion of the isolation structure 516 below the contact structure 402, while the lateral contact structure 516h2 protrudes laterally outward relative to the longitudinally extending body portion of the isolation structure 516 below the lateral protrusions 516h1. In some embodiments, the bottom end of the lateral protrusions 516h2 defines the bottom end of the isolation structure 516. In addition, the top end of the lateral protrusions 516h2 may contact the bottom end of the lateral protrusions 516h1. Alternatively, the top end of the lateral protrusions 516h2 may be spaced apart from the bottom end of the lateral protrusions 516h1 in the vertical direction.

[0037] The width W1 of the lateral contact structure 516h1 is greater than the width W2 of the lateral protrusion structure 516h2. In addition, in some embodiments, at least one of the lateral protrusion structures 516h1 and 516h2 has an air gap AG extending between the insulating filler material 118 and the insulating liner 120.

[0038] This process is similar to the process described in Figures 3A to 3H, except that there is a difference after the step described in Figure 3F. Specifically, after performing an isotropic etching process to form the longitudinal extension V of the trench TR (as shown in Figure 3F), an isotropic etching process is performed again in the stage shown in Figure 6A. As a result, the spherical portion SP of the trench TR that is not covered by the second masking layer 304 further expands laterally to form a spherical portion SP1, and the longitudinal extension V expands laterally outward to form a spherical portion SP2. In subsequent steps, the lateral protrusion structure 516h1 of the isolation structure 516 will be filled into the spherical portion SP1, and the lateral protrusion structure 516h2 of the isolation structure 516 will be filled into the spherical portion SP2. Since the formation of the spherical part SP1 involves two isotropic etching processes while the formation of the spherical part SP2 involves only one isotropic etching process, the width of the spherical part SP1 (i.e. the width W1 of the lateral protrusion structure 516h1) is greater than the width of the spherical part SP2 (i.e. the width W2 of the lateral protrusion structure 516h2).

[0039] At the stage shown in FIG6B, the second masking layer 304 is removed, and then the insulating liner 120 of the isolation structure 516 is conformally formed along the surface of the trench TR. The process of forming the insulating liner 120 includes performing a planarization process, which removes the first masking layer 302 and the portion of the insulating liner 120 located above the surface of the substrate 300.

[0040] Next, at the stage shown in FIG. 6C, the insulating filler material 118 of the isolation structure 516 is filled into the trench TR. The insulating liner 120 formed in the spherical portion SP1 of the trench TR and the insulating filler material 118 form the lateral protrusion structure 516h1 of the isolation structure 516, while the insulating liner 120 formed in the spherical portion SP2 of the trench TR and the insulating filler material 118 form the lateral protrusion structure 516h2 of the isolation structure 516. The insulating filler material 118 is formed using a physical vapor deposition process, and the process conditions are adjusted so that the insulating filler material 118 does not completely fill the spherical portion SP1 and / or spherical portion SP2 of the trench TR, and an air gap AG is formed in the spherical portion SP1 and / or spherical portion SP2 between the insulating liner 120 and the insulating filler material 118.

[0041] The isolation structure 716 shown in FIG7A is similar to the isolation structure 516 illustrated in FIG5, except that the lateral protrusions 716h1 and 716h2 of the isolation structure 716 do not have air gaps. At the lateral protrusions 716h1 and 716h2, the insulating filler material 118 expands laterally outward to contact the insulating liner 120, so that there is no air gap between the insulating filler material 118 and the insulating liner 120.

[0042] The isolation structure 716' shown in FIG7B is similar to the isolation structure 516 described in FIG5, except that the lateral protrusion 716h2' located below the lateral protrusion 716h1' of the isolation structure 716' is not located at the bottom of the isolation structure 716'. Specifically, the isolation structure 716' further has a bottom longitudinal extension structure 716v that extends downward from the lateral protrusion 716h2' to the bottom of the isolation structure 716'.

[0043] The manufacturing method of the isolation structure 716' is similar to that of Figures 6A to 6C, except that after forming the spherical portions SP1 and SP2 of the trench TR, an additional anisotropic etching process can be performed to etch the substrate 400 downward from the bottom of the spherical portion SP2 to form the longitudinal extension of the trench TR. In a subsequent step, the insulating liner 120 and the insulating filler material are formed on the longitudinal extension of the trench TR to form the bottom longitudinal extension structure 716v of the isolation structure 716'.

[0044] In addition, the lateral protrusions 716h1' and / or lateral protrusions 716h2' have an air gap AG extending between the insulating filler material 118 and the insulating liner 120. However, at the lateral protrusions 716h1' and 716h2', the insulating filler material 118 expands laterally outward to contact the insulating liner 120, so that there is no air gap between the insulating filler material 118 and the insulating liner 120.

[0045] The isolation structure 716'' shown in FIG7C is similar to the isolation structure 716' illustrated in FIG7B, except that the lateral protrusions 716h1'' and 716h2'' of the isolation structure 716'' are moved upward, so that the top of the lateral protrusion 716h1'' located above the lateral protrusion 716h2'' is higher than the bottom surface of the contact structure 402. Corresponding to the upward movement of the lateral protrusions 716h1'' and 716h2'', the bottom longitudinal extension structure 716v' of the isolation structure 716'' extends downward from a higher height to the bottom end of the isolation structure 716'', and can have a greater height than the longitudinal extension structure 716v shown in FIG7B.

[0046] The lateral protrusions 716h1'' and / or lateral protrusions 716h2'' have an air gap AG extending between the insulating filler material 118 and the insulating liner 120. However, at the lateral protrusions 716h1'' and 716h2'', the insulating filler material 118 expands laterally outward to contact the insulating liner 120, so that there is no air gap between the insulating filler material 118 and the insulating liner 120.

[0047] Despite various variations, the isolation structure provided in this disclosure can interrupt surrounding leakage paths based on one or more lateral protrusions, thus providing better electrical isolation. Although this disclosure describes an isolation structure with one or two lateral protrusions, in practice, an isolation structure in a particular product may have three or more lateral protrusions. Furthermore, the isolation structure described in this disclosure is not limited to application in the logic circuits and memory circuits illustrated in Figures 1 and 2, but can be applied to various semiconductor device structures that require isolation structures to ensure electrical isolation between adjacent components. [Simplified Explanation of the Diagram]

[0048] Figures 1 and 2 are cross-sectional schematic diagrams illustrating a portion of a semiconductor device structure according to some embodiments of the present invention. Figures 3A to 3H are cross-sectional schematic diagrams illustrating a series of intermediate structures during the process of forming the isolation structure shown in Figures 1 and 2 according to some embodiments of the present invention. Figures 4A-4C, 5, and 7A-7C are cross-sectional schematic diagrams illustrating an isolation structure according to some embodiments of the present invention. Figures 6A to 6C are cross-sectional schematic diagrams illustrating a series of intermediate structures during the process of forming the isolation structure shown in Figure 5 according to some embodiments of the present invention.

Claims

1. A semiconductor device structure, comprising: The first transistor element and the second transistor element include a first contact structure and a second contact structure located on the surface of the substrate and adjacent to each other; And an isolation structure extending in the substrate between the first contact structure and the second contact structure, and having at least one lateral protrusion that protrudes laterally outward relative to the longitudinally extending main body of the isolation structure, wherein the at least one lateral protrusion is at least partially located below the first contact structure and the second contact structure, wherein the isolation structure includes an insulating filler material and an insulating liner covering the sidewalls and bottom surface of the insulating filler material, and the at least one lateral protrusion has an air gap extending between the insulating filler material and the insulating liner.

2. The semiconductor device structure as claimed in claim 1, wherein the at least one lateral protrusion of the isolation structure is entirely located below the first contact structure and the second contact structure.

3. The semiconductor device structure as claimed in claim 1, wherein the top end of the at least one lateral protrusion of the isolation structure is higher than the bottom ends of the first contact structure and the second contact structure.

4. The semiconductor device structure as claimed in claim 1, wherein the at least one lateral protrusion of the isolation structure includes a first lateral protrusion arranged in a vertical direction and a second lateral protrusion located below the first lateral protrusion, and the width of the first lateral protrusion is greater than the width of the second lateral protrusion.

5. A method for manufacturing a semiconductor device structure, comprising: An isolation structure is formed in the substrate, wherein the isolation structure has at least one lateral protrusion that protrudes laterally outward relative to the longitudinally extending main body portion of the isolation structure. A first transistor element and a second transistor element are formed on both sides of the isolation structure, wherein the first transistor element and the second transistor element include a first contact structure and a second contact structure located on the surface of the substrate and spaced apart by the isolation structure, wherein the at least one lateral protrusion of the isolation structure is at least partially located below the first contact structure and the second contact structure, wherein the isolation structure includes an insulating filler material and an insulating liner covering the sidewalls and bottom surface of the insulating filler material, and the at least one lateral protrusion has an air gap extending between the insulating filler material and the insulating liner.

6. A method for manufacturing a semiconductor device structure as claimed in claim 5, wherein the method for forming the isolation structure comprises: A trench is formed on the surface of the substrate; A shielding layer is formed along the sidewalls of the ditch; Isotropic etching is performed to cause the bottom of the trench to expand outward into a spherical shape; The substrate is etched downwards from the bottom of the spherical portion; Remove the shielding layer; and fill the trench with the isolation structure.

7. A method for manufacturing a semiconductor device structure as claimed in claim 6, wherein filling the trench with the isolation structure comprises: An insulating lining is formed along the surface of the ditch; And fill the ditch with insulating filler material.

8. A method for manufacturing a semiconductor device structure as claimed in claim 5, wherein the method for forming the isolation structure comprises: A trench is formed on the surface of the substrate; A shielding layer is formed along the sidewalls of the ditch; Perform a first isotropic etching such that the bottom of the trench extends outward to form a first spherical portion; etch the substrate downward from the bottom of the first spherical portion; perform a second isotropic etching such that the first spherical portion extends further outward, and the current bottom of the trench extends outward to form a second spherical portion; remove the masking layer; and fill the trench with the isolation structure.

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