Semiconductor device and method for fabricating the same

Abstract

A method of fabricating a semiconductor device, including: forming a trench in a substrate; forming a barrier layer on a sidewall of the trench, in which the trench exposes an upper surface of the substrate; via the trench, performing an etching back process on the substrate to lower the upper surface of the substrate and exposing a side surface of the substrate; modifying the oxidation characteristics of the exposed upper surface and side surface of the substrate; depositing a dielectric layer on the upper surface and the side surface of the substrate; and forming a gate structure on the dielectric layer.

Claims

1. A method for manufacturing a semiconductor device, comprising: A trench is formed in a substrate; A barrier layer is formed on one sidewall of the trench, wherein the trench exposes an upper surface of the substrate; The substrate is etched once via the trench to reduce the upper surface of the substrate and expose one side surface of the substrate; the oxide properties of the exposed upper and side surfaces of the substrate are modified; a dielectric layer is deposited on the upper and side surfaces of the substrate, wherein the dielectric layer has a horizontal portion along the upper surface of the substrate and a vertical portion along the side surface of the substrate, wherein the horizontal and vertical portions intersect at a corner, wherein a dopant concentration at the corner is higher than a dopant concentration at the horizontal portion; and a gate structure is formed on the dielectric layer.

2. The method as described in claim 1, wherein modifying the oxidation properties of the upper surface and the side surface of the substrate comprises implanting a dopant species into the substrate.

3. The method as described in claim 2, wherein the dopant species is a p-type dopant, nitrogen (N), or argon (Ar).

4. The method as described in claim 2, wherein the dopant species is implanted into the substrate at an angle.

5. The method as described in claim 1 further includes removing the barrier layer before depositing the dielectric layer.

6. The method as claimed in claim 1, wherein forming the barrier layer comprises: forming a barrier layer material along the trench; and removing a portion of the barrier layer material located above the upper surface of the substrate.

7. A semiconductor device, comprising: One substrate; A gate dielectric layer is located in the substrate and has a horizontal portion along an upper surface of the substrate and a vertical portion along a sidewall of the substrate, wherein the horizontal portion and the vertical portion intersect at a corner portion, wherein a dopant concentration in the corner portion is higher than a dopant concentration in the horizontal portion; and a gate structure is located above the gate dielectric layer.

8. The semiconductor device as claimed in claim 7, wherein a thickness of the corner portion is greater than a thickness of the horizontal portion and a thickness of the vertical portion.

9. The semiconductor device as claimed in claim 8, wherein the thickness of the horizontal portion is greater than the thickness of the vertical portion.

10. The semiconductor device as claimed in claim 7, wherein the horizontal portion and the corner portion have a dopant, wherein the dopant is a p-type dopant, nitrogen (N) or argon (Ar).

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