Separate gate superjunction IGBT devices and their preparation methods

TW202634971APending Publication Date: 2026-08-16重庆万国半导体科技有限公司
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Patent Information

Application Number
TW114118536
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-02-12
Filing Date
2025-05-16
Publication Date
2026-08-16

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    Figure TWG2TA001072474_003
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Abstract

The present invention discloses a separated gate super junction IGBT device and its preparation method. The IGBT device comprises a first P+layer and an epitaxial layer arranged on the first P+layer. The upper part of the epitaxial layer is formed with a P-type base region by injection, and the lower part of the P-type base region is periodically arranged with P and N columns along the first direction. The upper ends of the P and N columns are connected to the P-type base region, and the doping concentration of the P-type base region is greater than that of the P column; A separation gate structure is provided above the N-pillar, and between adjacent separation gate structures, an N-type base region and a second P+region are sequentially injected on the P-type base region; The lower end of the first P+layer is provided with a back metal, and the separation gate structure and the upper end of the second P+region are provided with an emitter metal. In the present invention, the conduction voltage drop and turn off loss can be reduced, and the Miller capacitor can also be reduced to reduce the switching loss
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