Semiconductor material and method for preparing the same

Abstract

The present disclosure provides a method for preparing a semiconductor material, which includes the steps as follows. A first chalcogenide material is ablated by a laser source at a first frequency so as to form a plurality of first chalcogenide units. The first chalcogenide units are deposited on a substrate to form a base layer. At least one photoresist layer is formed on the base layer, and a portion of the base layer is exposed outside the photoresist layer. A second chalcogenide material is ablated by the laser source at a second frequency so as to form a plurality of second chalcogenide units. The second chalcogenide units are deposited on the portion of the base layer so as to form at least one doping area. The photoresist layer is removed to obtain the semiconductor material. Therefore, a doping process can be precisely controlled and the crystal structure will not be destroyed during the doping process so as to prepare the semiconductor material with a precise dimension.

Description

Technical Field

[0001] This disclosure relates to a material and its preparation method, and in particular to a semiconductor material and its preparation method. Prior Technology

[0002] Using doping methods to control the carrier concentration in semiconductor materials, thereby adjusting the electrical properties and performance of the semiconductor materials, is a common method for semiconductor material preparation. The conventional doping method is ion implantation, which involves ionizing the dopant material and increasing its kinetic energy, using an electric field to accelerate the ion movement speed and control its direction, and directly implanting the ionized dopant material into the wafer, allowing the dopant material to diffuse into the wafer interior, thus completing the semiconductor material doping process.

[0003] In conventional doping methods, the kinetic energy and direction of motion of dopant ions are difficult to control precisely after entering the semiconductor material. During the doping process, the dopant ions can disrupt the crystal structure of the semiconductor material, affecting its performance stability. Furthermore, the inability to precisely control the location of the doped region impacts the production yield of the semiconductor material. Therefore, the lack of effectively controlled doping processes makes the electrical properties and performance stability of semiconductor materials a major challenge.

[0004] In view of this, the development of a method for preparing semiconductor materials that can precisely control the doping process without destroying the crystal structure, in order to prepare high-performance and precise-scale semiconductor materials, has been a long-standing goal of the industry. Summary of the Invention

[0005] One objective of this disclosure is to provide a semiconductor material and its preparation method, which, by setting the frequency of the laser source and setting the photoresist layer, precisely controls the formation of the doped region, which is beneficial for preparing high-performance and precise-scale semiconductor materials.

[0006] One aspect of this disclosure is a method for preparing a semiconductor material comprising the following steps: A laser source is used to melt a first chalcogenide material at a first frequency to form a plurality of first chalcogenide units. The first chalcogenide units are deposited on a substrate to form a bottom layer. At least one photoresist layer is formed on the bottom layer, wherein a portion of the surface of the bottom layer is exposed outside the at least one photoresist layer. A laser source is used to melt a second chalcogenide material at a second frequency to form a plurality of second chalcogenide units. The second chalcogenide units are deposited on a portion of the surface of the bottom layer to form at least one doped region. At least one photoresist layer is removed to obtain a semiconductor material.

[0007] According to the method for preparing the semiconductor material described above, the photoresist layer may include a resin and a photosensitizer.

[0008] According to the semiconductor material preparation method described above, the wavelength of the laser source can be from 100 nm to 850 nm.

[0009] According to the semiconductor material preparation method described above, the first frequency can be from 10 Hz to 1000 Hz, and the second frequency can be from 10 Hz to 1000 Hz.

[0010] According to the method for preparing the semiconductor material described above, when depositing the second chalcogenide unit on a portion of the surface of the substrate, a heating temperature of 200°C to 330°C is provided on a portion of the surface of the substrate.

[0011] According to the semiconductor material preparation method described above, the chalcogenide source of the first chalcogenide material can be sulfur, selenium or tellurium, and the chalcogenide source of the second chalcogenide material can be sulfur, selenium or tellurium.

[0012] According to the method for preparing semiconductor materials of the aforementioned state, the first chalcogenide material may contain an element from Group VB, Group VIB or Group VA of the periodic table.

[0013] Another aspect of this disclosure is to provide a semiconductor material prepared by the method described above. The semiconductor material includes an underlayer and at least one doped region. The underlayer includes a first chalcogenide unit. The at least one doped region includes a second chalcogenide unit, and the second chalcogenide unit is bonded to the first chalcogenide unit of the underlayer.

[0014] Based on the semiconductor material described above, the first chalcogenide material may contain a group VIB element of the periodic table, and the second chalcogenide material may contain a group VB element of the periodic table.

[0015] Based on the semiconductor material described above, the first chalcogenide material may contain a group VIB element of the periodic table, and the second chalcogenide material may contain a group VA element of the periodic table. Simple Explanation of the Diagram

[0016] To make the above and other objects, features, advantages and embodiments of this disclosure more apparent and understandable, the accompanying drawings are described below: Figure 1 is a flowchart illustrating the steps of a method for preparing a semiconductor material according to one embodiment of this disclosure; Figure 2 is a schematic diagram of a laser melting apparatus used in the semiconductor material preparation method according to Figure 1; Figure 3A shows a cross-sectional schematic diagram of the substrate and the underlying layer in the semiconductor material fabrication method according to Figure 1; Figure 3B illustrates a cross-sectional schematic diagram of the photoresist layer and doped region in the semiconductor material fabrication method according to Figure 1; Figure 3C shows a cross-sectional schematic diagram of the electrode structure; The 3D diagram illustrates a cross-sectional view of the semiconductor material in the semiconductor material preparation method according to Figure 1; Figure 4A illustrates a schematic diagram of the structure of a semiconductor material according to another embodiment of this disclosure; Figure 4B illustrates a schematic diagram of the structure of a semiconductor material according to another embodiment of this disclosure; Figure 4C illustrates a schematic diagram of the structure of a semiconductor material according to yet another embodiment of this disclosure; Figure 5 is an image obtained using a scanning electron microscope in Example 1; Figure 6A shows the ID-VD data for Comparative Example 1; Figure 6B is an ID-VD data graph of Example 1; Figure 7 shows the ID-VG data for Example 1 and Comparative Example 1; Figure 8 shows the ID-VG data for Examples 2 and 3; Figure 9A shows the hysteresis curve data for Comparative Example 1; and Figure 9B is a hysteresis curve data graph of Example 1. Implementation

[0017] The various embodiments of this disclosure will be discussed in more detail below. However, these embodiments can be applications of various inventive concepts and can be implemented in various different specific scopes. The specific embodiments are for illustrative purposes only and are not limited to the scope of the disclosure.

[0018] <Preparation Methods of Semiconductor Materials>

[0019] Please refer to Figures 1 through 3D. Figure 1 is a flowchart illustrating the steps of a semiconductor material preparation method 100 according to an embodiment of this disclosure. Figure 2 is a schematic diagram of the laser melting apparatus 110 used in the semiconductor material preparation method 100 according to Figure 1. Figure 3A is a cross-sectional schematic diagram of the substrate 113 and the bottom layer 114 in the semiconductor material preparation method 100 according to Figure 1. Figure 3B is a cross-sectional schematic diagram of the photoresist layer 115 and the doped region 116 in the semiconductor material preparation method 100 according to Figure 1. Figure 3C is a cross-sectional schematic diagram of the electrode structure 118. Figure 3D is a cross-sectional schematic diagram of the semiconductor material 117 in the semiconductor material preparation method 100 according to Figure 1. As shown in Figure 1, the semiconductor material preparation method 100 includes steps 101, 102, 103, 104, 105, and 106.

[0020] In step 101, a laser source L melts a first chalcogenide material (not shown) at a first frequency to form a plurality of first chalcogenide units (not shown). As shown in Figure 2, the laser melting apparatus 110 includes a laser source L, a mounting base H, and a chalcogenide material 111. The operation of the laser melting apparatus 110 includes placing the chalcogenide material 111 in the mounting base H, and having the laser source L travel from path P1 to the surface of the chalcogenide material 111 and melt it to form a plurality of chalcogenide units 112. It should be noted that the chalcogenide material 111 placed in the mounting base H can be configured as a first chalcogenide material or a second chalcogenide material in different steps as needed. Specifically, in step 101, the first chalcogenide material can be placed in the mounting base H and melted by the laser source L to obtain the first chalcogenide units, but this disclosure is not limited thereto. Furthermore, the wavelength of the laser source L can be from 100 nm to 850 nm. This ensures the efficiency of laser melting and homogenizes the size of the first chalcogenide unit, which is beneficial for producing semiconductor material 117 with precise dimensions. Moreover, the first frequency can be from 10 Hz to 1000 Hz. This ensures the production efficiency of the first chalcogenide unit. Preferably, the first frequency can be from 10 Hz to 500 Hz. This ensures the stability of the physical properties of the first chalcogenide unit. More preferably, the first frequency can be from 10 Hz to 100 Hz. This ensures the structural integrity of the first chalcogenide unit.

[0021] In step 102, a first chalcogenide unit is deposited on a substrate 113 to form a bottom layer 114. As shown in Figures 2 and 3A, when the chalcogenide unit 112 is the first chalcogenide unit, the first chalcogenide unit will be deposited along path P2 on the substrate 113 to form the bottom layer 114. Furthermore, the substrate 113 can be made of glass, silicon, silicon dioxide, polyimide, graphite, metal oxide, or ceramic materials. The material of the substrate 113 can be selected according to the application requirements to increase the applicability of the semiconductor material 117. Moreover, the thickness of the substrate 113 can be from 30 nm to 200 nm. This can improve the production yield of the semiconductor material preparation method 100.

[0022] In step 103, at least one photoresist layer 115 is formed on the substrate 114, wherein a portion of the surface of the substrate 114 is exposed outside the at least one photoresist layer 115. Further, the photoresist layer 115 may contain a resin and a photosensitizer, but is not limited thereto. This simplifies the operational steps of the semiconductor material fabrication method 100 and improves process stability.

[0023] In step 104, a second chalcogenide material (not shown) is melted by laser source L at a second frequency to form a plurality of second chalcogenide units (not shown). Referring to Figure 2, in step 104, the second chalcogenide material can be placed in the fixture H and melted by laser source L to obtain the second chalcogenide units, but this disclosure is not limited thereto. Furthermore, the wavelength of laser source L can be from 100 nm to 850 nm. This ensures the efficiency of laser melting and homogenizes the size of the second chalcogenide units, which is beneficial for producing semiconductor material 117 with precise dimensions. Moreover, the second frequency can be from 10 Hz to 1000 Hz. This ensures the efficiency of the generation of the second chalcogenide units. Preferably, the second frequency can be from 10 Hz to 500 Hz. This ensures the stability of the physical properties of the second chalcogenide units. More preferably, the second frequency can be from 10 Hz to 100 Hz. This ensures the structural integrity of the second chalcogenide unit.

[0024] In step 105, a second chalcogenide unit is deposited on a portion of the surface of the substrate 114 to form at least one doped region 116. As shown in Figures 2 and 3B, when the chalcogenide unit 112 is the second chalcogenide unit, the second chalcogenide unit is deposited along path P2 onto the substrate 114, forming the doped region 116. This precisely adjusts the electrical properties of the semiconductor material 117. Furthermore, when depositing the second chalcogenide unit on a portion of the surface of the substrate 114, a heating temperature of 200°C to 330°C is provided on that portion of the substrate 114. This improves deposition efficiency. Preferably, the heating temperature is 250°C to 300°C. This improves deposition efficiency and ensures the uniformity of the doped region 116, which is beneficial to the quality of the semiconductor material 117.

[0025] In step 106, at least one photoresist layer 115 is removed to obtain a semiconductor material 117. Specifically, before removing the at least one photoresist layer 115, at least one electrode structure 118 can be formed on at least one doped region 116. As shown in Figures 3C and 3D, the electrode structure 118 can correspond to the doped region 116, and the semiconductor material 117 can be electrically connected to a mating element via the electrode structure 118, thereby increasing the application versatility of the semiconductor material 117. Specifically, the electrode structure 118 can contain palladium and gold. This improves the durability of the electrode structure 118.

[0026] Furthermore, the chalcogenide source of the first chalcogenide material can be sulfur, selenium, or tellurium, and the chalcogenide source of the second chalcogenide material can also be sulfur, selenium, or tellurium. Specifically, sulfur, selenium, and tellurium are all chalcogenide elements, and the chalcogenide materials formed by them possess unique electrical properties, which are beneficial to the applicability of semiconductor material 117. Using semiconductor material 117 in electronic components can increase the transmission speed and electrical performance of the electronic components. Moreover, the first chalcogenide material can contain elements from Group VB, Group VIB, or Group VA of the periodic table. This contributes to the bonding stability of semiconductor material 117.

[0027] Semiconductor Materials

[0028] Please refer to Figures 4A to 4C. Figure 4A is a schematic diagram illustrating the structure of semiconductor material 200a according to another embodiment of the present disclosure. Figure 4B is a schematic diagram illustrating the structure of semiconductor material 200b according to yet another embodiment of the present disclosure. Figure 4C is a schematic diagram illustrating the structure of semiconductor material 200c according to yet another embodiment of the present disclosure. The aforementioned semiconductor materials 200a, 200b, and 200c are all prepared by the semiconductor material preparation method of the present disclosure. As shown in Figure 4A, semiconductor material 200a includes a bottom layer 210a and at least one doped region 220a. The bottom layer 210a includes a first chalcogenide unit 211a. The doped region 220a includes a second chalcogenide unit 221a, and the second chalcogenide unit 221a is bonded to the first chalcogenide unit 211a of the bottom layer 210a. Specifically, the doped region 220a covers a portion of the bottom layer 210a, thereby forming a two-dimensional structure of semiconductor material 200a. Specifically, semiconductor material 200a is formed at a relatively low heating temperature, so the doped region 220a only bonds to the surface of the underlying layer 210a, without any atomic substitution. As shown in Figure 4B, semiconductor material 200b includes an underlying layer 210b and at least one doped region 220b. The underlying layer 210b includes a first chalcogenide unit 211b. The doped region 220b includes a second chalcogenide unit 221b, and the second chalcogenide unit 221b is bonded to the first chalcogenide unit 211b of the underlying layer 210b. In detail, the second chalcogenide unit 221b can fill the structural vacancies of the underlying layer 210b, thereby reducing structural defects in semiconductor material 200b and improving its electrical performance and reactivity. Specifically, semiconductor material 200b is formed at a relatively high heating temperature, so the doped region 220b has sufficient kinetic energy to penetrate the underlying layer 210b and perform atomic substitution. As shown in Figure 4C, the semiconductor material 200c includes a bottom layer 210c and at least one doped region 220c. The bottom layer 210c includes a first chalcogenide unit 211c. The doped region 220c includes a second chalcogenide unit 221c, and a van der Waals force exists between the second chalcogenide unit 221c and the first chalcogenide unit 211c of the bottom layer 210c. Specifically, the second chalcogenide unit 221c covers the surface of the bottom layer 210c, forming a multilayer semiconductor material 200c. Specifically, the semiconductor material 200c is formed at a relatively low heating temperature, and a complete doped region 220c is formed on the surface of the bottom layer 210c by adjusting the second frequency of the laser source. By adjusting the wavelength, first frequency, and second frequency of the laser source in the semiconductor material preparation method as needed, the structure and electrical properties of the semiconductor materials 200a, 200b, and 200c can be adjusted.

[0029] The following specific embodiments further illustrate the contents of this disclosure, so as to enable those skilled in the art to fully utilize and practice the contents of this disclosure without excessive interpretation. These embodiments should not be regarded as limiting the scope of the contents of this disclosure, but are used to illustrate how to implement the materials and methods of this disclosure.

[0030] <Example / Comparative Example>

[0031] Example 1: The semiconductor material 300 of Example 1 (hereinafter referred to as Example 1) was prepared by the semiconductor material preparation method disclosed herein, wherein the wavelength of the laser source is 100 nm to 850 nm, the first frequency is 10 Hz to 1000 Hz, and the second frequency is 10 Hz to 1000 Hz. Furthermore, the heating temperature is 200°C to 300°C, and the substrate is silicon dioxide. The bottom layer 310 of Example 1 contains a first chalcogenide material, which is tungsten diselenide. The doped region 320 of Example 1 contains a second chalcogenide material, which is vanadium diselenide. In addition, an electrode structure 330 is formed on the doped region 320, and the electrode structure 330 contains palladium. Please refer to Figure 5, which is a scanning electron microscope image of Example 1. As shown in Figure 5, Example 1 contains tungsten diselenide in the bottom layer 310 and vanadium diselenide in the doped region 320. This proves that the semiconductor material preparation method disclosed herein can successfully produce semiconductor material 300.

[0032] Example 2: The preparation method of the semiconductor material in Example 2 (hereinafter referred to as Example 2) is similar to that in Example 1, except for the types of the first chalcogenide material and the second chalcogenide material. The bottom layer of Example 2 contains the first chalcogenide material, which is vanadium diselenide doped with tungsten diselenide. The doped region of Example 2 contains the second chalcogenide material, which is vanadium diselenide.

[0033] Example 3: The preparation method of the semiconductor material in Example 3 (hereinafter referred to as Example 3) is similar to that in Example 1, except for the types of the first chalcogenide material and the second chalcogenide material. The bottom layer of Example 3 contains the first chalcogenide material, which is tungsten diselenide. The doped region of Example 3 contains the second chalcogenide material, which is bismuth selenide.

[0034] Comparative Example 1: The semiconductor material of Comparative Example 1 is tungsten diselenide.

[0035] <Analysis of Electric Field Effects>

[0036] Electric field effect analysis includes ID-VD characteristic analysis and ID-VG characteristic analysis. Specifically, when a semiconductor material is used as a field-effect transistor (MOSFET), an applied voltage VG can start the MOSFET. When the applied voltage VG exceeds the threshold Vth, the MOSFET is in the on state. Providing a voltage VD under different VG conditions will generate different drain currents ID.

[0037] Please refer to Figures 6A to 8. Figure 6A shows the ID-VD data for Comparative Example 1, Figure 6B shows the ID-VD data for Example 1, Figure 7 shows the ID-VG data for Example 1 and Comparative Example 1, and Figure 8 shows the ID-VG data for Example 2 and Example 3. As shown in Figure 6A, when the voltage VD is greater than 0, the drain current ID generated by Comparative Example 1 is positive, while when the voltage VD is less than 0, the drain current ID generated by Comparative Example 1 is close to 0. As shown in Figure 6B, when the voltage VD is greater than 0, the drain current ID generated by Example 1 is positive, while when the voltage VD is less than 0, the drain current ID generated by Example 1 is negative. Example 1 shows a good linear relationship between the drain current ID and the voltage VD when the voltage VD is greater than 0 and when the voltage VD is less than 0. In detail, when Example 1 is applied as a MOSFET, the MOSFET can generate stable current under both positive and negative voltage conditions and has good MOSFET performance. As shown in Figures 6A and 6B, compared to Example 1, the current of Example 1 is more than one thousand times that of Example 1. This demonstrates that the semiconductor material prepared by the method disclosed herein is advantageous for amplifying current signals and has better controllability. As shown in Figures 7 and 8, compared to Comparative Example 1, the VG values ​​of Examples 1 and 2 are more positive, while the VG value of Example 3 is more negative. For example, in Example 1, the first chalcogenide material is tungsten diselenide, and the second chalcogenide material is vanadium diselenide, thus successfully obtaining a hole-type semiconductor material. This proves that the semiconductor properties of a semiconductor material can be adjusted by changing the doping region formed by adjusting the types of the first and second chalcogenide materials.

[0038] Hysteresis Curve

[0039] Please refer to Figures 9A and 9B. Figure 9A shows the hysteresis curve data for Comparative Example 1, and Figure 9B shows the hysteresis curve data for Example 1. During the hysteresis curve detection process, the electrical consistency and reaction efficiency of the semiconductor material can be confirmed by scanning the cyclic voltage range. After selecting a starting voltage, the voltage scan range is scanned towards the positive voltage direction to 45 V, then towards the negative voltage direction to -45 V, and finally back to the starting voltage of 0 V at the same voltage scan rate to complete the hysteresis curve. In the hysteresis curve, there are two drain currents ID at the same voltage: one for scanning towards the positive voltage direction and one for scanning towards the negative voltage direction. The closer the two values ​​are, the smaller the hysteresis phenomenon, indicating better electrical consistency and reaction rate of the semiconductor material. The reason affecting the hysteresis curve performance is the charge trap caused by structural defects in the semiconductor material, which delays the electrical changes of the semiconductor material. Conversely, the closer the two drain currents ID at the same voltage, the less obvious the hysteresis phenomenon, proving that higher structural integrity of the semiconductor material can avoid charge traps, which is beneficial to the electrical consistency and reaction rate of the semiconductor material. As can be seen from Figures 9A and 9B, compared with Comparative Example 1, the two drain currents ID of Example 1 are closer at the same voltage, which means that the hysteresis phenomenon of Example 1 is smaller. This proves that the semiconductor material prepared by the semiconductor material preparation method disclosed herein has better structural integrity.

[0040] In summary, the semiconductor material preparation method disclosed herein involves depositing first and second chalcogenide units by controlling the first and second frequencies of a laser source to form the underlying layer and doped regions of the semiconductor material, thereby obtaining the semiconductor material. During the deposition process, the range and size of the doped regions are adjusted using a photoresist layer, thereby obtaining a semiconductor material with high performance and precise dimensions. In this semiconductor material preparation method, the melting degree of the laser source can be precisely controlled to form the first and second chalcogenide units, and the crystal structure is not damaged during deposition, thus obtaining a structurally complete semiconductor material, which is beneficial to the electrical consistency and reaction rate of the semiconductor material. Furthermore, the types of the first and second chalcogenide materials can be selected according to requirements to form electronic or hole-type semiconductor materials. This allows for flexible adjustment of the process to control the characteristics of the semiconductor material, which is beneficial for the mass production and industrial use of semiconductor materials and ensures the quality of the semiconductor material.

[0041] Although the present disclosure has been presented above with reference to embodiments, it is not intended to limit the present disclosure. Anyone skilled in the art may make various modifications and alterations without departing from the spirit and scope of the present disclosure. Therefore, the scope of protection of the present disclosure shall be determined by the appended claims.

[0042] 100: Methods for preparing semiconductor materials 101, 102, 103, 104, 105, 106: Steps 110: Laser melting device 111: Chalcogenide Materials 112: Chalcogenide unit 113:Substrate 114,310: Bottom layer 115: Photoresist layer 116,320: Doped regions 117, 200a, 200b, 200c, 300: Semiconductor materials 118,330: Electrode Structure 210a, 210b, 210c: Bottom layer 211a, 211b, 211c: First chalcogenide unit 220a, 220b, 220c: Doped regions 221a, 221b, 221c: Second chalcogenide units H: Fixed base L: Laser source P1, P2: Path

Claims

1. A method for preparing a semiconductor material, comprising: melting a first chalcogenide material with a laser source at a first frequency to form a plurality of first chalcogenide units; depositing the first chalcogenide units on a substrate to form a bottom layer; forming at least one photoresist layer on the bottom layer, wherein a portion of the surface of the bottom layer is exposed outside the at least one photoresist layer; melting a second chalcogenide material with the laser source at a second frequency to form a plurality of second chalcogenide units; depositing the second chalcogenide units on the portion of the surface of the bottom layer to form at least one doped region; and removing the at least one photoresist layer to obtain a semiconductor material.

2. The method for preparing the semiconductor material as claimed in claim 1, wherein the photoresist layer comprises a resin and a photosensitizer.

3. The method for preparing the semiconductor material as claimed in claim 1, wherein the wavelength of the laser source is from 100 nm to 850 nm.

4. The method for preparing a semiconductor material as claimed in claim 1, wherein the first frequency is from 10 Hz to 1000 Hz, and the second frequency is from 10 Hz to 1000 Hz.

5. The method for preparing a semiconductor material as claimed in claim 1, wherein when the second chalcogenide units are deposited on the surface of the underlying substrate, a heating temperature of 200°C to 330°C is provided on the surface of the underlying substrate.

6. The method for preparing a semiconductor material as claimed in claim 1, wherein the chalcogenide source of the first chalcogenide material is sulfur, selenium, or tellurium, and the chalcogenide source of the second chalcogenide material is sulfur, selenium, or tellurium.

7. The method for preparing a semiconductor material as claimed in claim 6, wherein the first chalcogenide material contains an element from Group VB, Group VIB, or Group VA of the periodic table.

8. A semiconductor material prepared by the method of claim 1, the semiconductor material comprising: a substrate comprising the first chalcogenide units; and the at least one doped region comprising the second chalcogenide units, wherein the second chalcogenide units are bonded to the first chalcogenide units of the substrate.

9. The semiconductor material of claim 8, wherein the first chalcogenide material contains a group VIB element of the periodic table, and the second chalcogenide material contains a group VB element of the periodic table.

10. The semiconductor material of claim 8, wherein the first chalcogenide material contains a group VIB element of the periodic table, and the second chalcogenide material contains a group VA element of the periodic table.

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