Semiconductor structure and methods of formation

Abstract

A hardmask structure including two dielectric layers is used as a mask to pattern a magnetic tunnel junction (MTJ) structure and a bottom electrode layer of a memory device. The dual dielectric hardmask structure is removed in a halogen-based etch process, and a top metal layer of the MTJ structure, which is resistant to halogen-based etchants, is used as the top electrode of the memory device. The dual dielectric layer hardmask structure has a lower height than a dielectric and metal layer hardmask structure where the metal layer is formed into a top electrode, resulting in a lower aspect ratio than the dielectric and metal layer hardmask structure. Due to the lower aspect ratio and non-metal composition of the dual dielectric layer hardmask structure, generation of metal by-products during patterning of the MTJ and bottom electrode layers may be reduced and / or prevented, thereby preventing shorts between memory device electrodes.

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