Inhibitor-free gapfill process method and hardware

TW202635059APending Publication Date: 2026-08-16TOKYO ELECTRON LTD
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Patent Information

Application Number
TW114138160
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-10-07
Filing Date
2025-10-02
Publication Date
2026-08-16

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Patent Text Reader

Abstract

Aspects of the present disclosure provide an inhibitor-free method for filling a recessed feature of a substrate. For example, the inhibitor-free method can include providing a substrate that has a recessed feature, forming a first layer of an insulating material on the substrate to cover a sidewall and bottom of the recessed feature, removing a portion of the first layer such that the recessed feature with the first layer remaining therein slopes outward, and forming a second layer of the insulating material on the substrate to cover the first layer remaining in the recessed feature.
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