Semiconductor device and method of manufacturing semiconductor device

TW202635143AActive Publication Date: 2026-08-16TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information

Application Number
TW114117751
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-02-07
Filing Date
2025-05-12
Publication Date
2026-08-16
Estimated Expiration
2045-05-11

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Abstract

A semiconductor device embodiment includes a first semiconductor die including a first power distribution network, a second semiconductor die over the first semiconductor die and including a second power distribution network, a first set of conductive paths through the first semiconductor die and the second semiconductor die and associated with a first power net group, and a second set of conductive paths through the first semiconductor die and the second semiconductor die and associated with a second power net group. The semiconductor device further includes one or more power management controllers configured to set the first power distribution network as electrically coupled to the first set of conductive paths, the second set of conductive paths, or both; or to set the second power distribution network as electrically coupled to the first set of conductive paths, the second set of conductive paths, or both.
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Claims

1. A semiconductor device comprising: a first substrate including a first power line; a first semiconductor die disposed above the first substrate along a stacking direction, the first semiconductor die including a first power distribution network, a first conductive path, and a first switch, the first switch being configured to electrically couple the first power distribution network to the first conductive path or electrically decouple the first power distribution network from the first conductive path; a second semiconductor die disposed above the first semiconductor die along the stacking direction, the second semiconductor die including a second power distribution network, a second conductive path, and a second switch, the second switch being configured to electrically couple the second power distribution network to the second conductive path or electrically decouple the second power distribution network from the second conductive path; and one or more power management controllers for controlling the first switch, the second switch, or both. The first conductive path and the second conductive path are electrically coupled to each other and to the first power line and are used to carry a first power supply voltage. The one or more power management controllers are individually or jointly included in the first semiconductor die, the second semiconductor die, or a third semiconductor die, which is different from the first semiconductor die and the second semiconductor die.

2. The semiconductor device as claimed in claim 1, wherein the first semiconductor die further comprises: The second semiconductor die further includes: a third conductive path and a third switch, the third switch being used to electrically couple the first distribution network to the third conductive path or electrically decouple the first distribution network from the third conductive path; the second semiconductor die further includes: a fourth conductive path; and a fourth switch, the fourth switch being used to electrically couple the second distribution network to the fourth conductive path or electrically decouple the second distribution network from the fourth conductive path; the one or more power management controllers being used to control the third switch, the fourth switch, or both, and the third conductive path and the fourth conductive path being electrically coupled to each other and used to carry a second power supply voltage.

3. The semiconductor device as claimed in claim 2, wherein the first switch and the third switch are electrically coupled to the same power node of the first power distribution network, or the first switch and the third switch are electrically coupled to different power nodes of the first power distribution network.

4. The semiconductor device as claimed in claim 2, further comprising: a second substrate located above the second semiconductor die along the stacking direction and including a second electric field line, wherein the third conductive path and the fourth conductive path are electrically coupled to each other and electrically coupled to the second electric field line.

5. The semiconductor device as claimed in claim 2, wherein the first substrate includes a third electric field line, and the third conductive path and the fourth conductive path are electrically coupled to each other and electrically coupled to the third electric field line.

6. The semiconductor device as claimed in claim 1, wherein the first semiconductor die further comprises: A fifth conductive path is provided for carrying a third power supply voltage; and a sixth conductive path is provided for carrying a fourth power supply voltage. The first power supply voltage is used to energize a first circuit having a first operating frequency. The third power supply voltage is used to energize a second circuit having a second operating frequency, which is less than the first operating frequency. The fourth power supply voltage is used to energize a third circuit having a third operating frequency, which is less than the second operating frequency. A first distance between the first conductive path and the fifth conductive path in a plane perpendicular to the stacking direction and a second distance between the first conductive path and the sixth conductive path in the same plane are greater than a third distance between the fifth conductive path and the sixth conductive path in the same plane.

7. The semiconductor device as claimed in claim 6, wherein the first semiconductor die further comprises: A seventh conductive path is used to carry a fifth power supply voltage, which is used to energize a fourth circuit having a switching rate of less than 10 times per second or a ground corresponding to the semiconductor device, and a fourth distance in the planar direction between the first conductive path and the seventh conductive path is less than the third distance between the fifth conductive path and the sixth conductive path.

8. A semiconductor device comprising: a first semiconductor die including a first power distribution network; a second semiconductor die located above the first semiconductor die and including a second power distribution network; a first set of conductive paths passing through the first semiconductor die and the second semiconductor die and associated with a first power network group of the semiconductor device; a second set of conductive paths passing through the first semiconductor die and the second semiconductor die and associated with a second power network group of the semiconductor device; and one or more power management controllers for: configuring the first power distribution network to be electrically coupled to the first set of conductive paths, the second set of conductive paths, or both, or configuring the second power distribution network to be electrically coupled to the first set of conductive paths, the second set of conductive paths, or both.

9. A method of manufacturing a semiconductor device, comprising the steps of: disposing a first semiconductor die above a first substrate along a stacking direction, the first substrate including a first power line, the first semiconductor die including a first power distribution network, a first conductive path and a first switch, the first switch being used to electrically couple the first power distribution network to the first conductive path or electrically decouple the first power distribution network from the first conductive path; and disposing a second semiconductor die above the first semiconductor die along the stacking direction, the second semiconductor die including a second power distribution network, a second conductive path and a second switch, the second switch being used to electrically couple the second power distribution network to the second conductive path or electrically decouple the second power distribution network from the second conductive path, wherein the semiconductor device includes: One or more power management controllers are used to control the first switch, the second switch, or both, the first conductive path and the second conductive path are electrically coupled to each other and electrically coupled to the first power line, and the one or more power management controllers are individually or collectively included in the first semiconductor die, included in the second semiconductor die, or included in a third semiconductor die, the third semiconductor die being different from the first semiconductor die and the second semiconductor die.

10. The method of claim 9 further comprises the step of: disposing a third semiconductor die between the first substrate and the first semiconductor die, wherein the one or more power management controllers correspond to a power management controller included in the third semiconductor die.