Interconnection structure over device layer
TW202635145APending Publication Date: 2026-08-16TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information
- Application Number
- TW114117959
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-02-03
- Filing Date
- 2025-05-13
- Publication Date
- 2026-08-16
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Abstract
An interconnection structure over a device layer is provided. The interconnection structure comprises a first metal line in a dielectric layer and a first via self-aligned with the first metal line along a z-axis in the dielectric layer. The first via has a width W along an x-axis and a length L along a y-axis, where W / L ranges from about
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