Reconstituted wafer-to-wafer hybrid bonding interconnect architecture with known good dies

TW202635149APending Publication Date: 2026-08-16INTEL CORP
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Patent Information

Application Number
TW115116831
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2021-12-24
Filing Date
2022-11-17
Publication Date
2026-08-16

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Abstract

Embodiments disclosed herein include die modules and methods of making die modules. In an embodiment, a die module comprises a first die with a set of first pads with surfaces that are substantially coplanar with a surface of a first dielectric layer. In an embodiment, the die module further comprises a second die with a set of second pads with surfaces that are substantially coplanar with a surface of a second dielectric layer. In an embodiment the first pads are bonded to the second pads and the first dielectric layer is bonded to the second dielectric layer.
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