Semiconductor device and method of forming graphene-coated core embedded within tim

TW202635151APending Publication Date: 2026-08-16STATS CHIPPAC LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
TW115116420
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-09-16
Filing Date
2023-06-01
Publication Date
2026-08-16

Smart Images

  • Figure TWG2TA001073567_001
    Figure TWG2TA001073567_001
  • Figure TWG2TA001073567_002
    Figure TWG2TA001073567_002
  • Figure TWG2TA001073567_003
    Figure TWG2TA001073567_003
Patent Text Reader

Abstract

A semiconductor device has a substrate and electrical component disposed overthe substrate. The electrical component can be a semiconductor die, semiconductor package, surface mount device, RF component, discrete electrical device, or IPD. A TIM is deposited over the electrical component. The TIM has a core, such as Cu, covered by graphene. A heat sink is disposed over the TIM, electrical component, and substrate. The TIM is printed on the electrical component. The graphene is interconnected within the TIM to form a thermal path from a first surface of the TIM to a second surface of the TIM opposite the first surface of the TIM. The TIM has thermoset material or soldering type matrix and the core covered by graphene is embedded within the thermoset material or soldering type matrix. A metal layer can be formed between the TIM and electrical component.
Need to check novelty before this filing date? Find Prior Art