Chip package structure
TW202635172APending Publication Date: 2026-08-16UPI SEMICON CORP
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Patent Information
- Application Number
- TW114104561
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-02-07
- Publication Date
- 2026-08-16
Smart Images
Figure TWG2TA001072105_001 
Figure TWG2TA001072105_002 
Figure TWG2TA001072105_003
Abstract
A chip package structure includes a first chip, a conductive clip, a second chip and a third chip. The first chip includes a first power transistor. The conductive clip is disposed on the first chip. The second chip includes a sensing transistor and is disposed on the conductive clip. The second chip is configured to sense a current of the first chip. The second chip and the first chip have a semiconductor substrate respectively and the semiconductor substrate of the second chip is separated from the semiconductor substrate of the first chip. The third chip is disposed on the conductive clip. The third chip is configured to drive the first chip.
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