Waveguide structure, circuit board and manufacturing method of circuit board

Abstract

A waveguide structure, circuit board and manufacturing method of circuit board. The waveguide structure is configured to be connected to an antenna and including a dielectric layer, a first metal layer, a second metal layer, first conductive vias and at least one second conductive via. The first and second metal layers aer respectively disposed on opposite sides of the dielectric layer. The first metal layer has a bottom surface, a top surface and recesses. The bottom surface faces the dielectric layer. The recesses are disposed through the bottom surface and the top surface. The recesses together form a connecting area in a symmetric polygonal shape. A part of the first metal layer is the connecting area is connected to the antenna. The first conductive vias are arranged on a peripheral of the connecting area. The at least one second conductive is located in at least one gap between adjacent recesses.

Description

[Technical Field]

[0001] This invention relates to a waveguide structure, a circuit board, and a method for manufacturing the circuit board, and particularly to a waveguide structure including conductive vias, a circuit board including the waveguide structure, and a method for manufacturing the same. [Previous Technology]

[0002] With the rapid development of wireless communication technology, radar products are being applied to an increasingly wider range of applications. In recent years, 4D imaging radar, which can perform more precise sensing of three-dimensional space, has been developed.

[0003] However, in traditional radar products, the circuit board chip and the antenna are located on the same surface of the same layer and are electrically connected to each other through transmission lines. Therefore, this configuration is difficult to meet the requirements of low signal loss and the need to set up a large number of antennas for 4D imaging radar. [Summary of the Invention]

[0004] The present invention provides a waveguide structure, a circuit board and a method for manufacturing the circuit board, so as to reduce the signal loss of the antenna through the waveguide structure and allow more antennas to be electrically connected to the circuit board through the waveguide structure.

[0005] An embodiment of the present invention discloses a waveguide structure for connection to an antenna and includes a dielectric layer, a first metal layer, a second metal layer, a plurality of first conductive vias, and at least one second conductive via. The first metal layer and the second metal layer are respectively disposed on opposite sides of the dielectric layer. The first metal layer has a bottom surface, a top surface, and a plurality of notches. The bottom surface faces the dielectric layer. The top surface faces away from the bottom surface. The notches penetrate the bottom surface and the top surface. The notches together surround a connection region in the form of a symmetrical polygon. The connection region of the first metal layer is used for connection to the antenna. The first conductive vias are disposed in the dielectric layer and electrically connect the first metal layer and the second metal layer. The first conductive vias are distributed on the outer periphery of the connection region. At least one second conductive via is disposed in the dielectric layer and electrically connects the first metal layer and the second metal layer. The at least one second conductive via is located in at least one gap between adjacent notches.

[0006] In one embodiment of the present invention, the number of notches is four and the connecting area has a rhomboid shape.

[0007] In one embodiment of the present invention, the number of at least one second conductive via is multiple. The number of at least one gap formed between adjacent four notches is two. The second conductive vias are respectively located in the two gaps.

[0008] In one embodiment of the present invention, the second conductive vias in each gap are arranged in an array.

[0009] In one embodiment of the present invention, the first metal layer further comprises a connecting groove. The connecting groove penetrates the bottom surface and the top surface and connects the two surfaces.

[0010] In one embodiment of the present invention, the waveguide structure further includes a plurality of third conductive vias. The third conductive vias are disposed in the dielectric layer and electrically connected to the first metal layer and the second metal layer. The third conductive vias are located on the outer periphery of the connecting groove.

[0011] In one embodiment of the present invention, the waveguide structure further includes a fourth conductive via. The fourth conductive via is disposed in the dielectric layer and electrically connects the first metal layer and the second metal layer. A connecting groove surrounds the fourth conductive via.

[0012] In one embodiment of the present invention, the first conductive via or at least one second conductive via is made of silver.

[0013] In one embodiment of the present invention, the first metal layer further has a side surface connecting the bottom surface and the top surface. At least one of the notches is located on the side surface.

[0014] In one embodiment of the present invention, the first conductive vias are misaligned with each other along the extension direction of the adjacent one in the notch.

[0015] Another embodiment of the present invention discloses a circuit board comprising a circuit substrate, a wafer, a core layer, a first conductive structure, and a waveguide structure. The wafer is electrically connected to the circuit substrate. The core layer is electrically connected to the circuit substrate, and the wafer is located in the core layer. The first conductive structure is disposed in the core layer and electrically connected to the circuit substrate. A second metal layer is disposed on the core layer and electrically connected to the first conductive structure.

[0016] In one embodiment of the present invention, the conductive structure is a coaxial through hole.

[0017] In one embodiment of the present invention, the circuit board further includes a core board and a second conductive structure. The core board is disposed on a core layer. The second conductive structure is disposed in the core board. A second metal layer is disposed on the core layer through the core board, and the second metal layer is electrically connected to the first conductive structure through the second conductive structure.

[0018] Another embodiment of the present invention discloses a method for manufacturing a circuit board, comprising: providing a circuit board and a wafer electrically connected to the circuit board; forming a core layer electrically connected to the circuit board and covering the wafer; forming a first conductive structure electrically connected to the circuit board in the core layer, and disposing a second metal layer of a waveguide structure on the core layer and electrically connected to the first conductive structure.

[0019] In one embodiment of the present invention, prior to the steps of forming a first conductive structure in a core layer and disposing a second metal layer on the core layer and electrically connecting it to the first conductive structure, the method of manufacturing the circuit board further includes forming a second conductive structure in a core board, disposing the core board on the core layer, and electrically connecting the second conductive structure to the first conductive structure. The second metal layer is disposed on the core layer through the core board, and the second metal layer is electrically connected to the first conductive structure through the second conductive structure.

[0020] According to the waveguide structure, circuit board, and circuit board manufacturing method disclosed in the above embodiments, the first conductive via is distributed on the outer periphery of the connection area, and at least one second conductive via is located in at least one gap between adjacent slots. Therefore, with the assistance of the waveguide structure including the first and second conductive vias, the antenna connected to the waveguide structure can have lower signal loss. In addition, more antennas can be electrically connected to the circuit board through the waveguide structure. In this way, the space utilization of the circuit board can be improved. Furthermore, since the high-cost, low-dielectric-constant materials required by traditionally fabricating antennas inside the circuit board can be eliminated, the cost of achieving low signal loss of antenna 20 is reduced.

Implementation Method

[0021] The following detailed description of the embodiments of the present invention outlines its features and advantages. This description is sufficient to enable anyone skilled in the art to understand the technical content of the embodiments of the present invention and to implement them accordingly. Furthermore, based on the disclosure, patent claims, and drawings in this specification, anyone skilled in the art can easily understand the relevant objectives and advantages of the present invention. The following embodiments further illustrate the viewpoints of the present invention, but are not intended to limit the scope of the present invention in any way.

[0022] Please refer to Figures 1 to 4. Figures 1 to 4 illustrate a method for manufacturing a circuit board according to a first embodiment of the present invention. First, as shown in Figure 1, a circuit board 100 and a chip 150 electrically connected to the circuit board 100 are provided. The circuit board 100 includes, for example, a plurality of dielectric layers 110 and a circuit structure 130. The dielectric layers 110 are stacked on top of each other. The circuit structure 130 is disposed in the dielectric layers 110 and includes, for example, a plurality of circuit layers, a plurality of conductive blind vias, and a plurality of conductive through-holes. In addition, the circuit structure 130 also includes, for example, a plurality of pads 131. The pads 131 are electrically connected to the chip 150, for example, through solder balls 135.

[0023] Next, as shown in Figures 2 and 3, a core layer 200 electrically connected to the circuit board 100 and covering the chip 150 is formed. For example, in this embodiment, the step of forming the core layer 200 includes forming a first core layer 210 electrically connected to the circuit board 100 and covering the chip 150 (as shown in Figure 2), and forming a second core layer 220 stacked on the first core layer 210 (as shown in Figure 3). The first core layer 210, for example, has a plurality of pads 211. The circuit structure 130, for example, also has a plurality of pads 132. The pads 211 are electrically connected to the pads 132, for example, through solder balls 215. The core layer 200 is made of metal, such as copper or aluminum, to assist in heat dissipation of the chip 150. In this embodiment, there is, for example, a small gap between the core layer 200 and the chip 150 to allow the core layer 200 to have certain manufacturing tolerances. It should be noted that such a gap is very small in actual products and will not affect the effect of the core layer 200 in assisting the chip 150 in heat dissipation.

[0024] Next, as shown in FIG. 4, a conductive structure 300 electrically connected to the circuit board 100 is formed in the first core layer 210 and the second core layer 220 of the core layer 200, and a second metal layer 430 of a waveguide structure 400 is disposed on the second core layer 220 of the core layer 200 and electrically connected to the conductive structure 300. At this point, the manufacturing of the circuit board 10 is complete. The detailed structure of the waveguide structure 400 will be described later.

[0025] In this embodiment, the conductive structure 300 is, for example, a coaxial via and includes a plurality of conductive vias 310 and a plurality of dielectric materials 320. The conductive vias 310 penetrate the first core layer 210 and the second core layer 220, and electrically connect the pads 211 and the second metal layer 430. The dielectric materials 320 are respectively disposed in or between the conductive vias 310.

[0026] Hereinafter, please refer to Figures 4 to 6 to describe the detailed structure of the waveguide structure 400. Figure 5 is a partially enlarged top view of the circuit board in Figure 4. Figure 6 is a partially enlarged view of the circuit board in Figure 5.

[0027] The waveguide structure 400 is, for example, a substrate-integrated waveguide (SIW). The waveguide structure 400 is used to connect to an antenna 20 and includes a dielectric layer 410, a first metal layer 420, a second metal layer 430, a plurality of first conductive vias 440, a plurality of second conductive vias 450, a plurality of third conductive vias 460 and a fourth conductive via 470.

[0028] The first metal layer 420 and the second metal layer 430 are respectively disposed on opposite sides of the dielectric layer 410.

[0029] The first metal layer 420 has a bottom surface 421, a top surface 422, a side surface 423, a plurality of notches 424, and a connecting slot 425. The bottom surface 421 faces the dielectric layer 410. The top surface 422 faces away from the bottom surface 421. The side surface 423 connects the bottom surface 421 and the top surface 422. The notches 424 penetrate the bottom surface 421 and the top surface 422. The notches 424 together surround a connecting region A in the form of a symmetrical polygon. The connecting region A of the first metal layer 420 is used to connect to the antenna 20. That is, the portion of the first metal layer 420 located in the connecting region A is used to connect to the antenna 20. It should be noted that the connecting region A can be understood, for example, as a space with the same thickness as the first metal layer 420 in the stacking direction of the dielectric layer 410, the first metal layer 420, and the second metal layer 430. Furthermore, in this embodiment, for example, there are four notches 424 and the connecting area A has a rhomboid shape, but the present invention is not limited thereto. In other embodiments, the number, shape, or arrangement of the notches can be adjusted so that the connecting area is a symmetrical polygon of any form, such as a triangle or rectangle.

[0030] Furthermore, at least one of the notches 424 is located on the side surface 423. In this embodiment, for example, there are two notches 424 located on the side surface 423.

[0031] The connecting groove 425 penetrates the bottom surface 421 and the top surface 422 and connects two of the notches 424. In addition, the connecting groove 425 is, for example, arc-shaped.

[0032] A first conductive via 440 is disposed in the dielectric layer 410 and electrically connected to the first metal layer 420 and the second metal layer 430. The first conductive via 440 is distributed on the outer periphery of the connection region A. That is, these notches 424 are located between a geometric center C of the connection region A and these first conductive vias 440. Furthermore, in this embodiment, each notch 424 corresponds to a plurality of first conductive vias 440, and these first conductive vias 440 are offset from each other, for example, along the extension direction E of adjacent notches 424.

[0033] The second conductive via 450 is disposed in the dielectric layer 410 and electrically connected to the first metal layer 420 and the second metal layer 430. In this embodiment, the second conductive vias 450 are located in the two gaps G formed between adjacent four notches 424. Furthermore, in this embodiment, the second conductive vias 450 in each gap G are arranged in an array, such as a 3x3 array. It should be noted that in other embodiments, the notch may form only one gap, and the number of second conductive vias may be only one.

[0034] A third conductive via 460 is disposed in the dielectric layer 410 and electrically connected to the first metal layer 420 and the second metal layer 430. These third conductive vias 460 are located on the outer periphery of the connecting groove 425.

[0035] A fourth conductive via 470 is disposed in the dielectric layer 410 and electrically connected to the first metal layer 420 and the second metal layer 430. A connecting groove 425 surrounds the fourth conductive via 470.

[0036] Furthermore, in this embodiment, one or more of the first conductive via 440, the second conductive via 450, the third conductive via 460 and the fourth conductive via 470 are made of silver, which makes the antenna 20 have lower signal loss.

[0037] In this embodiment, the first conductive via 440 is distributed on the outer periphery of the connection region A, and at least one second conductive via 450 is located in at least one gap G between adjacent notches 424. Therefore, with the assistance of the waveguide structure 400 including the first conductive via 440 and the second conductive via 450, the antenna 20 connected to the waveguide structure 400 can have lower signal loss. In addition, more antennas 20 can be electrically connected to the circuit board 10 through the waveguide structure 400. In this way, the space utilization of the circuit board 10 can be improved. Furthermore, since the high-cost, low-dielectric-constant materials traditionally required for fabricating antennas inside the circuit board can be eliminated, the cost of achieving low signal loss of the antenna 20 is reduced.

[0038] Other embodiments will be listed below for illustration. It should be noted that the following embodiments use the component reference numerals and some content of the foregoing embodiments, wherein the same reference numerals are used to represent the same or similar components, and the description of the same technical content is omitted. For the description of the omitted parts, please refer to the foregoing embodiments, and the following embodiments will not repeat them.

[0039] Please refer to Figures 7 to 12. Figures 7 to 12 illustrate a method for manufacturing a circuit board according to a second embodiment of the present invention.

[0040] First, as shown in FIG7, a circuit board 100 and a chip 150 electrically connected to the circuit board 100 are provided. The detailed structure of the circuit board 100 is as described above, and will not be repeated here.

[0041] Next, as shown in Figures 8 and 9, a core layer 200 electrically connected to the circuit board 100 and covering the chip 150 is formed. For example, in this embodiment, the step of forming the core layer 200 includes forming a first core layer 210 electrically connected to the circuit board 100 and covering the chip 150 (as shown in Figure 8), and forming a second core layer 220 stacked on the first core layer 210 (as shown in Figure 9).

[0042] Next, as shown in FIG10, a first conductive structure 300a electrically connected to the circuit board 100 is formed in the first core layer 210 and the second core layer 220 of the core layer 200.

[0043] Next, as shown in Figures 11 and 12, a second conductive structure 550a is formed in a core board 500a. The core board 500a is disposed on the core layer 200, and the second conductive structure 550a is electrically connected to the first conductive structure 300a. A second metal layer 430 is disposed on the core board 500a. That is, the second metal layer 430 is disposed on the core layer 200 through the core board 500a. The second metal layer 430 is electrically connected to the first conductive structure 300a through the second conductive structure 550a. The detailed structures of the first conductive structure 300a and the second conductive structure 550a are similar to those of the conductive structure 300a in the first embodiment, and will not be described again. At this point, the fabrication of the circuit board 10a is complete. Compared with the circuit board 10 of the first embodiment, the circuit board 10a of this embodiment includes a core board 500a and a second conductive structure 550a, making the application of the circuit board 10a more flexible.

[0044] According to the waveguide structure, circuit board, and circuit board manufacturing method disclosed in the above embodiments, the first conductive via is distributed on the outer periphery of the connection area, and at least one second conductive via is located in at least one gap between adjacent slots. Therefore, with the assistance of the waveguide structure including the first and second conductive vias, the antenna connected to the waveguide structure can have lower signal loss. In addition, more antennas can be electrically connected to the circuit board through the waveguide structure. In this way, the space utilization of the circuit board can be improved. Furthermore, since the high-cost, low-dielectric-constant materials required by traditionally fabricating antennas inside the circuit board can be eliminated, the cost of achieving low signal loss of antenna 20 is reduced.

[0045] Although the present invention has been disclosed above with reference to the foregoing embodiments, it is not intended to limit the present invention. Any person skilled in the art may make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of patent protection of the present invention shall be determined by the scope of the patent application attached to this specification. [Simplified Explanation of the Diagram]

[0046] Figures 1 to 4 illustrate a method for manufacturing a circuit board according to a first embodiment of the present invention. Figure 5 is a partially enlarged top view of the circuit board in Figure 4. Figure 6 is a partially enlarged view of the circuit board in Figure 5. Figures 7 to 12 illustrate a method for manufacturing a circuit board according to a second embodiment of the present invention.

Claims

1. A waveguide structure for connection to an antenna and comprising: a dielectric layer; a first metal layer and a second metal layer disposed on opposite sides of the dielectric layer, the first metal layer having a bottom surface, a top surface and a plurality of notches, the bottom surface facing the dielectric layer and the top surface facing away from the bottom surface, the notches penetrating the bottom surface and the top surface, the notches collectively surrounding a symmetrical polygonal connection region, the connection region of the first metal layer being used for connection to the antenna; a plurality of first conductive vias disposed in the dielectric layer and electrically connected to the first metal layer and the second metal layer, the first conductive vias being distributed around the periphery of the connection region; and at least one second conductive via disposed in the dielectric layer and electrically connected to the first metal layer and the second metal layer, the at least one second conductive via being located in at least one gap between adjacent notches.

2. The waveguide structure as described in claim 1, wherein the number of slots is four and the connection region has a rhomboid shape.

3. The waveguide structure as described in claim 2, wherein the number of the at least one second conductive via is multiple, the number of the at least one gap formed between adjacent four slots is two, and the second conductive vias are respectively located in the two gaps.

4. The waveguide structure as described in claim 3, wherein the second conductive vias in each of the two gaps are arranged in an array.

5. The waveguide structure as claimed in claim 2, wherein the first metal layer further comprises a connecting groove that extends through the bottom surface and the top surface and connects two of the notches.

6. The waveguide structure as described in claim 5 further includes a plurality of third conductive vias disposed in the dielectric layer and electrically connected to the first metal layer and the second metal layer, the third conductive vias being located on the outer periphery of the connecting groove.

7. The waveguide structure as described in claim 6 further includes a fourth conductive via disposed in the dielectric layer and electrically connected to the first metal layer and the second metal layer, the connecting groove surrounding the fourth conductive via.

8. The waveguide structure as claimed in claim 1, wherein the first conductive vias or the at least one second conductive via is made of silver.

9. The waveguide structure as claimed in claim 1, wherein the first metal layer further has a side surface connecting the bottom surface and the top surface, and at least one of the slots is located on the side surface.

10. The waveguide structure as claimed in claim 1, wherein the first conductive vias are offset from each other along the extension direction of an adjacent one of the slots.

11. A circuit board comprising: a circuit substrate; a chip electrically connected to the circuit substrate; a core layer electrically connected to the circuit substrate and the chip located in the core layer; a first conductive structure disposed in the core layer and electrically connected to the circuit substrate; and a waveguide structure as described in claim 1, wherein a second metal layer is disposed on the core layer and electrically connected to the first conductive structure.

12. The circuit board as claimed in claim 11, wherein the first conductive structure is a coaxial via.

13. The circuit board as claimed in claim 11 further includes a core board and a second conductive structure, the core board being disposed on the core layer, the second conductive structure being disposed in the core board, the second metal layer being disposed on the core layer through the core board, and the second metal layer being electrically connected to the first conductive structure through the second conductive structure.

14. A method of manufacturing a circuit board, comprising: providing a circuit substrate and a wafer electrically connected to the circuit substrate; forming a core layer electrically connected to the circuit substrate and covering the wafer; forming a first conductive structure electrically connected to the circuit substrate in the core layer, and disposing a second metal layer of the waveguide structure as described in claim 1 on the core layer and electrically connected to the first conductive structure.

15. The method of manufacturing a circuit board as claimed in claim 14, prior to the steps of forming the first conductive structure in the core layer and disposing the second metal layer on the core layer and electrically connecting it to the first conductive structure, further includes forming a second conductive structure in a core board, disposing the core board on the core layer, and electrically connecting the second conductive structure to the first conductive structure, wherein the second metal layer is disposed on the core layer through the core board, and the second metal layer is electrically connected to the first conductive structure through the second conductive structure.

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