Compensation light source enhancement method in lithography process

Abstract

A compensation light source enhancement method in lithography process is provided. The compensation light source enhancement method includes: providing a mask including a layout pattern; performing a first exposure step including a first illumination to transfer the layout pattern to a first photoresist layer to form a first pattern; obtaining a first illumination adjustment based on a size data and an aerial image data of the first pattern; and performing a second exposure step including the first illumination and the first illumination adjustment to transfer the layout pattern to a second photoresist layer to form a second pattern.

Description

[Technical Field]

[0001] The present invention relates to a method for a photolithography process, and more particularly to a method for compensating for light source enhancement in a photolithography process. [Previous Technology]

[0002] In semiconductor manufacturing, lithography plays a crucial role. However, as semiconductor dimensions continue to shrink, lithography becomes limited by its optical properties.

[0003] Therefore, various resolution enhancement technologies (RETs) have emerged, such as sub-resolution assist features (SRAF), phase-shift mask (PSM), off-axis illumination (OAI), double patterning or multiple patterning, optical proximity correction (OPC), and other lithography-related technologies, in order to make the final pattern formed on the wafer consistent with the target pattern in the device design, that is, to improve the lithography printability capability.

[0004] However, in the lithography process of tight-pitch patterns, even with the above-mentioned resolution enhancement techniques, there is still room for improvement in printability. [Summary of the Invention]

[0005] This invention proposes a method for enhancing the compensating light source in the lithography process to improve lithography printability.

[0006] An embodiment of the present invention provides a method for compensating for light source enhancement in a lithography process, comprising: providing a mask including a layout pattern; performing a first exposure step including a first illumination to transfer the layout pattern to a first photoresist layer to form a first pattern; obtaining a first illumination adjustment based on the size data and spatial image data of the first pattern; and performing a second exposure step including the first illumination and the first illumination adjustment to transfer the layout pattern to a second photoresist layer to form a second pattern.

[0007] In some embodiments, the layout pattern includes a plurality of sub-patterns, wherein the plurality of sub-patterns include a plurality of sub-block patterns or a plurality of sub-strip patterns.

[0008] In some embodiments, the plurality of sub-block patterns include circles or equilateral polygons.

[0009] In some embodiments, the plurality of sub-block patterns are arranged in a matrix or in a single row.

[0010] In some embodiments, the plurality of sub-strip patterns are arranged in a stacked manner.

[0011] In some embodiments, the first illumination includes a general spherical light source or a ring light source.

[0012] In some embodiments, the dimensional data includes diameter, width, length, spacing, or perimeter.

[0013] In some embodiments, the spatial image data includes contrast, normalized image index slope, or masking error enhancement factor.

[0014] In some embodiments, when the plurality of sub-block patterns are arranged in a matrix, the first illumination adjustment includes adding compensating light sources at opposite ends of a first direction and at opposite ends of a second direction of the layout pattern, wherein the first direction is perpendicular to the second direction.

[0015] In some embodiments, the first lighting adjustment includes adding compensating light sources at opposite ends in the direction where the layout pattern is denser.

[0016] An embodiment of the present invention provides a method for compensating for light source enhancement in a lithography process, further comprising: determining whether the lithography step is completed based on the size data and spatial image data of the second pattern; if the size data and spatial image data of the second pattern are within an acceptable range, the method for compensating for light source enhancement is completed; or if the size data and spatial image data of the second pattern are outside an acceptable range, the method for compensating for light source enhancement will continue to perform the following steps: obtaining a second illumination adjustment based on the size data and spatial image data of the second pattern; and performing a third lithography step including the first illumination and the second illumination adjustment to transfer the layout pattern to a third photoresist layer to become a third pattern.

[0017] In some embodiments, the dimensional data includes diameter, width, length, spacing, or perimeter.

[0018] In some embodiments, the spatial image data includes contrast, normalized image index slope, or masking error enhancement factor.

[0019] In some embodiments, the layout pattern includes multiple sub-patterns, and when the multiple sub-block patterns are arranged in a matrix, the second lighting adjustment includes adding compensating light sources at opposite ends of a first direction and at opposite ends of a second direction of the layout pattern, wherein the first direction is perpendicular to the second direction.

[0020] In some embodiments, the second lighting adjustment includes adding compensating light sources at opposite ends in the direction where the layout pattern is denser.

[0021] Based on the above, in the method of compensating for light source enhancement in the lithography process, by using a single exposure correction or multiple exposure corrections to compensate for the light source in the exposure step, a wafer-on-wafer (DOW) dimension that is closer to the dimension on mask (DOM) can be obtained, resulting in good lithography printability. This not only eliminates the need to bear the expensive manufacturing cost of mask updates, but also significantly reduces the time-to-market (TTM).

[0022] In order to make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below, and detailed descriptions are given in conjunction with the accompanying drawings.

Implementation Method

[0023] The following description provides detailed examples and accompanying drawings. This invention may be embodied in various forms and should not be limited to the examples described herein.

[0024] Furthermore, the accompanying drawings are for illustrative purposes only and are not drawn to their original dimensions. Also, the same or similar symbols represent the same or similar elements, which will not be elaborated upon further in the following paragraphs.

[0025] The terms “include”, “including”, “have” and so on used in the text are all open-ended terms, which means “includes but is not limited to”.

[0026] The terminology used herein is for illustrative purposes only and is not intended to limit the invention. Unless otherwise defined in the context, the singular form includes the plural form.

[0027] Please refer to Figure 1, which is a flowchart of the method for compensating for light source enhancement in the lithography process of the present invention.

[0028] First, as described in step S01 of Figure 1, "provide a mask, including a layout pattern".

[0029] The mask may include various lithography components such as masks, photomasks, and reticles. For the sake of brevity and clarity in the description of this embodiment, it is uniformly described as a mask. Furthermore, the mask may be a traditional mask or an advanced mask, such as a phase-shifting mask (PSM).

[0030] In some embodiments, the layout pattern may include multiple sub-patterns, such as multiple sub-block patterns or multiple sub-strip patterns, but is not limited thereto.

[0031] In some embodiments, the multiple sub-block patterns may include block patterns such as circles or equilateral polygons, but are not limited thereto. They may also include ellipses with shapes close to circles, or rectangles, trapezoids, rhombuses, etc. with shapes close to equilateral quadrilaterals.

[0032] In some embodiments, the multiple sub-block patterns may be arranged, for example, in a matrix or in a single row, but are not limited thereto.

[0033] In some embodiments, the plurality of sub-strip patterns may include, for example, strip patterns or near-strip patterns.

[0034] In some embodiments, the multiple sub-strip patterns may be arranged, for example, in a stacked manner, but are not limited thereto.

[0035] Next, as described in step S02 of FIG1, "a first exposure step including first illumination is performed to transfer the layout pattern into the first photoresist layer to form a first pattern".

[0036] In some embodiments, the first illumination may include, but is not limited to, a general spherical light source or a ring light source.

[0037] In some embodiments, the first photoresist layer may include, for example, negative photoresist or positive photoresist.

[0038] Next, as described in step S03 of Figure 1, "the first lighting adjustment is obtained based on the size data of the first pattern and the spatial image data".

[0039] In some embodiments, the size data may include, but is not limited to, size parameters such as diameter, width, length, space or pitch.

[0040] In some embodiments, spatial image data can be used to obtain various lithography process indicators based on the image intensity map in space. For example, these may include contrast, normalized image log slope (NILS), or mask error enhancement factor (MEEF), but are not limited thereto. Any indicator used to evaluate the lithography process may be included.

[0041] In some embodiments, when multiple sub-block patterns are arranged in a matrix, the first lighting adjustment may include, for example, adding compensating light sources at opposite ends of a first direction and at opposite ends of a second direction of the layout pattern, wherein the first direction is perpendicular to the second direction. For example, the first lighting adjustment may include adding compensating light sources at opposite ends of the horizontal direction X and at opposite ends of the vertical direction Y.

[0042] In some embodiments, the first lighting adjustment may include, for example, adding compensating light sources at opposite ends of the direction in which the layout pattern is denser.

[0043] In some embodiments, when multiple sub-block patterns are arranged in a single row or in a stacked manner, the first illumination adjustment may include, for example, adding compensating light sources at opposite ends in the direction where the layout patterns are denser. For example, when multiple sub-block patterns are arranged in a single row in the horizontal direction, the first illumination adjustment may add compensating light sources at opposite ends in the horizontal direction X; as another example, when multiple sub-strip patterns are arranged in a stacked manner in the vertical direction, the first illumination adjustment may add compensating light sources at opposite ends in the vertical direction Y.

[0044] Next, as described in step S04 of FIG1, "a second exposure step including first illumination and first illumination adjustment is performed to transfer the layout pattern to the second photoresist layer to become the second pattern".

[0045] Among them, compared with the first pattern, the second pattern has an additional lighting source for the first lighting adjustment, which makes the second pattern closer to the layout pattern than the first pattern and has better lithography printability.

[0046] Compared to the traditional method of using Optical Proximity Correction (OPC) to correct the exposure results of the original mask and then generating a corrected layout pattern to manufacture a new mask, the present invention can obtain a wafer pattern that is close to the layout pattern simply by compensating the light source of the original mask, and obtains good lithography printability. Not only is there no need to bear the expensive manufacturing cost of mask replacement, but it can also significantly reduce the time-to-market (TTM). For example, the original TTM of about six months can be reduced to four months, making the TTM about 30% faster.

[0047] Next, step S05 shown in Figure 1, "determine whether the compensation light source enhancement method is completed based on the size data and spatial image data of the second pattern," can be executed. When the size data and spatial image data of the second pattern are within an acceptable range, the compensation light source enhancement method can be performed as shown in step S06 of Figure 1, indicating that the photolithography process is "completed." Alternatively, when the size data and spatial image data of the second pattern are outside an acceptable range, further optimization of the second pattern is required. In this case, the compensation light source enhancement method can continue with the supplementary process shown in Figure 2, using the same concept as steps S03 to S04 shown in Figure 1.

[0048] The "acceptable range" of the size data and spatial image data can be set differently depending on the requirements of process precision or the criticality of the formed pattern. For example, the size of the gate is usually more critical than the size of the shallow trench isolation (STI). Therefore, the "acceptable range" of the gate may be ±10% of the target size, and the "acceptable range" of the STI may be ±20% of the target size.

[0049] When further optimization is needed for the second pattern, as described in step S07 of Figure 2, "obtain the second lighting adjustment based on the size data and spatial image data of the second pattern".

[0050] In some embodiments, the size data may include, but is not limited to, size parameters such as diameter, width, length, space or pitch.

[0051] In some embodiments, spatial image data can be used to obtain various lithography process indicators based on the image intensity map in space. For example, these may include contrast, normalized image log slope (NILS), or mask error enhancement factor (MEEF), but are not limited thereto. Any indicator used to evaluate the lithography process may be included.

[0052] In some embodiments, when multiple sub-block patterns are arranged in a matrix, the second lighting adjustment may include, for example, adding compensating light sources at opposite ends of a first direction and opposite ends of a second direction of the layout pattern, wherein the first direction is perpendicular to the second direction. For example, the second lighting adjustment may include, for example, adding compensating light sources at opposite ends of the horizontal direction X and opposite ends of the vertical direction Y.

[0053] In some embodiments, the second lighting adjustment may include, for example, adding compensating light sources at opposite ends of the direction in which the layout pattern is denser.

[0054] In some embodiments, when multiple sub-block patterns are arranged in a single row or stacked, the second lighting adjustment may include, for example, adding compensating light sources at opposite ends in the direction where the layout patterns are denser. For example, when multiple sub-block patterns are arranged in a single row in the horizontal direction, the second lighting adjustment may add compensating light sources at opposite ends in the horizontal direction X; as another example, when multiple sub-strip patterns are arranged in a stacked manner in the vertical direction, the second lighting adjustment may add compensating light sources at opposite ends in the vertical direction Y.

[0055] Next, as described in step S08 of Figure 2, a third exposure step including adjustments to the first illumination and the second illumination is performed to transfer the layout pattern to the third photoresist layer to become the third pattern.

[0056] Wherein, compared with the second pattern being formed by a second exposure step including first illumination and first illumination adjustment, the third pattern is formed by a third exposure step including first illumination and second illumination adjustment, which can make the third pattern closer to the layout pattern than the second pattern and have better lithography printability.

[0057] Next, step S09 shown in Figure 2, "determine whether the compensation light source enhancement method is complete based on the size data and spatial image data of the third pattern," can be executed. If the size data and spatial image data of the third pattern are within an acceptable range, the compensation light source enhancement method is "completed" as shown in step S10 of Figure 2; or, if the size data and spatial image data of the third pattern are outside an acceptable range, and further optimization is needed for the third pattern, the compensation light source enhancement method can continue with the supplementary process shown in Figure 2 using the same concept.

[0058] That is, as needed, the above-mentioned inventive concept can be used to continue the supplementary process of the compensation light source enhancement method shown in Figure 2, such as the third evaluation, obtaining the third lighting adjustment, performing the fourth exposure step, and obtaining the fourth pattern.

[0059] Furthermore, the lighting adjustment of the present invention is not limited to the above three times. Depending on the requirements of process precision or the criticality of the pattern, the lighting can be adjusted an unlimited number of times to obtain a wafer pattern that is closest to the target pattern, or to obtain a wafer pattern whose difference from the target pattern is within an acceptable range.

[0060] In short, it means using multiple exposure corrections to make the dimension on wafer (DOW) more similar to the dimension on mask (DOM).

[0061] The following will provide a clear description of the above-described method for compensating for light source enhancement in a lithography process by listing exemplary embodiments and comparative examples.

[0062] First, it should be noted beforehand that the dimensions of the layout patterns of the mask A (as shown in FIG. 3) of Embodiment 1 and Comparative Example 1, the mask B (as shown in FIG. 4) of Embodiment 2 and Comparative Example 2, and the mask C (as shown in FIG. 5) of Embodiment 3 and Comparative Example 3, such as widths W1, W2, W3, W4, lengths L1, L2, L3, and spacings S1, S2, S3, etc., are not drawn to scale for clarity. Furthermore, in order to make the following description clear and not to make the variations of the embodiments and comparative examples too complicated, the dimensions of the layout patterns are set to be the same as the target dimensions; however, in practical applications, the dimensions of the mask layout patterns can be adjusted according to the difference between the actual exposed pattern size and the target size, so that the actual exposed pattern size is closer to the target size.

[0063] Furthermore, the relative positions of the layout patterns of mask A in FIG3, mask B in FIG4, and mask C in FIG5 will be indicated by the same symbols in the patterned photoresist layers 110 / 120 / 130, 210 / 220 / 230, and 310 / 320 / 330 in FIG3C, FIG4C, and FIG5C, respectively. For example, after the exposure step, the layout pattern of mask A in FIG3 will be transferred to the photoresist layer 110 / 120 / 130 as shown in FIG3C. At this time, the size and position of layout pattern A, such as width W1 and spacing S1, will also be transferred to FIG3C with the same relative position. However, this indication only indicates its relative position, and its actual size needs to be referred to the experimental data in Tables 1, 2, and 3 of the following embodiments and comparative examples.

[0064] Furthermore, the following embodiments and comparative examples will be described using positive photoresist as an example, that is, the photosensitive part of the positive photoresist will be removed after development. However, the content of the present invention is not limited to this, and the same concept can also be applied to negative photoresist in the lithography process.

[0065] Example 1 and Comparative Example 1

[0066] Please refer to Figures 3 to 3C. Figure 3 shows the layout pattern of mask A in Example 1 and Comparative Example 1. Figure 3A shows the shape of the illumination source and its spatial image in the first exposure step of Example 1 and Comparative Example 1. Figure 3B is a cross-sectional view of the patterned photoresist layer formed according to the section line X1-X1' of mask A in Figure 3. Figure 3C shows the shape of the illumination source and its spatial image in the second exposure step of Example 1.

[0067] First, the layout pattern of mask A includes multiple sub-patterns a, which are multiple squares and arranged in a matrix, as shown in Figure 3.

[0068] Each of these multiple sub-patterns a has a width W1 in the X direction and a length L1 in the Y direction, and is arranged in the X and Y directions at a distance of S1, as shown in Figure 3 and Table 1 below.

[0069] Next, a first exposure step AE1, including first illumination, is performed to transfer the layout pattern of FIG3 to the first photoresist layer 110 as shown in FIG3B to form a first pattern.

[0070] As shown in Figure 3A, the first illumination is a ring light source.

[0071] As shown in FIG3B, a first photoresist layer 110 is formed on a substrate 100. After the first exposure step AE1, a first pattern including a plurality of sub-patterns a is formed, wherein each of the plurality of sub-patterns a includes a width W1 in the X direction and a spacing S1 in the X direction, as shown in FIG3B, and also includes a length L1 in the Y direction and a spacing S1 (not shown) in the Y direction.

[0072] Next, the first pattern in the first photoresist layer 110 is measured to obtain data such as the size data and spatial image data of the first pattern, as shown in Table 1 below for Comparative Example 1.

[0073] Next, based on the size data of the first pattern and the spatial image data, as shown in Table 1, the first lighting adjustment is obtained.

[0074] As shown in Figure 3, when multiple sub-patterns a are arranged in a matrix in the horizontal direction X and vertical direction Y of the layout pattern, the first lighting adjustment may include adding compensating light sources at the opposite ends of the horizontal direction X and the opposite ends of the vertical direction Y of the layout pattern, as shown in Figure 3C(B) and Figure 3C(C), respectively.

[0075] Next, as shown in FIG3C, a second exposure step AE2 is performed, including a first illumination as shown in FIG3C(A), a first illumination adjustment as shown in FIG3C(B), and a second exposure step AE2 as shown in FIG3C(C), to transfer the layout pattern to the second photoresist layer 120 to become the second pattern.

[0076] The second photoresist layer 120 may be formed on the same substrate 100 where the first photoresist layer 110 has been removed, or on a different substrate than the substrate 100 of the first photoresist layer 110.

[0077] As with the first pattern described above, the second pattern in the second photoresist layer 120 is measured to obtain data for Example 1 as listed in Table 1 below.

[0078] [Table 1] Comparison Table of Example 1 (Second Pattern) and Comparative Example 1 (First Pattern) Measurement points W1 L1 S1 Contrast +6.9% +6.9% +6.9% NILS +9.1% +9.1% +8.9% MEEF -13.7% -13.7% -13.7%

[0079] As shown in Table 1, the second pattern of Example 1 has better contrast, NILS and MEEF than the first pattern of Comparative Example 1. It is evident that the second exposure AE2 with the first illumination adjustment makes the second pattern closer to the layout pattern than the first exposure AE1, and has better lithography printability.

[0080] Example 2 and Comparative Example 2

[0081] Please refer to Figures 4 to 4C. Figure 4 shows the layout pattern of mask B in Example 2 and Comparative Example 2. Figure 4A shows the shape of the illumination source and its spatial image in the first exposure step of Example 2 and Comparative Example 2. Figure 4B is a cross-sectional view of the patterned photoresist layer formed according to the section line X2-X2' of mask B in Figure 4. Figure 4C shows the shape of the illumination source and its spatial image in the second exposure step of Example 2.

[0082] First, the layout pattern of mask B includes multiple sub-patterns b, which are multiple squares arranged in a single row, as shown in Figure 4.

[0083] Each of these multiple sub-patterns b has a width W2 in the X direction and a length L2 in the Y direction, and is arranged in the X direction at a distance of S2, as shown in Figure 4 and Table 2 below.

[0084] Next, a first exposure step BE1, including first illumination, is performed to transfer the layout pattern of FIG4 to the first photoresist layer 210 as shown in FIG4B to form a first pattern.

[0085] As shown in Figure 4A, the first illumination is a spherical light source.

[0086] As shown in FIG4B, a first photoresist layer 210 is formed on a substrate 200. After the first exposure step BE1, a first pattern comprising a plurality of sub-patterns b is formed, wherein each of the plurality of sub-patterns b includes a width W2 in the X direction and a spacing S2 in the X direction, as shown in FIG4B.

[0087] Next, the first pattern in the first photoresist layer 210 is measured to obtain data such as the size data and spatial image data of the first pattern, as shown in Table 2 below for Comparative Example 2.

[0088] Next, based on the size data of the first pattern and the spatial image data, as shown in Table 2, the first lighting adjustment is obtained.

[0089] As shown in Figure 4, when multiple sub-patterns b are arranged in a single row in the horizontal direction X of the layout pattern, the first lighting adjustment may include adding compensating light sources at opposite ends of the horizontal direction X of the layout pattern, as shown in Figure 4C(B).

[0090] Next, as shown in FIG4C, a second exposure step BE2 is performed, including a first illumination as shown in FIG4C(A) and a first illumination adjustment as shown in FIG4C(B), to transfer the layout pattern to the second photoresist layer 220 to become the second pattern.

[0091] The second photoresist layer 220 may be formed on the same substrate 200 where the first photoresist layer 210 has been removed, or on a different substrate than the substrate 200 of the first photoresist layer 210.

[0092] As with the first pattern described above, the second pattern in the second photoresist layer 220 is measured to obtain data for Example 2 as listed in Table 2 below.

[0093] [Table 2] Comparison Table of Example 2 (Second Pattern) and Comparative Example 2 (First Pattern) Measurement points W2 L2 S2 Contrast +50.0% +8.3% +50.0% NILS +55.8% -3.8% +54.6% MEEF -38.7% -0.3% -38.7%

[0094] As shown in Table 2, the second pattern of Example 2 has better contrast, NILS and MEEF than the first pattern of Comparative Example 2. It is evident that the second exposure BE2 with the first illumination adjustment makes the second pattern closer to the layout pattern than the first exposure BE1, and has better lithography printability.

[0095] Example 3 and Comparative Example 3

[0096] Please refer to Figures 5-5C. Figure 5 shows the layout pattern of the mask C in Example 3 and Comparative Example 3. Figure 5A shows the shape of the illumination source and its spatial image in the first exposure step of Example 3 and Comparative Example 3. Figure 5B is a cross-sectional view of the patterned photoresist layer formed according to the section line Y1-Y1' of the mask C in Figure 5. Figure 5C shows the shape of the illumination source and its spatial image in the second exposure step of Example 3.

[0097] First, the layout pattern of the mask C includes multiple sub-patterns c1 and c2. The multiple sub-patterns c1 and c2 are strip patterns in the X direction and are arranged in a stacked manner in the Y direction, as shown in Figure 5.

[0098] Sub-pattern c1 has a length L3 in the X direction and a width W3 in the Y direction; in addition, there are multiple sub-patterns c2 on both sides of the vertical direction Y of the sub-pattern c1, which have a width W4 in the Y direction; sub-patterns c1 and c2 are arranged in the Y direction with a distance of S3, as shown in Figure 5 and Table 3 below.

[0099] Next, a first exposure step CE1, including first illumination, is performed to transfer the layout pattern of FIG5 to the first photoresist layer 310 as shown in FIG5B to form a first pattern.

[0100] As shown in Figure 5A, the first illumination is a ring light source.

[0101] As shown in FIG5B, a first photoresist layer 310 is formed on a substrate 300. After the first exposure step CE1, a first pattern including multiple sub-patterns c1 and c2 is formed, wherein the multiple sub-patterns c1 and c2 include widths W3 and W4 in the Y direction and a spacing S3 in the Y direction, as shown in FIG5B, and also include a length L3 (not shown) in the X direction.

[0102] Next, the first pattern in the first photoresist layer 310 is measured to obtain data such as the size data and spatial image data of the first pattern, as shown in Table 3 below for Comparative Example 3.

[0103] Next, based on the size data of the first pattern and the spatial image data, as shown in Table 3, the first lighting adjustment is obtained.

[0104] As shown in Figure 5, when multiple sub-patterns c1 and c2 are arranged in a stacked manner in the vertical direction Y of the layout pattern, the first lighting adjustment may include adding compensating light sources at opposite ends of the vertical direction Y of the layout pattern, as shown in Figure 5C(B).

[0105] Next, as shown in FIG5C, a second exposure step CE2 is performed, including a first illumination, as shown in FIG5C(A) and a first illumination adjustment, as shown in FIG5C(B), to transfer the layout pattern to the second photoresist layer 320 to become the second pattern.

[0106] The second photoresist layer 320 may be formed on the same substrate 300 where the first photoresist layer 310 has been removed, or on a different substrate than the substrate 300 of the first photoresist layer 310.

[0107] As with the first pattern described above, the second pattern in the second photoresist layer 320 is measured to obtain data for Example 3 as listed in Table 3 below.

[0108] [Table 3] Comparison Table of Example 3 (Second Pattern) and Comparative Example 3 (First Pattern) Measurement points W3 W4 S3 L3 Contrast +61.1% +17.6% +45.3% +7.5% NILS +25.0% +63.1% +67.7% +38.7% MEEF -22.0% -48.0% -29.9% -5.8%

[0109] As shown in Table 3, the second pattern of Example 3 has better contrast, NILS and MEEF than the first pattern of Comparative Example 3. It is evident that the second exposure CE2 with the first illumination adjustment makes the second pattern closer to the layout pattern than the first exposure CE1, and has better lithography printability.

[0110] In the above-mentioned method for compensating for light source enhancement in lithography process, by using single exposure correction or multiple exposure corrections to compensate for the light source in the exposure step, a wafer-on-disk (DOW) dimension that is closer to the dimension on mask (DOM) can be obtained, resulting in good lithography printability. This not only eliminates the need to bear the expensive manufacturing cost of mask updates, but also significantly reduces time-to-market (TTM).

[0111] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims. [Simplified Explanation of the Diagram]

[0112] Figure 1 is a flowchart of the method for compensating for light source enhancement in a lithography process according to the present invention. Figure 2 is a supplementary flowchart of the method for compensating for light source enhancement in a lithography process according to the present invention. Figure 3 shows the layout pattern of mask A in Example 1 and Comparative Example 1. Figure 3A shows the shape of the illumination source and its spatial image in the first exposure step of Example 1 and Comparative Example 1. Figure 3B is a cross-sectional view of the patterned photoresist layer formed according to the cross-section X1-X1' of mask A in Figure 1. Figure 3C shows the shape of the illumination source and its spatial image in the second exposure step of Example 1. Figure 4 shows the layout pattern of mask B in Example 2 and Comparative Example 2. Figure 4A shows the shape of the illumination source and its spatial image in the first exposure step of Example 2 and Comparative Example 2. Figure 4B is a cross-sectional view of the patterned photoresist layer formed according to the cross-section X2-X2' of mask B in Figure 2. Figure 4C shows the shape of the illumination source and its spatial image in the second exposure step of Example 2. Figure 5 shows the layout patterns of the mask C in Example 3 and Comparative Example 3. Figure 5A shows the shape of the illumination source and its spatial image in the first exposure step of Example 3 and Comparative Example 3. Figure 5B is a cross-sectional view of the patterned photoresist layer formed according to the section line Y1-Y1' of the mask C in Figure 3. Figure 5C shows the shape of the illumination source and its spatial image in the second exposure step of Example 3.

Claims

1. A method for compensating for light source enhancement in a lithography process, comprising: Provide a mask, including a layout pattern; perform a first exposure step including a first illumination to transfer the layout pattern into a first photoresist layer to form a first pattern; Based on the size data and spatial image data of the first pattern, a first lighting adjustment is obtained; and a second exposure step including the first lighting and the first lighting adjustment is performed to transfer the layout pattern to a second photoresist layer to form a second pattern, wherein the first lighting adjustment includes adding compensating light sources at opposite ends of the direction in which the layout pattern is denser.

2. The method for compensating for light source enhancement in a lithography process as described in claim 1, wherein the layout pattern includes a plurality of sub-patterns, wherein the plurality of sub-patterns includes a plurality of sub-block patterns or a plurality of sub-strip patterns.

3. The method for compensating for light source enhancement in a lithography process as described in claim 2, wherein the plurality of sub-block patterns include circles or equilateral polygons.

4. The method for compensating for light source enhancement in a lithography process as described in claim 2, wherein the plurality of sub-block patterns are arranged in a matrix or in a single row.

5. The method for compensating for light source enhancement in a lithography process as described in claim 2, wherein the plurality of sub-strip patterns are arranged in a stacked manner.

6. The method for compensating for light source enhancement in a lithography process as described in claim 1, wherein the first illumination comprises a general spherical light source or a ring light source.

7. The method for compensating for light source enhancement in a lithography process as described in claim 1, wherein the dimensional data includes diameter, width, length, spacing, or perimeter.

8. The method for compensating for light source enhancement in a lithography process as described in claim 1, wherein the spatial image data includes contrast, normalized image index slope, or masking error enhancement factor.

9. The method for compensating for light source enhancement in a lithography process as described in claim 4, wherein when the plurality of sub-block patterns are arranged in the matrix, the first illumination adjustment includes adding compensating light sources at opposite ends of a first direction and at opposite ends of a second direction of the layout pattern, wherein the first direction is perpendicular to the second direction.

10. The method for compensating for light source enhancement in a lithography process as described in claim 1, further comprising: determining whether the lithography step is completed based on the size data and spatial image data of the second pattern; if the size data and spatial image data of the second pattern are within an acceptable range, then the method for compensating for light source enhancement is completed; or if the size data and spatial image data of the second pattern are outside the acceptable range, then the method for compensating for light source enhancement continues to perform the following steps: obtaining a second illumination adjustment based on the size data and spatial image data of the second pattern; and performing a third lithography step including the first illumination and the second illumination adjustment to transfer the layout pattern to a third photoresist layer to become a third pattern.

11. The method for compensating for light source enhancement in a lithography process as described in claim 10, wherein the dimensional data includes diameter, width, length, spacing, or perimeter.

12. The method for compensating for light source enhancement in a lithography process as described in claim 10, wherein the spatial image data includes contrast, normalized image index slope, or masking error enhancement factor.

13. The method for compensating for light source enhancement in a lithography process as described in claim 10, wherein the layout pattern comprises a plurality of sub-patterns, and when the plurality of sub-patterns are arranged in a matrix, the second illumination adjustment comprises adding compensating light sources at opposite ends of a first direction and at opposite ends of a second direction of the layout pattern, wherein the first direction is perpendicular to the second direction.

14. The method for compensating for light source enhancement in a lithography process as described in claim 10, wherein the second illumination adjustment includes adding compensating light sources at opposite ends in the direction where the layout pattern is denser.

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