Prefetcher based on PC-relative operations

Abstract

Techniques are disclosed relating to prefetching in computer processors. In some embodiments, a processor executes load instructions that access data at an indicated address. Prefetch circuitry may generate prefetch requests to access data predicted to be utilized by load instructions, including to detect a set of one or more instructions that specify a PC-relative arithmetic operation, that depends on one or more immediate values in the one or more instructions, followed by a load operation. In response to the detection, the prefetch circuitry may perform the PC-relative arithmetic operation to determine a target address for the load operation and initiate a data prefetch to the determined target address.

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